发布求助
文献互助 智能选刊 最新文献

1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual最新文献

筛选
英文 中文
Impact of boron penetration on gate oxide reliability and device lifetime in p/sup +/-poly PMOSFETs 硼渗透对p/sup +/-聚pmosfet栅极氧化物可靠性和器件寿命的影响
1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual Pub Date : 1997-04-08 DOI: 10.1109/RELPHY.1997.584275
B. Kim, I. Liu, H. Luan, M. Gardner, J. Fulford, D. Kwong
{"title":"Impact of boron penetration on gate oxide reliability and device lifetime in p/sup +/-poly PMOSFETs","authors":"B. Kim, I. Liu, H. Luan, M. Gardner, J. Fulford, D. Kwong","doi":"10.1109/RELPHY.1997.584275","DOIUrl":"https://doi.org/10.1109/RELPHY.1997.584275","url":null,"abstract":"The effect of boron penetration on device performance and reliability of p/sup +/-poly PMOSFETs was investigated in a wide RTA drive-in temperature range. High RTA drive-in temperature reduces the poly-depletion effect in NMOSFETs while causing significant boron-penetration induced mobility degradation in PMOSFETs, leading to difficulty in I/sub d,sat/ optimization for a dual-gate CMOS process. Moreover, boron penetration enhances charge trapping in the oxide and interface state generation at the Si-SiO/sub 2/ interface under F-N stress. The impact of this degradation mode on gate oxide reliability and device lifetime in the PMOSFETs is systematically demonstrated.","PeriodicalId":193458,"journal":{"name":"1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114679785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Correlations between initial via resistance and reliability performance 初始通孔阻力与可靠性性能的相关性
1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual Pub Date : 1997-04-08 DOI: 10.1109/RELPHY.1997.584233
C. Graas, H. A. Le, T.A. Rosi
{"title":"Correlations between initial via resistance and reliability performance","authors":"C. Graas, H. A. Le, T.A. Rosi","doi":"10.1109/RELPHY.1997.584233","DOIUrl":"https://doi.org/10.1109/RELPHY.1997.584233","url":null,"abstract":"Accelerated stressing and electromigration (EM) testing were conducted on W-plug via chains and Van der Pauw structures respectively. These populations were chosen to include a wide distribution of initial resistances R/sub 0/. The high-end of the R/sub 0/ distribution exhibited a higher early failure rate and a higher spread in EM time-to-fail distribution. Processes which produce tightly controlled time-zero via resistance distributions are more desirable for via reliability.","PeriodicalId":193458,"journal":{"name":"1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117133205","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A new technique to measure an oxide trap density in a hot carrier stressed n-MOSFET 热载流子应力n-MOSFET氧化阱密度测量新技术
1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual Pub Date : 1997-04-08 DOI: 10.1109/RELPHY.1997.584276
Tahui Wang, L. Chiang, T. Chang, N. Zous, K. Y. Shen, C. Huang
{"title":"A new technique to measure an oxide trap density in a hot carrier stressed n-MOSFET","authors":"Tahui Wang, L. Chiang, T. Chang, N. Zous, K. Y. Shen, C. Huang","doi":"10.1109/RELPHY.1997.584276","DOIUrl":"https://doi.org/10.1109/RELPHY.1997.584276","url":null,"abstract":"We have proposed a new measurement technique to characterize the hot carrier stress generated oxide traps in a n-MOSFET by measuring subthreshold current. In this technique, a specially designed measurement consisting of a series of oxide charge detrapping and subthreshold current measurement phases was performed. An analytical model accounting for the temporal evolution of subthreshold current due to oxide charge detrapping was derived. Our study shows that this method is extremely sensitive to an oxide charge variation. By using this method, the oxide trap growth rates by hot electron stress and hot hole stress were measured.","PeriodicalId":193458,"journal":{"name":"1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120989286","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Maximum safe reverse emitter voltage in bipolar transistors for reliable 10 year operation 最大安全反向发射极电压在双极晶体管可靠的10年运行
1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual Pub Date : 1997-04-08 DOI: 10.1109/RELPHY.1997.584231
J. Scarpulla, J. Dunkley, S. Lemke, E. Sabin, M. Young
{"title":"Maximum safe reverse emitter voltage in bipolar transistors for reliable 10 year operation","authors":"J. Scarpulla, J. Dunkley, S. Lemke, E. Sabin, M. Young","doi":"10.1109/RELPHY.1997.584231","DOIUrl":"https://doi.org/10.1109/RELPHY.1997.584231","url":null,"abstract":"Bipolar transistors used in applications such as read/write amplifiers are subjected to reverse emitter-base stress. This stress degrades the current gain of the transistor which ultimately can lead to circuit failure. We have developed a method by which an acceptable level of degradation may be specified based upon circuit considerations. A statistical model is then used to determine the maximum allowed emitter base reverse stress voltage. The model allows the specification of the allowed fraction of failures (for example, 1000 ppm) after a specified time (for example, 10 years). The derivation of the statistical model and its application to two types of bipolar transistors are shown.","PeriodicalId":193458,"journal":{"name":"1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121064801","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Key hot-carrier degradation model calibration and verification issues for accurate AC circuit-level reliability simulation 关键的热载流子退化模型校准和验证问题，以实现准确的交流电路级可靠性仿真
1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual Pub Date : 1997-04-08 DOI: 10.1109/RELPHY.1997.584278
Wenjie Jiang, H. Le, S. Dao, S.A. Kim, B. Stine, J. E. Chung, Yu-Jen Wu, P. Bendix, S. Prasad, A. Kapoor, T. Kopley, T. Dungan, I. Manna, P. Marcoux, Lifeng Wu, A. Chen, Zhihong Liu
{"title":"Key hot-carrier degradation model calibration and verification issues for accurate AC circuit-level reliability simulation","authors":"Wenjie Jiang, H. Le, S. Dao, S.A. Kim, B. Stine, J. E. Chung, Yu-Jen Wu, P. Bendix, S. Prasad, A. Kapoor, T. Kopley, T. Dungan, I. Manna, P. Marcoux, Lifeng Wu, A. Chen, Zhihong Liu","doi":"10.1109/RELPHY.1997.584278","DOIUrl":"https://doi.org/10.1109/RELPHY.1997.584278","url":null,"abstract":"This study provides necessary degradation model calibration and evaluation guidelines required to enable more consistent and effective use of hot-carrier reliability simulation tools. Benchmark results provide strong verification that the AC degradation models are generally accurate if properly calibrated; however, SPICE modeling errors, secondary physical mechanisms and statistical parameter variation are found to impact the simulated results as much as differences in the circuit design itself.","PeriodicalId":193458,"journal":{"name":"1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual","volume":"170 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123285273","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
NBTI-channel hot carrier effects in PMOSFETs in advanced CMOS technologies 先进CMOS技术中pmosfet的nbti通道热载子效应
1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual Pub Date : 1997-04-08 DOI: 10.1109/RELPHY.1997.584274
G. La Rosa, F. Guarín, S. Rauch, A. Acovic, J. Lukaitis, E. Crabbé
{"title":"NBTI-channel hot carrier effects in PMOSFETs in advanced CMOS technologies","authors":"G. La Rosa, F. Guarín, S. Rauch, A. Acovic, J. Lukaitis, E. Crabbé","doi":"10.1109/RELPHY.1997.584274","DOIUrl":"https://doi.org/10.1109/RELPHY.1997.584274","url":null,"abstract":"In this work the reliability of a 0.35 /spl mu/m p+ poly-gate pMOSFET CMOS technology under conductive channel hot carrier conditions is investigated. It is found that at any bias and temperature condition applied, the degradation of sufficiently short channel length (Leff/spl sime/0.14 um) devices results in a reduction in drive current due to the impact of donor type interface trap generation and positive charge formation during the stress. At these dimensions the degradation is controlled by a contribution of both Negative Bias Temperature Instability (NBTI) and Channel Hot Carrier (CHC) mechanism. We will show the role that each of these two mechanisms play in determining the shift of typical device parameters. A methodology to decouple the two effects is also provided allowing to quantify each contribution separately at any bias and temperature condition. A conductive CHC model that takes into account the impact of both mechanisms to the device lifetime at the worst observed degradation condition (Vg=Vd) is also discussed.","PeriodicalId":193458,"journal":{"name":"1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114265800","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 89
Scaling down of tunnel oxynitride in NAND flash memory: oxynitride selection and reliabilities NAND快闪存储器中隧道氮化物的缩小:氮化物的选择和可靠性
1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual Pub Date : 1997-04-08 DOI: 10.1109/RELPHY.1997.584220
Jonghan Kim, Jungdal Choi, W. Shin, Dong Jun Kim, H. Kim, K. M. Mang, Sunghoon Ahn, O. Kwon
{"title":"Scaling down of tunnel oxynitride in NAND flash memory: oxynitride selection and reliabilities","authors":"Jonghan Kim, Jungdal Choi, W. Shin, Dong Jun Kim, H. Kim, K. M. Mang, Sunghoon Ahn, O. Kwon","doi":"10.1109/RELPHY.1997.584220","DOIUrl":"https://doi.org/10.1109/RELPHY.1997.584220","url":null,"abstract":"The selection of a manufacturable furnace-grown oxynitride process and reliability issues of the scaled tunnel oxide are examined. As the oxide thickness is scaled down, the cycling endurance, read life time and program disturb characteristics in a NAND flash memory with the tunnel oxynitride are improved compared to the conventional dry oxide.","PeriodicalId":193458,"journal":{"name":"1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual","volume":"247 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122102750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 24
Latchup characterization of high energy ion implanted new CMOS twin wells that comprised the BILLI (buried implanted layer for lateral isolation) and BL/CL (buried layer/connecting layer) structures 高能离子注入新型CMOS双井的闭锁特性，该双井由BILLI(用于横向隔离的埋注入层)和BL/CL(埋注入层/连接层)结构组成
1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual Pub Date : 1997-04-08 DOI: 10.1109/RELPHY.1997.584285
Jong-Kwan Kim, Seong-Hyung Park, Young-Jong Lee, Y. Sung
{"title":"Latchup characterization of high energy ion implanted new CMOS twin wells that comprised the BILLI (buried implanted layer for lateral isolation) and BL/CL (buried layer/connecting layer) structures","authors":"Jong-Kwan Kim, Seong-Hyung Park, Young-Jong Lee, Y. Sung","doi":"10.1109/RELPHY.1997.584285","DOIUrl":"https://doi.org/10.1109/RELPHY.1997.584285","url":null,"abstract":"We have investigated the latchup characteristics of various CMOS well structures possible with high energy ion implantation processes, including conventional retrograde well, BILLI well and BL/CL structure. We also compare those characteristics with conventional diffused wells in bulk and retrograde wells with STI isolation technology. We show DC latchup characterization results that allow us to evaluate each technology and suggest guidelines for the optimization of latchup hardness.","PeriodicalId":193458,"journal":{"name":"1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129893950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Gate stack reliability improvements using controlled ambient processing 利用受控环境处理提高栅极堆栈可靠性
1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual Pub Date : 1997-04-08 DOI: 10.1109/RELPHY.1997.584218
K. Schuegraf, R. Thakur, R. Weirner
{"title":"Gate stack reliability improvements using controlled ambient processing","authors":"K. Schuegraf, R. Thakur, R. Weirner","doi":"10.1109/RELPHY.1997.584218","DOIUrl":"https://doi.org/10.1109/RELPHY.1997.584218","url":null,"abstract":"This paper investigates the impact of ambient control in critical front-end processes. Gate-oxide reliability improvements and device implications for advanced sub-micron applications are described. Such processing limits exposure of wafers to clean-room air and promises reliability improvements, particularly where bare silicon or critical films are present on the wafer surface. Specifically, the benefits of environmental control between gate pre-clean and gate oxidation, gate oxidation and polysilicon deposition, and silicide deposition and annealing are presented.","PeriodicalId":193458,"journal":{"name":"1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121187729","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Effects of focused ion beam irradiation on MOS transistors 聚焦离子束辐照对MOS晶体管的影响
1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual Pub Date : 1997-04-08 DOI: 10.1109/RELPHY.1997.584241
A. N. Campbell, K. Peterson, D. Fleetwood, J. Soden
{"title":"Effects of focused ion beam irradiation on MOS transistors","authors":"A. N. Campbell, K. Peterson, D. Fleetwood, J. Soden","doi":"10.1109/RELPHY.1997.584241","DOIUrl":"https://doi.org/10.1109/RELPHY.1997.584241","url":null,"abstract":"The effects of irradiation from a focused ion beam (FIB) system on MOS transistors are reported systematically for the first time. Three MOS transistor technologies, with 0.5, 1, and 3 /spl mu/m minimum feature sizes and with gate oxide thicknesses ranging from 11 to 50 nm, were analyzed. Significant shifts in transistor parameters (such as threshold voltage, transconductance, and mobility) were observed following irradiation with a 30 keV Ga/sup +/ focused ion beam with ion doses varying by over 5 orders of magnitude. The apparent damage mechanism (which involved the creation of interface traps, oxide trapped charge, or both) and extent of damage were different for each of the three technologies investigated.","PeriodicalId":193458,"journal":{"name":"1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual","volume":"205 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126428868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：604180095
Book学术官方微信