B. Kim, I. Liu, H. Luan, M. Gardner, J. Fulford, D. Kwong
{"title":"硼渗透对p/sup +/-聚pmosfet栅极氧化物可靠性和器件寿命的影响","authors":"B. Kim, I. Liu, H. Luan, M. Gardner, J. Fulford, D. Kwong","doi":"10.1109/RELPHY.1997.584275","DOIUrl":null,"url":null,"abstract":"The effect of boron penetration on device performance and reliability of p/sup +/-poly PMOSFETs was investigated in a wide RTA drive-in temperature range. High RTA drive-in temperature reduces the poly-depletion effect in NMOSFETs while causing significant boron-penetration induced mobility degradation in PMOSFETs, leading to difficulty in I/sub d,sat/ optimization for a dual-gate CMOS process. Moreover, boron penetration enhances charge trapping in the oxide and interface state generation at the Si-SiO/sub 2/ interface under F-N stress. The impact of this degradation mode on gate oxide reliability and device lifetime in the PMOSFETs is systematically demonstrated.","PeriodicalId":193458,"journal":{"name":"1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Impact of boron penetration on gate oxide reliability and device lifetime in p/sup +/-poly PMOSFETs\",\"authors\":\"B. Kim, I. Liu, H. Luan, M. Gardner, J. Fulford, D. Kwong\",\"doi\":\"10.1109/RELPHY.1997.584275\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The effect of boron penetration on device performance and reliability of p/sup +/-poly PMOSFETs was investigated in a wide RTA drive-in temperature range. High RTA drive-in temperature reduces the poly-depletion effect in NMOSFETs while causing significant boron-penetration induced mobility degradation in PMOSFETs, leading to difficulty in I/sub d,sat/ optimization for a dual-gate CMOS process. Moreover, boron penetration enhances charge trapping in the oxide and interface state generation at the Si-SiO/sub 2/ interface under F-N stress. The impact of this degradation mode on gate oxide reliability and device lifetime in the PMOSFETs is systematically demonstrated.\",\"PeriodicalId\":193458,\"journal\":{\"name\":\"1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-04-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RELPHY.1997.584275\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1997 IEEE International Reliability Physics Symposium Proceedings. 35th Annual","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RELPHY.1997.584275","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Impact of boron penetration on gate oxide reliability and device lifetime in p/sup +/-poly PMOSFETs
The effect of boron penetration on device performance and reliability of p/sup +/-poly PMOSFETs was investigated in a wide RTA drive-in temperature range. High RTA drive-in temperature reduces the poly-depletion effect in NMOSFETs while causing significant boron-penetration induced mobility degradation in PMOSFETs, leading to difficulty in I/sub d,sat/ optimization for a dual-gate CMOS process. Moreover, boron penetration enhances charge trapping in the oxide and interface state generation at the Si-SiO/sub 2/ interface under F-N stress. The impact of this degradation mode on gate oxide reliability and device lifetime in the PMOSFETs is systematically demonstrated.