Maximum safe reverse emitter voltage in bipolar transistors for reliable 10 year operation

Abstract

Bipolar transistors used in applications such as read/write amplifiers are subjected to reverse emitter-base stress. This stress degrades the current gain of the transistor which ultimately can lead to circuit failure. We have developed a method by which an acceptable level of degradation may be specified based upon circuit considerations. A statistical model is then used to determine the maximum allowed emitter base reverse stress voltage. The model allows the specification of the allowed fraction of failures (for example, 1000 ppm) after a specified time (for example, 10 years). The derivation of the statistical model and its application to two types of bipolar transistors are shown.