Impact of boron penetration on gate oxide reliability and device lifetime in p/sup +/-poly PMOSFETs

Abstract

The effect of boron penetration on device performance and reliability of p/sup +/-poly PMOSFETs was investigated in a wide RTA drive-in temperature range. High RTA drive-in temperature reduces the poly-depletion effect in NMOSFETs while causing significant boron-penetration induced mobility degradation in PMOSFETs, leading to difficulty in I/sub d,sat/ optimization for a dual-gate CMOS process. Moreover, boron penetration enhances charge trapping in the oxide and interface state generation at the Si-SiO/sub 2/ interface under F-N stress. The impact of this degradation mode on gate oxide reliability and device lifetime in the PMOSFETs is systematically demonstrated.