{"title":"Design Optimization of GaAs/AlGaAs Lasers Epitaxially Grown on Si Substrates with Threading Dislocation Density in the Range of ~106cm−2","authors":"Yugeng Shi, Bing Wang, Siyuan Yu","doi":"10.1109/CSTIC52283.2021.9461434","DOIUrl":"https://doi.org/10.1109/CSTIC52283.2021.9461434","url":null,"abstract":"We have studied the total number effect of TDs in laser cavities with different sizes by using the rate equations in theory and simulation. Our initial results show that by decreasing the laser cavity size, the threshold current densities can be reduced and other performance such as slope efficiency and nonradiative recombination can be improved. This method may provide another design space for lasers epitaxially grown on Si.","PeriodicalId":186529,"journal":{"name":"2021 China Semiconductor Technology International Conference (CSTIC)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129380460","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A New Solution of Power Management Integrated Circuit One Time Programable Test","authors":"Yong Liang, Li Tao, Colin Xing","doi":"10.1109/CSTIC52283.2021.9461591","DOIUrl":"https://doi.org/10.1109/CSTIC52283.2021.9461591","url":null,"abstract":"PMIC (Power Management Integrated Circuit) is the primary power management building block for multiple kinds of ICs (Processor, memory and miscellaneous peripherals). OTP (One Time Programable) test is used for trimming identical original PMIC devices to different versions as per different customers' requirement. Conventional OTP test solutions have constraints in flexibility, ease of use or cost aspects. This paper presents a new OTP test solution which breaks conventional OTP test solutions constraints. It is a reliable, flexible and easy to use low-cost OTP ATE (Automatic Test Equipment) test solution without using conventional testers.","PeriodicalId":186529,"journal":{"name":"2021 China Semiconductor Technology International Conference (CSTIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130612759","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
L. D'urzo, T. Umeda, T. Mizuno, A. Hattori, Amarnauth Singh, R. Beera, P. Foubert, Waut Drent
{"title":"High Performance Bulk and POU Filtration of EUV Lithography Materials","authors":"L. D'urzo, T. Umeda, T. Mizuno, A. Hattori, Amarnauth Singh, R. Beera, P. Foubert, Waut Drent","doi":"10.1109/CSTIC52283.2021.9461498","DOIUrl":"https://doi.org/10.1109/CSTIC52283.2021.9461498","url":null,"abstract":"To comply with defect specification, Extreme Ultra-Violet (EUV) lithography necessitates performance improvement for both bulk and point-of-use (POU) filters. In this study, the data represent novel polyethylene and nylon filters for a variety of bulk and POU applications, specifically designed to: i) dramatically reduce differential pressure while achieving excellent retention, and ii) provide outstanding cleanliness for EUV grade application. Each filter was assessed by differential pressure (dP), liquid particle counter (LPC), GC-MS, and ICP-MS measurements. Finally, defect data were obtained from blanket and pattern wafers, prepared at the imec EUV cluster comprised of TEL Cleantrack LITHIUS Pro-Z and ASML NXE:3400B with a 16nm L/S test vehicle and characterized by a KLA-2935 and an eDR-7380 tools.","PeriodicalId":186529,"journal":{"name":"2021 China Semiconductor Technology International Conference (CSTIC)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131661109","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Z. Shang, Qian Xu, Guan-You He, Z. Zheng, Chun‐Hu Cheng
{"title":"Investigation on Channel Plasma Effect in Doped Tin-Oxide Thin-Film Transistors Using Experiments and Simulation","authors":"Z. Shang, Qian Xu, Guan-You He, Z. Zheng, Chun‐Hu Cheng","doi":"10.1109/CSTIC52283.2021.9461466","DOIUrl":"https://doi.org/10.1109/CSTIC52283.2021.9461466","url":null,"abstract":"In this paper, we reported ap-channel tin-oxide (SnO) thin-film transistor (TFT) by introducing aluminum (AI) dopant in the SnO channel layer. An extremely high field-effect mobility $(mu_{text{FE}}$) of 8 cm2/V·s and an on-to-off current ratio $(I_{text{on}}/I_{text{off}})$ of ~103 were obtained in this p-channel Al-doped SnO (A1:SnO) TFT. Furthermore, the device performances of the Al:SnO TFT including the $I_{text{on}}/I_{text{off}}$ and subthreshold swing (SS) were greatly improved by fluorine plasma treatment (FPT) on the Al:SnO channel layer. In addition, in order to study the channel plasma effect on the device performances, TCAD simulation was carried out based on the p-channel Al:SnO TFT by introducing the density of state (DOS) model. The simulation results indicated that the device performance enhancements were further achieved because the attributes of acceptor-like Gaussian defect states and donor-like band-tail state were modified during the FPT.","PeriodicalId":186529,"journal":{"name":"2021 China Semiconductor Technology International Conference (CSTIC)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128760222","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Investigation Between 2- Terminal and 4- Terminal Kelvin Structure in Terms Of WLR ISOEM And PLR EM for Metal Interconnection","authors":"Dingrui Zhang, Weihai Fan, Jizhou Li, Kelly Yang","doi":"10.1109/CSTIC52283.2021.9461431","DOIUrl":"https://doi.org/10.1109/CSTIC52283.2021.9461431","url":null,"abstract":"Electromigration performance is a key index for BEOL process reliability, in this paper, 2-terminal and 4-terminal kelvin structure EM tests are performed in both WLR IsoEM and PLR EM method, it's found 2-terminal WLR IsoEM test time is faster than that of 4 terminal kelvin structure under the same desired temperature stress condition, the TTF ratio is about 0.6 and 0.5 times for narrow metal (MxN) and wide metal (MxW) respectively. Besides, Iso-EM TTF increases with the rising of the chuck temperature and lower layer metal shows worse than the upper. While on the contrary, 2 terminal PLR EM TTF is bigger than that of 4 terminal. This distinct observation is investigated and its mechanism is discussed in the paper.","PeriodicalId":186529,"journal":{"name":"2021 China Semiconductor Technology International Conference (CSTIC)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126242704","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Mechanism B I-V Symmetry for MIM Capacitors Used in Microelectronics","authors":"W. Lau","doi":"10.1109/CSTIC52283.2021.9461463","DOIUrl":"https://doi.org/10.1109/CSTIC52283.2021.9461463","url":null,"abstract":"The I-V characteristics of MIM capacitors tend to be asymmetrical. However, the I-V characteristics of MIM capacitors can sometimes be symmetrical because of two different mechanisms: Mechanism A and Mechanism B. For high-k MIM capacitors with ultrathin high-k dielectric, Mechanism B is the more likely mechanism.","PeriodicalId":186529,"journal":{"name":"2021 China Semiconductor Technology International Conference (CSTIC)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122562351","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Wafer Edge Crack Defect Investigation and Improvement in 19nm PSZ DEP Process","authors":"Junwei Han, Qiliang Ni, Xiaofang Gu, Jiaya Bo, Jian Li, Pengkai Xu","doi":"10.1109/CSTIC52283.2021.9461484","DOIUrl":"https://doi.org/10.1109/CSTIC52283.2021.9461484","url":null,"abstract":"In 19nm Flash memory process, the aspect ratio of shallow trench isolation (STI) become large and it gets difficult to fill STI Oxide by conventional CVD film. Perhydro-Polysilazance (PSZ) deposition process because of its good filling ability has been evaluated for better STI fill instead of conventional CVD. But this new process can cause cracks because of its high temperature process. Crack defect is inspected by dark field inspection (DFI) tool of KLA. Transmission electron microscope (TEM) is used to study the profile of wafer edge film. The experiment proved that the crack defect is generally decided by STI Etch profile, annealing temperature of rise and drop and the thickness of PSZ DEP. In this paper, solution of to avoid the crack defect are studied.","PeriodicalId":186529,"journal":{"name":"2021 China Semiconductor Technology International Conference (CSTIC)","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126033368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Hao Zhang, Chenglong Dong, He Li, Jie Zhang, Xi Wang
{"title":"A Mems Micro-Tweezers for Precision Micro Fabricating and Assembly","authors":"Hao Zhang, Chenglong Dong, He Li, Jie Zhang, Xi Wang","doi":"10.1109/CSTIC52283.2021.9461253","DOIUrl":"https://doi.org/10.1109/CSTIC52283.2021.9461253","url":null,"abstract":"This paper presents the fabrication and characterization of a MEMS micro-tweezers system based on precise welding. It can be used in picking and placing a variety of micro parts such as MEMS devices and solder particles. The gap between the tips of micro-tweezers is 500um and the width of the cantilever is 100um. A micro-box fabricated by welding is used to control the closing and opening of the tweezers. The closing force of the tips can achieve 200mN, and by changing the size of the tips and the actuating distance, the closing force can be well controlled. The micro-tweezers can be used manually or installed in the micro-manipulation systems to make the experiment process easy to operate and more precise.","PeriodicalId":186529,"journal":{"name":"2021 China Semiconductor Technology International Conference (CSTIC)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116258627","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Haoran Li, Baoguo Zhang, Ye Li, Xiaofan Yang, Wei Wei, Zhaoxia Yang
{"title":"Effect of PASP Inhibitor on Cu-Co Galvanic Corrosion","authors":"Haoran Li, Baoguo Zhang, Ye Li, Xiaofan Yang, Wei Wei, Zhaoxia Yang","doi":"10.1109/CSTIC52283.2021.9461577","DOIUrl":"https://doi.org/10.1109/CSTIC52283.2021.9461577","url":null,"abstract":"After integrated circuit feature size is down to 14 nm and under, Co has gradually replaced Ta as an effective barrier layer material. But due to large standard potential difference between Cu and Co, severe galvanic corrosion happens in the Co-Cu interface. The effect of polyaspartic acid (PASP) on Cu/Co galvanic corrosion in alkaline condition was discussed. The results showed that PASP could improve the Material removal rate (MRR) of Cu and reduce the galvanic corrosion between Cu and Co. The corrosion potential difference of Cu/Co was less than 20 mV. In this paper, the mechanism of galvanic corrosion and inhibition was discussed. The new green biodegradable corrosion inhibitor could be a potential candidate in barrier slurry formulation.","PeriodicalId":186529,"journal":{"name":"2021 China Semiconductor Technology International Conference (CSTIC)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121239301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Implementation of Spectral Interferometry for Enhanced Critical Dimensions Optical Metrology","authors":"D. Shafir, R. Shtainman, I. Turovets","doi":"10.1109/CSTIC52283.2021.9461449","DOIUrl":"https://doi.org/10.1109/CSTIC52283.2021.9461449","url":null,"abstract":"Optical Critical Dimension (OCD) metrology has proved itself for the last decades as an enabler for advanced node semiconductor device fabrication. In this field, the current workhorses are the well-established techniques of spectral reflectometry and ellipsometry (SR/SE) techniques [1], [2]. This paper introduces a novel Spectral Interferometry method (SI) providing absolute spectral phase information to be used in advanced metrology cases, enhancing the sensitivity to the monitored structural parameters. We demonstrate the value of the SI technology for various metrology challenging use cases.","PeriodicalId":186529,"journal":{"name":"2021 China Semiconductor Technology International Conference (CSTIC)","volume":"325 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121704226","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}