Wafer Edge Crack Defect Investigation and Improvement in 19nm PSZ DEP Process

Abstract

In 19nm Flash memory process, the aspect ratio of shallow trench isolation (STI) become large and it gets difficult to fill STI Oxide by conventional CVD film. Perhydro-Polysilazance (PSZ) deposition process because of its good filling ability has been evaluated for better STI fill instead of conventional CVD. But this new process can cause cracks because of its high temperature process. Crack defect is inspected by dark field inspection (DFI) tool of KLA. Transmission electron microscope (TEM) is used to study the profile of wafer edge film. The experiment proved that the crack defect is generally decided by STI Etch profile, annealing temperature of rise and drop and the thickness of PSZ DEP. In this paper, solution of to avoid the crack defect are studied.