Tong‐Ho Kim, C. Yi, April S. Brown, P. Moran, T. Kuech
{"title":"The heterogeneous integration of InAlAs/InGaAs heterojunction diodes on GaAs: impact of wafer bonding on structural and electrical characteristics","authors":"Tong‐Ho Kim, C. Yi, April S. Brown, P. Moran, T. Kuech","doi":"10.1109/LECHPD.2002.1146778","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146778","url":null,"abstract":"We have investigated the influence of low temperature wafer bonding on the electrical and structural characteristics of InAlAs/InGaAs n-p heterojunction structures with similar structure to an emitter-base junction of InAlAs/InGaAs HBTs. Those n-p junction heterostructures were grown on an InP [100] substrate by solid source MBE. The effect of the wafer bonding process on the structural properties of the epitaxial layers was studied by comparing triple crystal X-ray diffraction measurements and simulations before and after bonding. In addition, the influence of the bonding process on the electrical properties of the heterojunction structures was assessed through SIMS analysis of both the bonded and nonbonded samples and an analysis of the I-V characteristics of diodes fabricated on both the bonded and non-bonded sample. These analyses show that the structural and electrical properties of the as-grown epitaxial layers were negligibly changed by the low temperature wafer transfer process.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129491294","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Zhang, L. Rowland, E. Kaminsky, J. Kretchmer, R. Beaupre, J. Garrett, J. Tucker
{"title":"Microwave power SiC MESFETs and GaN HEMTs","authors":"A. Zhang, L. Rowland, E. Kaminsky, J. Kretchmer, R. Beaupre, J. Garrett, J. Tucker","doi":"10.1109/LECHPD.2002.1146748","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146748","url":null,"abstract":"We have fabricated SiC MESFETs with more than 60 W of output power at 450 MHz from single 21.6 mm gate periphery devices (2.9 W/mm) and 27 W of output power at 3 GHz from single 14.4 mm SiC MESFET devices (1.9 W/mm). We have also demonstrated more than 6.7 W/mm CW power from 400 /spl mu/m GaN/AlGaN HEMT devices for X band (10 GHz) applications. These excellent device performances have been attributed to the improved substrate and epitaxial film quality, optimized device thermal management, and enhanced device fabrication technologies. The substrates and epitaxial films from different sources were compared and some showed significant less SiC substrate micropipes confirmed by X-ray topography and epitaxial defects characterized by optical defect mapping.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126441285","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Gessmann, J. Graff, Y.-L. Li, E. Waldron, E. Schubert
{"title":"Ohmic contact technology in III-V nitrides using polarization effects in cap layers","authors":"T. Gessmann, J. Graff, Y.-L. Li, E. Waldron, E. Schubert","doi":"10.1109/LECHPD.2002.1146792","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146792","url":null,"abstract":"A novel technology for low-resistance ohmic contacts to III-V nitrides is presented. The contacts employ polarization-induced electric fields in strained cap layers grown on lattice-mismatched III-V nitride buffer layers. With appropriate choice of the cap layer, the electric field in the cap layer reduces the thickness of the tunnel barrier at the metal contact/semiconductor interface. Design rules for polarization-enhanced contacts are presented giving guidance for composition and thickness of the cap layer for different III-V nitride buffer layers. Experimental results for ohmic contacts with p-type InGaN and GaN cap layers are markedly different from samples without a polarized cap layer thus confirming the effectiveness of polarization-enhanced ohmic contacts.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"128 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121473328","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An Ebers-Moll model for heterostructure bipolar transistors with tunnel junctions","authors":"J. López-González, D. Keogh, P. Asbeck","doi":"10.1109/LECHPD.2002.1146757","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146757","url":null,"abstract":"This paper presents an Ebers-Moll model for HBTs and DHBTs in which tunnelling transport plays an important role at the base-emitter (BE) and/or base-collector (BC) junction. Devices of this type include GaAs or InP-based HBTs with abrupt heterojunctions, as well as a number of devices designed intentionally with thin tunnel layers at the B-E or B-C junctions. For these structures, the conventional drift-diffusion formalisms (and numerical simulators based on them) are inadequate. The present model allows a quasi-analytical description of the device characteristics, assuming one dimensional structure. The model is applied here to the study of tunnel emitter and tunnel collector InGaP-HBTs. Forward and reverse Gummel plots can be analysed in relation to the tunnelling characteristics of the junction barriers.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115893121","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Hsu, P. Valizadeh, D. Pavlidis, J. Moon, M. Micovic, D. Wong, T. Hussain
{"title":"Characterization and analysis of gate and drain low-frequency noise in AlGaN/GaN HEMTs","authors":"S. Hsu, P. Valizadeh, D. Pavlidis, J. Moon, M. Micovic, D. Wong, T. Hussain","doi":"10.1109/LECHPD.2002.1146787","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146787","url":null,"abstract":"The gate and drain low-frequency noise (LFN) characteristics of 0.15/spl times/200 /spl mu/m/sup 2/ AlGaN/GaN HEMTs are reported. The measured gate noise current spectral density is low and insensitive to the applied high reverse bias voltage between the gate and the drain. Typical gate noise level values vary from /spl sim/1.9/spl times/10/sup -19/ to /spl sim/3.4/spl times/10/sup -19/ (A/sup 2//Hz) as the drain voltage increases from 1 V to 12 V (V/sub G/=-5 V) at 10 Hz. The calculated Hooge parameter is /spl sim/5.9/spl times/10/sup -4/, which is comparable to traditional III-V FETs. Lorentz noise components were observed when V/sub DS/ is higher than 8 V. The peak of Lorentz component moves toward higher frequency when V/sub DS/ increases and V/sub GS/ decreases. The exponent /spl gamma/ of the 1/f/sup l/ was found to reduce from 1. 17 to 1.0 1 when V/sub DS/ increases from 8 V to 16 V. The observed trends are discussed in terms of electric field, carrier velocity and trapping-detrapping considerations.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"98 7","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131712937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Van Schuylenbergh, C. Chua, D. Fork, J. Lu, B. Griffiths
{"title":"On-chip out-of-plane high-Q inductors","authors":"K. Van Schuylenbergh, C. Chua, D. Fork, J. Lu, B. Griffiths","doi":"10.1109/LECHPD.2002.1146776","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146776","url":null,"abstract":"Integrating high-Q inductors on semiconductor circuits has been an elusive goal for years due primarily to the eddy current losses and skin effect resistance associated with in-plane spiral inductors. Three-dimensional out-of-plane coils reduce eddy current and skin effect losses by virtue of their geometry and magnetic field orientation. However, out-of-plane coils were not deemed producible by standard semiconductor fabrication methods. This paper reports on a novel use of conventional semiconductor processing techniques to batch-fabricate three-dimensional high-Q inductors on a wide range of insulating or active semiconductor substrates. Thin molybdenum-chromium films are sputter deposited with an engineered built-in stress gradient so that, when patterned and released from their substrate, they curl into circular springs. These springs self-assemble into three-dimensional scaffolds that form highly conductive windings after being copper plated. Quality factors up to 85 are observed at 1 GHz on standard CMOS silicon. The in-circuit microcoil performance is also compared in BiCMOS silicon L-C oscillators to that of state-of-the-art planar spirals with slotted grounds.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121643896","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Tsai, N. Barsky, J. Lee, J. B. Boos, B. R. Bennett, R. Magno, C. Namba, P. Liu, A. Gutierrez, R. Lai
{"title":"MMIC compatible AlSb/InAs HEMT with stable AlGaSb buffer layers","authors":"R. Tsai, N. Barsky, J. Lee, J. B. Boos, B. R. Bennett, R. Magno, C. Namba, P. Liu, A. Gutierrez, R. Lai","doi":"10.1109/LECHPD.2002.1146764","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146764","url":null,"abstract":"In this paper, we present state-of-the-art f/sub T/ and f/sub max/ results of 130 GHz, and 110 GHz for AlSb/InAs HEMTs with AlGaSb/AlSb metamorphic buffer layers that demonstrate InAs-channel HEMTs that are stable with exposure to air and are compatible with standard MMIC production processes.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"159 8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128944795","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Keogh, R. Welty, J. López-González, C. Lutz, R. Welser, P. Asbeck
{"title":"GaInP/GaAs tunnel collector HBTs: base-collector barrier height analysis","authors":"D. Keogh, R. Welty, J. López-González, C. Lutz, R. Welser, P. Asbeck","doi":"10.1109/LECHPD.2002.1146775","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146775","url":null,"abstract":"Tunnel collector HBTs employ a thin layer of GaInP between the GaAs base and collector regions, in order to suppress hole injection when the base-collector junction is forward biased. Devices with a low offset voltage of 30 mV, and low knee voltage of /spl sim/0.3 V, while still maintaining high current gain (170), and good RF performance with f/sub T/=54 GHz and f/sub MAX/=68 GHz have been demonstrated. The devices exhibit increased output conductance as compared to conventional GaInP/GaAs SHBTs, due to a residual barrier at the base-collector junction. This paper presents an experimental method for the determination of such barriers, by analyzing the collector current as a function of applied base-collector voltage, V/sub CB/.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121213697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of GaN/AlGaN HEMT class-E power amplifier considering trapping and thermal effects","authors":"S. S. Islam, A. Anwar","doi":"10.1109/LECHPD.2002.1146745","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146745","url":null,"abstract":"A microwave class-E power amplifier using AlGaN/GaN HEMT as the switching device is reported by incorporating trapping and thermal effects in the large-signal device model. The load network of the class-E amplifier is designed by considering more realistic exponential decay of the drain current during fall time and finite quality factor of the resonant circuit to incorporate the nonidealities of the active device and passive components. With 9 V supply voltage, calculated output power and power conversion efficiency are 89 mW and 58% at 1GHz which decrease to 84 mW and 54% at 3.8 GHz, respectively for a GaN/Al/sub 0.30/Ga/sub 0.70/N HEMT with gate width of 50 /spl mu/m.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126301531","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Sawdai, C. Monier, A. Cavus, T. Block, R. Sandhu, M. Goorsky, A. Gutierrez-Aitken, J. Woodall, G. Wicks
{"title":"DC and RF performance of InAs-based bipolar transistors at very low bias","authors":"D. Sawdai, C. Monier, A. Cavus, T. Block, R. Sandhu, M. Goorsky, A. Gutierrez-Aitken, J. Woodall, G. Wicks","doi":"10.1109/LECHPD.2002.1146765","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146765","url":null,"abstract":"We fabricated metamorphic InAs bipolar junction transistors (BJTs) with a narrow bandgap in the base to reduce operating voltages, and we report RF results that we believe to be the first published for InAs-based bipolar transistors. InAs BJTs were grown by molecular beam epitaxy on InP substrates using strain-relief graded InAlAs buffer layers and optimized graded emitter-base and collector-base junctions. Large area devices (75/spl times/75 /spl mu/m/sup 2/ emitter) exhibit DC current gain /spl beta/ of 85. Higher /spl beta/ exceeding 100 was observed from tunneling-emitter bipolar transistors with various InAlAs barrier designs, indicating lower holes injection from the base to the emitter. Small-area devices have been fabricated using the standard front-side process from our InP HBT line. Microwave properties measured from devices with emitter size of 1.5/spl times/10 /spl mu/m/sup 2/ were very promising, showing a cutoff frequency over 50 GHz in devices with thick base and collector layers. An extremely low base-emitter voltage of 0.3 V was measured at peak frequency. These InAs-based bipolar transistors on InP substrates with good DC and RF performance demonstrate the viability of future narrow bandgap heterojunction bipolar transistors with state-of-the-art speed performance at low operating voltage.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"25 suppl_4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125825653","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}