Proceedings. IEEE Lester Eastman Conference on High Performance Devices最新文献

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Molecular beam deposition of low-resistance polycrystalline InAs 低阻多晶InAs的分子束沉积
Proceedings. IEEE Lester Eastman Conference on High Performance Devices Pub Date : 2002-08-06 DOI: 10.1109/LECHPD.2002.1146752
D. Scott, M. Urteaga, N. Parthasarathy, J. English, M. Rodwell
{"title":"Molecular beam deposition of low-resistance polycrystalline InAs","authors":"D. Scott, M. Urteaga, N. Parthasarathy, J. English, M. Rodwell","doi":"10.1109/LECHPD.2002.1146752","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146752","url":null,"abstract":"We report low-resistance Si-doped polycrystalline InAs (poly-InAs:Si) using molecular beam deposition. We believe this to be the first report of low resistance in poly-InAs. The poly-InAs:Si was deposited using conventional molecular beam epitaxy (MBE) onto SiN/sub x/ coated GaAs substrates at various growth temperatures and deposition rates. Poly-InAs samples with thicknesses of 2000 /spl Aring/ and 1000 /spl Aring/ were grown for Hall and TLM measurements, respectively. We have observed electron concentrations from 8.8/spl times/10/sup 18/ to 1.5/spl times/10/sup 19/ cm/sup -3/ and respective mobilities from 886 to 441 cm/sup 2//Vs. This range of values suggests that the poly-InAs:Si has a doping-mobility product, and hence bulk conductivity, that is only 3-4 times lower than that of similarly doped InGaAs lattice-matched to InP. The typical bulk resistivity determined by TLM measurements is approximately 1.4/spl times/10/sup -3/ /spl Omega/-cm. Contact resistance to the poly-InAs with a Ti/Pt/Au metal stack less than 1.6/spl times/10/sup -7/ /spl Omega/-cm/sup 2/. The combined low contact access resistance and low junction capacitance found in poly-InAs:Si may be useful in a variety of III-V device applications.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"77 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130288532","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Physics of GaN-based high-power lasers 氮化镓基高功率激光器的物理学
Proceedings. IEEE Lester Eastman Conference on High Performance Devices Pub Date : 2002-08-06 DOI: 10.1109/LECHPD.2002.1146760
J. Piprek, S. Nakamura
{"title":"Physics of GaN-based high-power lasers","authors":"J. Piprek, S. Nakamura","doi":"10.1109/LECHPD.2002.1146760","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146760","url":null,"abstract":"Advanced device simulation is used to analyze performance and device physics of milestone nitride laser diodes. These lasers exhibit the highest room-temperature continuous-wave output power measured thus far. The laser model self-consistently combines band structure and free-carrier gain calculations with two-dimensional simulations of waveguiding, carrier transport, and heat flux. Material parameters used in the model are carefully evaluated. Excellent agreement between simulations and measurements is achieved. The maximum output power is limited by electron leakage into the p-doped ridge. Leakage escalation is caused by strong self-heating, gain reduction, and elevated carrier density within the quantum wells. Improved heat-sinking is predicted to allow for a significant increase of the maximum output power.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133862253","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
AlGaN/GaN HEMTs grown by molecular beam epitaxy on sapphire, SiC, and HVPE GaN templates 通过分子束外延在蓝宝石、SiC和HVPE GaN模板上生长的AlGaN/GaN hemt
Proceedings. IEEE Lester Eastman Conference on High Performance Devices Pub Date : 2002-08-06 DOI: 10.1109/LECHPD.2002.1146740
N. Weimann, M. Manfra, J. Hsu, K. Baldwin, L. Pfeiffer, K. West, S. Chu, D. Lang, R. Molnar
{"title":"AlGaN/GaN HEMTs grown by molecular beam epitaxy on sapphire, SiC, and HVPE GaN templates","authors":"N. Weimann, M. Manfra, J. Hsu, K. Baldwin, L. Pfeiffer, K. West, S. Chu, D. Lang, R. Molnar","doi":"10.1109/LECHPD.2002.1146740","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146740","url":null,"abstract":"Molecular beam epitaxy of GaN and related alloys is becoming a rival to the more established metalorganic vapor phase epitaxy. Excellent control of impurity, interface abruptness, and in situ monitoring of the growth are driving the increase in quality of MBE epilayers. We have developed nucleation schemes with plasma-assisted MBE on three types of substrates, consisting of sapphire, semi-insulating (SI-) SiC, and HVPE SI-GaN templates on sapphire. While sapphire and SI-SiC are established substrates for the growth of AlGaN/GaN HEMT epilayers, HVPE GaN templates may provide a path to low-cost large-diameter substrates for electronic devices. We compare device results of HEMTs fabricated on these substrates. As a metric for device performance, the saturated RF power output in class A operation is measured at 2 GHz. We achieved a saturated power density of 2.2 W/mm from HEMTs on sapphire, 1.1 W/mm from HEMTs on HVPE GaN templates on sapphire, and 6.3 W/mm. from HEMTs on semi-insulating 6H-SiC substrates. The difference in output power can be attributed to self-heating due to insufficient thermal conductivity of the sapphire substrate, and to trapping in the compensation-doped HVPE template.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121165572","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
100 A and 3.1 kV 4H-SiC GTO thyristors 100a和3.1 kV 4H-SiC GTO晶闸管
Proceedings. IEEE Lester Eastman Conference on High Performance Devices Pub Date : 2002-08-06 DOI: 10.1109/LECHPD.2002.1146732
S. Van Campen, A. Ezis, J. Zingaro, G. Storaska, R. C. Clarke, K. Elliott, V. Temple, D. Hits, M. Thompson, K. Roe, T. Hansen
{"title":"100 A and 3.1 kV 4H-SiC GTO thyristors","authors":"S. Van Campen, A. Ezis, J. Zingaro, G. Storaska, R. C. Clarke, K. Elliott, V. Temple, D. Hits, M. Thompson, K. Roe, T. Hansen","doi":"10.1109/LECHPD.2002.1146732","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146732","url":null,"abstract":"In this paper, we report on asymmetric SiC GTOs (gate turn-off thyristors), fabricated at Northrop Grumman with the assistance of Silicon Power Co. A module containing six 1 mm/spl times/1 mm GTOs connected in parallel has demonstrated 100 A of switching current capability. This is the highest current reported to date with GTOs designed for greater than 3 kV forward blocking voltage. GTOs fabricated from the same wafer have achieved a forward blocking voltage of 3.1 kV, which was the testing limit of the instrumentation. This represents a record high breakdown voltage for GTOs with a drift layer thickness of 30 /spl mu/m. These GTOs also demonstrated record low leakage currents of <5 /spl mu/A at the forward blocking voltage of 3.1 kV.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115258998","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Channel recessed 4H-SiC MESFETs with F/sub t/ of 14.5GHz and F/sub max/ of 40GHz 通道内嵌式4H-SiC mesfet, F/sub /为14.5GHz, F/sub / max/为40GHz
Proceedings. IEEE Lester Eastman Conference on High Performance Devices Pub Date : 2002-08-06 DOI: 10.1109/LECHPD.2002.1146734
H. Cha, C. I. Thomas, G. Koley, Hyungtak Kim, L. F. Eastman, M. Spencer
{"title":"Channel recessed 4H-SiC MESFETs with F/sub t/ of 14.5GHz and F/sub max/ of 40GHz","authors":"H. Cha, C. I. Thomas, G. Koley, Hyungtak Kim, L. F. Eastman, M. Spencer","doi":"10.1109/LECHPD.2002.1146734","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146734","url":null,"abstract":"Channel recessed 4H-SiC MESFETs have demonstrated excellent small signal characteristics and the effect of Si/sub 3/N/sub 4/ passivation on these devices has been studied in this work. A saturated current of 250-270 mA/mm and a maximum transconductance of 40-45 mS/mm were measured for these devices. The 3-terminal breakdown voltage V/sub ds/ ranges from 120 V to more than 150 V, depending on gate-drain spacing. 2/spl times/200 /spl mu/m devices with 0.45 /spl mu/m gate length show high F/sub t/ of 14.5 GHz and F/sub max/ of 40 GHz. After Si/sub 3/N/sub 4/ passivation, the output power and PAE were increased by 40% and 16%, respectively, for CW power measurement. Other measurements, such as, the change in surface potential and the dispersion of the drain current make it clear that the passivation of SiC MESFETs reduces the surface effects and enhances the RF power performance by suppressing the instability in DC characteristics.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122122090","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
InP/GaAsSb/InP double heterojunction bipolar transistors InP/GaAsSb/InP双异质结双极晶体管
Proceedings. IEEE Lester Eastman Conference on High Performance Devices Pub Date : 2002-08-06 DOI: 10.1109/LECHPD.2002.1146773
C. Bolognesi, M. Dvorak, S. Watkins
{"title":"InP/GaAsSb/InP double heterojunction bipolar transistors","authors":"C. Bolognesi, M. Dvorak, S. Watkins","doi":"10.1109/LECHPD.2002.1146773","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146773","url":null,"abstract":"InP/GaAsSb/InP double heterojunction bipolar transistors (DHBTs) are some of the fastest bipolar transistors ever fabricated, with current gain cutoff and maximum oscillation frequencies simultaneously exceeding 300 GHz while maintaining breakdown voltages BV/sub CEO/ >6 V. InP/GaAsSb/InP DHBTs are particularly appealing because excellent device figures of merit are achievable with relatively simple structures involving abrupt junctions and uniform doping levels and compositions. This is a tremendous manufacturability advantage and the reason why some organizations have moved aggressively toward GaAsSb DHBT production despite a relative scarcity of information on the physical properties of the GaAsSb alloy in comparison to GaInAs. The present paper reviews some of the key concepts associated with the use of GaAsSb base layers, and discusses the physical operation of InP/GaAsSb/InP DHBTs. In particular, we describe the implications of the staggered band lineup at the E/B and B/C heterojunctions for charge storage in the devices, and show that InP/GaAsSb/InP DHBTs offer inherent advantages from that point of view. We also show that GaAsSb-based DHBTs can be expected to display better scalability than GaInAs-based devices because of their inherently superior base ohmic contacts.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"121 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130478579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Comparison of surface passivation on films for reduction of current collapse in AlGaN/GaN high electron mobility transistors AlGaN/GaN高电子迁移率晶体管表面钝化膜降低电流崩溃的比较
Proceedings. IEEE Lester Eastman Conference on High Performance Devices Pub Date : 2002-08-06 DOI: 10.1109/LECHPD.2002.1146790
B. Luo, R. Mehandru, J. Kim, F. Ren, B. Gila, A. Onstine, C. Abernathy, S. Pearton, R. Fitch, J. Gillespie, T. Jenkins, J. Sewell, D. Via, A. Crespo, Y. Irokawa
{"title":"Comparison of surface passivation on films for reduction of current collapse in AlGaN/GaN high electron mobility transistors","authors":"B. Luo, R. Mehandru, J. Kim, F. Ren, B. Gila, A. Onstine, C. Abernathy, S. Pearton, R. Fitch, J. Gillespie, T. Jenkins, J. Sewell, D. Via, A. Crespo, Y. Irokawa","doi":"10.1109/LECHPD.2002.1146790","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146790","url":null,"abstract":"Three different passivation layers (SiN/sub x/, MgO and Sc/sub 2/O/sub 3/) were examined for their effectiveness in mitigating surface-state-induced current collapse in AlGaN/GaN high electron mobility transistors (HEMTs). The plasma-enhanced chemical vapor deposited SiN/sub x/ produced /spl sim/80-85% recovery of the drain-source current, independent of whether SiH/sub 4//NH/sub 3/ or SiD/sub 4//ND/sub 3/ plasma chemistries were employed. Both the Sc/sub 2/O/sub 3/ and MgO produced essentially complete recovery of the current in GaN-cap HEMT structures and /spl sim/80-95% recovery in AlGaN-cap structures. The Sc/sub 2/O/sub 3/ had superior long-term stability, with no change in HEMT behavior over 5 months aging.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132701509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
RF 4H-SiC bipolar junction transistors RF 4H-SiC双极结晶体管
Proceedings. IEEE Lester Eastman Conference on High Performance Devices Pub Date : 2002-08-06 DOI: 10.1109/LECHPD.2002.1146750
I. Perez-Wurfl, A. Konstantinov, J. Torviko, B. van Zeghbroeck
{"title":"RF 4H-SiC bipolar junction transistors","authors":"I. Perez-Wurfl, A. Konstantinov, J. Torviko, B. van Zeghbroeck","doi":"10.1109/LECHPD.2002.1146750","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146750","url":null,"abstract":"We report on the progress towards a silicon carbide (SiC) bipolar transistor aimed at operation at RF frequencies up to 3 GHz. Devices with a 5 /spl mu/m emitter stripe width were fabricated and tested on-chip with cascade probes and an HP8510C network analyzer. These devices have an f/sub t//f/sub max/ of 0.6/0.2GHz. To best of our knowledge the devices represent a first demonstration of an RF 4H-SiC BJT.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116279790","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Evaluation of interfaces in narrow InAs/AlSb quantum wells 窄InAs/AlSb量子阱中界面的评价
Proceedings. IEEE Lester Eastman Conference on High Performance Devices Pub Date : 2002-08-06 DOI: 10.1109/LECHPD.2002.1146754
J. Tang, D.C. Larrabee, B. Brinson, G. Khodaparast, J. Kono, K. Ueda, Y. Nakajima, O. Suekane, S. Sasa, M. Inoue, K. Kolokolov, J. Li, C. Ning
{"title":"Evaluation of interfaces in narrow InAs/AlSb quantum wells","authors":"J. Tang, D.C. Larrabee, B. Brinson, G. Khodaparast, J. Kono, K. Ueda, Y. Nakajima, O. Suekane, S. Sasa, M. Inoue, K. Kolokolov, J. Li, C. Ning","doi":"10.1109/LECHPD.2002.1146754","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146754","url":null,"abstract":"InAs/AlSb quantum wells may be grown with two types of interfaces: InSb-like and AlAs-like. The interface type refers to the half-monolayer of the well material and half monolayer of barrier which are in contact. The type and quality of the quantum well interface is critical to the ISBT intensity and lineshape and, to a lesser extent, position. In addition to FTIR spectroscopy of the ISBT, we have performed transmission electron microscopy (TEM) to directly evaluate the quality of the interfaces at the atomic level. In order to evaluate the effects of interface type and quality on ISBT intensity, lineshape, and linewidth, we studied the TEM of a 10 nm QW sample with InSb-InSb interfaces and a 3 nm QW sample with InSb-AlAs interfaces.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"136 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125703438","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Ge incorporation in SiC and the effects on device performance SiC中掺入锗及其对器件性能的影响
Proceedings. IEEE Lester Eastman Conference on High Performance Devices Pub Date : 2002-08-06 DOI: 10.1109/LECHPD.2002.1146751
K.J. Roe, M. Dashiell, G. Xuan, E. Ansorge, G. Katulka, N. Sustersic, X. Zhang, J. Kolodzey
{"title":"Ge incorporation in SiC and the effects on device performance","authors":"K.J. Roe, M. Dashiell, G. Xuan, E. Ansorge, G. Katulka, N. Sustersic, X. Zhang, J. Kolodzey","doi":"10.1109/LECHPD.2002.1146751","DOIUrl":"https://doi.org/10.1109/LECHPD.2002.1146751","url":null,"abstract":"Silicon carbide has been given much attention as a promising material for use in high-voltage and high-power devices. The absence of closely lattice-matched materials precludes the existence of heterostructure devices with good properties. The availability of a lattice-matched heterojunction partner should allow for new SiC-based devices that can exploit the heterojunction band offsets to enhance device properties. Silicon-carbide:germanium (SiC:Ge) alloys were formed by ion implantation of Ge into 4H-SiC wafers at 1000/spl deg/C. We have observed the resultant SiC:Ge material to have favorable properties, such as good crystal structure, interface quality and electrical characteristics. Diodes and bipolar transistors have been fabricated using these layers. These devices have been characterized for properties including forward current density and transistor gain. In this paper we report on the effects of Ge incorporation on devices formed using SiC:Ge layers.","PeriodicalId":137839,"journal":{"name":"Proceedings. IEEE Lester Eastman Conference on High Performance Devices","volume":"24 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123812837","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
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