Ge incorporation in SiC and the effects on device performance

Abstract

Silicon carbide has been given much attention as a promising material for use in high-voltage and high-power devices. The absence of closely lattice-matched materials precludes the existence of heterostructure devices with good properties. The availability of a lattice-matched heterojunction partner should allow for new SiC-based devices that can exploit the heterojunction band offsets to enhance device properties. Silicon-carbide:germanium (SiC:Ge) alloys were formed by ion implantation of Ge into 4H-SiC wafers at 1000/spl deg/C. We have observed the resultant SiC:Ge material to have favorable properties, such as good crystal structure, interface quality and electrical characteristics. Diodes and bipolar transistors have been fabricated using these layers. These devices have been characterized for properties including forward current density and transistor gain. In this paper we report on the effects of Ge incorporation on devices formed using SiC:Ge layers.