IEEE Journal of the Electron Devices Society最新文献

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Improvement of MoS2 Film Quality by Low Flux of Sputtered Particles Using a Molybdenum Grid 低通量溅射钼栅改善MoS2薄膜质量
IF 2 3区 工程技术
IEEE Journal of the Electron Devices Society Pub Date : 2024-11-20 DOI: 10.1109/JEDS.2024.3502922
Shinya Imai;Ryo Ono;Iriya Muneta;Kuniyuki Kakushima;Tetsuya Tatsumi;Shigetaka Tomiya;Kazuo Tsutsui;Hitoshi Wakabayashi
{"title":"Improvement of MoS2 Film Quality by Low Flux of Sputtered Particles Using a Molybdenum Grid","authors":"Shinya Imai;Ryo Ono;Iriya Muneta;Kuniyuki Kakushima;Tetsuya Tatsumi;Shigetaka Tomiya;Kazuo Tsutsui;Hitoshi Wakabayashi","doi":"10.1109/JEDS.2024.3502922","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3502922","url":null,"abstract":"Lowering the flux of sputtered particles using a molybdenum grid reduced the deposition rate of MoS2 films with an enlargement of the grain size measured by in-plane X-ray diffraction. The MoS2 film crystallinity evaluated by the Raman spectroscopy was improved because the S/Mo ratio was also enhanced by the low-rate sputtering. In addition, the enhancement of the grain size was confirmed from plan-view TEM observations of MoS2 films, consistent with the in-plane XRD results. Therefore, reducing the particle flux during sputtering is expected to contribute to the better-quality MoS2 films for pn-stacked 2D-CMOS devices and human interface devices.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"15-23"},"PeriodicalIF":2.0,"publicationDate":"2024-11-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10758789","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142938367","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low-Temperature Deuterium Annealing for HfO₂/SiO₂ Gate Dielectric in Silicon MOSFETs 硅mosfet中hfo2 / sio2栅介电介质的低温氘退火
IF 2 3区 工程技术
IEEE Journal of the Electron Devices Society Pub Date : 2024-11-20 DOI: 10.1109/JEDS.2024.3502738
Tae-Hyun Kil;Ju-Won Yeon;Hyo-Jun Park;Moon-Kwon Lee;Eui-Cheol Yun;Min-Woo Kim;Sang-Min Kang;Jun-Young Park
{"title":"Low-Temperature Deuterium Annealing for HfO₂/SiO₂ Gate Dielectric in Silicon MOSFETs","authors":"Tae-Hyun Kil;Ju-Won Yeon;Hyo-Jun Park;Moon-Kwon Lee;Eui-Cheol Yun;Min-Woo Kim;Sang-Min Kang;Jun-Young Park","doi":"10.1109/JEDS.2024.3502738","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3502738","url":null,"abstract":"In this study, low-temperature deuterium annealing (LTDA) at 300 °C is proposed to enhance both the performance and reliability of silicon-based high-k metal gate (HKMG) MOSFETs. A comparative study with hydrogen (H2) annealing under identical conditions is conducted to evaluate the specific impact of deuterium (D2). Comprehensive DC characterizations and evaluations of stress immunity under hot-carrier injection (HCI) and positive bias stress (PBS) conditions, are performed. The results confirm that even at a low temperature of 300 °C, D2 has a more substantial effect on device performance and reliability compared to H2. This study provides a guideline for reducing the annealing temperature in the fabrication of HKMG MOSFETs.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"1030-1033"},"PeriodicalIF":2.0,"publicationDate":"2024-11-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10758816","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142753873","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Multiple 3D-Printed Miniaturized Microbial Fuel Cells With Embedded Electrodes Optimized by Sustainable and Synergistic Perovskites Materials 利用可持续和协同增效的 Perovskites 材料优化嵌入式电极的多种 3D 打印微型微生物燃料电池
IF 2 3区 工程技术
IEEE Journal of the Electron Devices Society Pub Date : 2024-11-11 DOI: 10.1109/JEDS.2024.3492114
Yuvraj Maphrio Mao;Khairunnisa Amreen;Sanket Goel
{"title":"Multiple 3D-Printed Miniaturized Microbial Fuel Cells With Embedded Electrodes Optimized by Sustainable and Synergistic Perovskites Materials","authors":"Yuvraj Maphrio Mao;Khairunnisa Amreen;Sanket Goel","doi":"10.1109/JEDS.2024.3492114","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3492114","url":null,"abstract":"Miniaturized Microbial Fuel Cells (MMFCs) are the focus of this research, aimed at enhancing microscale power generation in Single Chambered Microbial Fuel Cells (SMFCs). The study involves the development of two 3D-printed conductive devices using a Fused Deposition Modeling approach with polylactic acid (PLA). These devices feature inbuilt electrodes coated with piezoelectric materials. The research addresses key challenges, including low power output and voltage reversal, achieving power outputs of \u0000<inline-formula> <tex-math>$8.72~mu $ </tex-math></inline-formula>\u0000W/cm2 for Conductive Device I and \u0000<inline-formula> <tex-math>$1.05~mu $ </tex-math></inline-formula>\u0000W/cm2 for Conductive Device II. The incorporation of assistance electrodes demonstrates potential in mitigating voltage reversal and improving SMFC efficiency.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"1021-1029"},"PeriodicalIF":2.0,"publicationDate":"2024-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10750036","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142672128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Global Shutter and Charge Binning With Quantum Dots Photodiode Arrays for NIR Imaging 利用量子点光电二极管阵列进行全局快门和电荷分选以实现近红外成像
IF 2 3区 工程技术
IEEE Journal of the Electron Devices Society Pub Date : 2024-11-04 DOI: 10.1109/JEDS.2024.3489672
Loïc Baudoin;Arthur Arnaud;Sébastien Massenot;Pierre Magnan
{"title":"Global Shutter and Charge Binning With Quantum Dots Photodiode Arrays for NIR Imaging","authors":"Loïc Baudoin;Arthur Arnaud;Sébastien Massenot;Pierre Magnan","doi":"10.1109/JEDS.2024.3489672","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3489672","url":null,"abstract":"New applications like depth measurements or multispectral imaging require to develop image sensors able to sense efficiently in the Near Infrared and Short-Wave Infrared where silicon is weakly sensitive. Colloidal Quantum Dots (CQD) technology is an interesting candidate to address these new applications as it allows to develop image sensors with high quantum efficiency at excitonic peak and high-resolution images. In this paper, we present an electrical model describing the electrical behavior of a designed and manufactured CQD photodiode. We use this model to explore a different architecture collecting holes instead of electrons. This architecture allows to control the charge collection inside the CQD thin film through the electric field. This property enables to implement global shutter functionality, to bin charges from several photodiodes, or to operate two physically interleaved photodiodes arrays alternatively with different types of pixel circuitries. These operating modes extend the capabilities of CQD image sensors in terms of applications.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"1011-1020"},"PeriodicalIF":2.0,"publicationDate":"2024-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10742005","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142645507","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The Implementation of a High-Performance Glucose Biosensor Based on Differential EGFET and Chopper Amplifier 基于差分 EGFET 和斩波放大器的高性能葡萄糖生物传感器的实现
IF 2 3区 工程技术
IEEE Journal of the Electron Devices Society Pub Date : 2024-10-30 DOI: 10.1109/JEDS.2024.3488367
Po-Yu Kuo;Chi-Han Liao;Jung-Chuan Chou;Chih-Hsien Lai;Yu-Hsun Nien;Po-Hui Yang;Ming-Tai Hsu;Cheng-Chun Lien;Wei-Shun Chen;Jyun-Ming Huang;Yu-Wei Chen
{"title":"The Implementation of a High-Performance Glucose Biosensor Based on Differential EGFET and Chopper Amplifier","authors":"Po-Yu Kuo;Chi-Han Liao;Jung-Chuan Chou;Chih-Hsien Lai;Yu-Hsun Nien;Po-Hui Yang;Ming-Tai Hsu;Cheng-Chun Lien;Wei-Shun Chen;Jyun-Ming Huang;Yu-Wei Chen","doi":"10.1109/JEDS.2024.3488367","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3488367","url":null,"abstract":"In this paper, a new architecture for glucose biosensors is proposed, which adopts a Chopper amplifier instead of a conventional instrumentation amplifier (INA) and differential extended gate field effect transistor (EGFET) as the input stage. The architecture effectively suppresses low-frequency noises such as flicker noise and significantly improves signal quality while reducing power consumption and layout area. The simulation results indicate that when the chopper frequency is set to 5 kHz, the chopper amplifier effectively reduces the output-referred noise at 1 Hz from 20.01 \u0000<inline-formula> <tex-math>$mu$ </tex-math></inline-formula>\u0000V/ \u0000<inline-formula> <tex-math>$surd$ </tex-math></inline-formula>\u0000Hz to 394 nV/ \u0000<inline-formula> <tex-math>$surd$ </tex-math></inline-formula>\u0000Hz. In the experimental part, we fabricated a glucose biosensor containing a RuO2 sensing film, and analyzed the surface morphology of the sensor’s working electrode by scanning electron microscopy (SEM) and atomic force microscopy (AFM). The experimental results showed that the biosensor exhibited good linearity (0.998) and sensitivity (82.83 mV/mM) over the glucose concentration range of 3 mM to 7 mM. In addition, the modulation and demodulation capabilities of the Chopper amplifier were verified through Hspice simulations and real-world tests, and it was confirmed to be effective in reducing noise.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"1003-1010"},"PeriodicalIF":2.0,"publicationDate":"2024-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10738382","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142645392","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
AlGaN/GaN High Electron Mobility Transistor Amplifier for High-Temperature Operation 用于高温运行的氮化铝/氮化镓高电子迁移率晶体管放大器
IF 2 3区 工程技术
IEEE Journal of the Electron Devices Society Pub Date : 2024-10-28 DOI: 10.1109/JEDS.2024.3486454
Pingyu Cao;Kepeng Zhao;Harm Van Zalinge;Ping Zhang;Miao Cui;Fei Xue
{"title":"AlGaN/GaN High Electron Mobility Transistor Amplifier for High-Temperature Operation","authors":"Pingyu Cao;Kepeng Zhao;Harm Van Zalinge;Ping Zhang;Miao Cui;Fei Xue","doi":"10.1109/JEDS.2024.3486454","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3486454","url":null,"abstract":"This paper presents a high gain voltage amplifier based on AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) with monolithically integrated enhancement-mode (E-mode) and depletion-mode (D-mode) devices. The GaN amplifier consists of differential pair based on E-mode devices, active loads based on D-mode devices and a current source, and the influence of the current source on voltage gain was evaluated. The proposed amplifier demonstrates a high gain and high unity-gain frequency at both room temperature (25 °C) and high-temperature (250 °C). The gain is 37.4 dB at room temperature, slightly decreasing to 32.7 dB when the temperature rises to 250 °C. Moreover, the power consumption reported in this work is decreased to 60 mW by reducing the static current, and the chip area of this work is reduced to \u0000<inline-formula> <tex-math>$2.806{times 10^{5}mu {mathrm { m^{2}}}}$ </tex-math></inline-formula>\u0000. These results indicate that the proposed amplifier is suitable for small signal sensing or driving circuits, which would promise high power density for GaN-on-Si integration circuits with high-temperature operation.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"981-987"},"PeriodicalIF":2.0,"publicationDate":"2024-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10737042","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142595884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Direct Extraction Methods for RF Characterization of Extrinsic Parasitic Parameters in 28 nm FDSOI MOSFETs Up to 110 GHz 用于射频表征 28 纳米 FDSOI MOSFET 外在寄生参数(频率高达 110 GHz)的直接提取方法
IF 2 3区 工程技术
IEEE Journal of the Electron Devices Society Pub Date : 2024-10-28 DOI: 10.1109/JEDS.2024.3486736
Xuejing Yang;Kyounghoon Yang
{"title":"Direct Extraction Methods for RF Characterization of Extrinsic Parasitic Parameters in 28 nm FDSOI MOSFETs Up to 110 GHz","authors":"Xuejing Yang;Kyounghoon Yang","doi":"10.1109/JEDS.2024.3486736","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3486736","url":null,"abstract":"In this paper, we report on newly introduced direct extraction methods applied for determining the extrinsic parasitic capacitances and inductances in RF test structures of Fully-Depleted-Silicon-On-Insulator (FDSOI) MOSFETs with a 28 nm gate length. Our approach leverages dummy structures and employs closed-form extraction techniques for precise parasitic parameter determination. Notably, we apply the closed-form extraction strategy for the first time to quantify the parasitic inductances of RF FDSOI-MOSFETs. To verify the accuracy of our extraction results based on a direct approach without optimization, we perform error analysis by comparing the modeled S-parameters of the small signal equivalent circuit to the measured results. Good agreement between the modeled and measured results not only at the cold bias but also at the saturation-mode operation region is achieved up to 110 GHz.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"993-1002"},"PeriodicalIF":2.0,"publicationDate":"2024-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10736559","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142595833","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Experimental Comparison of HfO2/X-Based ReRAM Devices Switching Properties by the MIM Capacitance MIM电容对基于HfO2/ x的ReRAM器件开关性能的实验比较
IF 2 3区 工程技术
IEEE Journal of the Electron Devices Society Pub Date : 2024-10-24 DOI: 10.1109/JEDS.2024.3485622
Fernando José da Costa;Aseel Zeinati;Renan Trevisoli;Durga Misra;Rodrigo Trevisoli Doria
{"title":"Experimental Comparison of HfO2/X-Based ReRAM Devices Switching Properties by the MIM Capacitance","authors":"Fernando José da Costa;Aseel Zeinati;Renan Trevisoli;Durga Misra;Rodrigo Trevisoli Doria","doi":"10.1109/JEDS.2024.3485622","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3485622","url":null,"abstract":"The objective of this work is to present a comparison of the switching properties in Resistive Random-Access-Memory between two different switching layer devices through the capacitance measurements. The analysis was carried out in two devices with different insulating layers, one composed of H-plasma-treated <inline-formula> <tex-math>${mathrm { HfO}}_{2}$ </tex-math></inline-formula> and another with a stoichiometric HfO2. The device with a higher quantity of oxygen vacancy-related defects in the insulator (HfO2 w/trt) presents a wider spread of the capacitance with the application of a range of varying pulse widths. An increase in the capacitance from 3.904 to 3.917 pF/<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>m2 was observed for the same device when it was subjected to a <inline-formula> <tex-math>$144~mu $ </tex-math></inline-formula>s pulse width, demonstrating a conductance quantization required for the application in in-memory computing systems. Also, the dielectric constant modulates due to the migration of oxygen atoms inside the device’s insulator.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"1037-1043"},"PeriodicalIF":2.0,"publicationDate":"2024-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10734138","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142992883","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The Effect of Ferroelectric/Dielectric Capacitance Ratio on Short-Term Retention Characteristics of MFMIS FeFET 铁电/电介质电容比对 MFMIS FeFET 短期保持特性的影响
IF 2 3区 工程技术
IEEE Journal of the Electron Devices Society Pub Date : 2024-10-24 DOI: 10.1109/JEDS.2024.3485869
Junghyeon Hwang;Giuk Kim;Hongrae Joh;Jinho Ahn;Sanghun Jeon
{"title":"The Effect of Ferroelectric/Dielectric Capacitance Ratio on Short-Term Retention Characteristics of MFMIS FeFET","authors":"Junghyeon Hwang;Giuk Kim;Hongrae Joh;Jinho Ahn;Sanghun Jeon","doi":"10.1109/JEDS.2024.3485869","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3485869","url":null,"abstract":"Metal-ferroelectric-metal-insulator-semiconductor (MFMIS) FeFETs have significant potential for use in non-volatile memory applications. This is primarily due to their compatibility with CMOS technology and reliable switching characteristics. Previous studies have primarily concentrated on the endurance and memory window properties, while this study focuses on the short-term (<\u0000<inline-formula> <tex-math>$1~mu $ </tex-math></inline-formula>\u0000s) retention region of MFMIS FeFETs. Specifically, we examine the impact of the capacitance ratio of the ferroelectric capacitor (CFE) and the MOS capacitor (CDE) on short-term retention. Additionally, we conducted simulations to validate the experimental observations and investigate the interaction of the depolarization field with the charge trapping and polarization of the MFMIS structure. This study emphasizes the crucial role of controlling the CDE: \u0000<inline-formula> <tex-math>${mathrm { C}}_{mathrm { FE}}$ </tex-math></inline-formula>\u0000 ratio in enhancing the short-term retention of MFMIS FeFETs. Its findings enhance our understanding of short-term retention mechanisms and provide a pathway for improving performance and functionality in non-volatile memory technology design.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"988-992"},"PeriodicalIF":2.0,"publicationDate":"2024-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10734331","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142595930","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Non Quasi-Static Model of DG Junctionless FETs DG 无结场效应晶体管的非准静态模型
IF 2 3区 工程技术
IEEE Journal of the Electron Devices Society Pub Date : 2024-10-18 DOI: 10.1109/JEDS.2024.3483299
Mohammad Bavir;Abdollah Abbasi;Ali Asghar Orouji;Farzan Jazaeri;Jean-Michel Sallese
{"title":"Non Quasi-Static Model of DG Junctionless FETs","authors":"Mohammad Bavir;Abdollah Abbasi;Ali Asghar Orouji;Farzan Jazaeri;Jean-Michel Sallese","doi":"10.1109/JEDS.2024.3483299","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3483299","url":null,"abstract":"In this paper an analytical non-quasi-static (NQS) model for long-channel symmetric double-gate junctionless field-effect transistors (JLFETs) operating in depletion mode is proposed for the first time. The model addresses the limitations of existing DC and AC models by incorporating time-dependent current continuity equations which are essentials to predict JLFETs behavior at high frequencies. Leveraging charge-based equations, the NQS model captures the delay between current and applied potentials arising beyond the quasi-static regime. Analytical solutions for small-signal perturbations allow the calculation of key transistor small signal parameters such as the gate transadmittance. The model’s validity is tested against TCAD simulations for various device parameters, including doping concentration and channel thickness. Good agreement between the model and TCAD simulations is observed across a wide frequency range, up to highly non-static transport conditions. This work lays the foundation for a comprehensive RF model of JLFETs for high-frequency applications.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"974-980"},"PeriodicalIF":2.0,"publicationDate":"2024-10-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10722036","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142587499","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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