IEEE Journal of the Electron Devices Society最新文献_第2页

Silicon Dioxide Ring Innovations in TSV Structures: Analysis of Thermal-Mechanical and Signal Integrity for 3-D Chip Applications 二氧化硅环在TSV结构中的创新：三维芯片应用的热机械和信号完整性分析

IF 2.4 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2025-07-28 DOI: 10.1109/JEDS.2025.3592893

Kaihong Hou;Zhengwei Fan;Yonggui Chen;Shufeng Zhang;Yashun Wang;Xun Chen

{"title":"Silicon Dioxide Ring Innovations in TSV Structures: Analysis of Thermal-Mechanical and Signal Integrity for 3-D Chip Applications","authors":"Kaihong Hou;Zhengwei Fan;Yonggui Chen;Shufeng Zhang;Yashun Wang;Xun Chen","doi":"10.1109/JEDS.2025.3592893","DOIUrl":"https://doi.org/10.1109/JEDS.2025.3592893","url":null,"abstract":"Through-silicon via (TSV) as a crucial interconnection microstructure in three-dimensional (3D) chip, have significantly enhanced device performance and reliability. However, the increasing interconnect density and operating frequency now pose substantial threats to TSVs’ thermal-mechanical and signal transmission reliability, leading to a reduction in the overall reliability of 3D chip. In this study, a novel TSV with silicon dioxide ring (SDR) structure is proposed, its anti-current leakage performance and transmission performance are proved to be superior than traditional TSV and their derivative. On the basis, the equivalent circuit model of the proposed TSV is established, and the influence of the location, height and thickness of SDR on the thermal-mechanical performance and signal integrity of the new TSV is deeply investigated through thermomechanical analysis, electromagnetic analysis and field-circuit collaborative analysis. Results show that SDR’s position, thickness, and height mainly affect TSV’s thermal stress distribution by changing the area enclosed by the SDR and the volume of the SDR itself, transverse thermal conductivity, and the heat storage capacity. A moderate increase in the distance between SDR and the Cu column can enhance insertion loss in direct current (DC) condition. The inner diameter, thickness and height of SDR have different influence mechanisms on the integrity of TSV. These findings provide valuable guidance for TSV optimization and reliability analysis.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"937-946"},"PeriodicalIF":2.4,"publicationDate":"2025-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11098466","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144852700","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

The Response Frequency of Interface Traps Using a Dual-Frequency Charge-Pumping Method and Its Correlation With 1/f Noise 双频电荷泵浦法界面阱的响应频率及其与1/f噪声的相关性

IF 2.4 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2025-07-28 DOI: 10.1109/JEDS.2025.3593374

Yi Jiang;Luping Wang;Kai Chen;Rui Su;Luyu Yang;Dawei Gao;Junkang Li;Ran Cheng;Rui Zhang

{"title":"The Response Frequency of Interface Traps Using a Dual-Frequency Charge-Pumping Method and Its Correlation With 1/f Noise","authors":"Yi Jiang;Luping Wang;Kai Chen;Rui Su;Luyu Yang;Dawei Gao;Junkang Li;Ran Cheng;Rui Zhang","doi":"10.1109/JEDS.2025.3593374","DOIUrl":"https://doi.org/10.1109/JEDS.2025.3593374","url":null,"abstract":"This study shows a novel dual-frequency charge-pumping method, developed to quantitatively characterize the frequency response characteristics of interface traps at the HfO2/Si interface. The response frequency of the interface traps (<inline-formula> <tex-math>$f_{it}$ </tex-math></inline-formula>), or their capture/emission time, has been accurately evaluated in the range of 5-100 MHz across different energy levels by modulating the charge-pumping voltage waveforms. The analysis of <inline-formula> <tex-math>$f_{it}$ </tex-math></inline-formula> provides valuable insights into the 1/f noise behavior of MOS devices, as confirmed by the observed correlation between 1/f noise and <inline-formula> <tex-math>$f_{it}$ </tex-math></inline-formula> in the typical HfO2/Si n-MOSFETs. Additionally, it was found that the gate oxide traps are predominantly generated at a distance of 0.45 nm away from the HfO2/Si interface, and at an energy of 0.33 eV below conduction band minimum (<inline-formula> <tex-math>$E_{c}$ </tex-math></inline-formula>), under a PBTI stress.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"947-953"},"PeriodicalIF":2.4,"publicationDate":"2025-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11098707","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144853509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Retention Characteristics and DMP Efficiency in V-NAND With Dimple Structure 凹槽结构V-NAND的保留特性和DMP效率

IF 2.4 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2025-07-16 DOI: 10.1109/JEDS.2025.3589680

Seongwoo Kim;Gunwook Yoon;Seungjae Baik;Myounggon Kang

{"title":"Retention Characteristics and DMP Efficiency in V-NAND With Dimple Structure","authors":"Seongwoo Kim;Gunwook Yoon;Seungjae Baik;Myounggon Kang","doi":"10.1109/JEDS.2025.3589680","DOIUrl":"https://doi.org/10.1109/JEDS.2025.3589680","url":null,"abstract":"In this paper, we analyze the retention characteristics of vertical NAND(V-NAND) with dimpled (convex and concave) structures considering the impact of adjacent cell states. Additionally, we assess the efficiency of the previously proposed dummy cell program (DMP) in improving retention characteristics. Our results indicate that when the adjacent cell is in the erased state, the retention characteristics of the target cell are affected by conduction band <inline-formula> <tex-math>$(E_{C})$ </tex-math></inline-formula> variations due to trapped electrons. The concave structure shows the best retention characteristics, whereas the convex structure shows the most degradation. This difference becomes even more pronounced when the adjacent cell is in the programmed state. However, when DMP is applied to the convex structure, which exhibits the most degraded retention characteristics, the greatest improvement is observed due to significant changes in channel potential <inline-formula> <tex-math>$(V_{ch})$ </tex-math></inline-formula> caused by the fast-programming speed.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"655-658"},"PeriodicalIF":2.4,"publicationDate":"2025-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11082327","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144758208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Performance Optimization of β-Ga₂O₃-Based Solar-Blind Photodetector by Introducing an Ultra-Thin Sn-Doped High Conductivity Layer 引入超薄掺锡高导层优化β-Ga₂O₃基太阳盲光电探测器性能

IF 2 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2025-07-16 DOI: 10.1109/JEDS.2025.3583305

Bin Yin;Weizhe Cui;Chuanhan Lin;Shihao Fu;Aidong Shen;Bingsheng Li

{"title":"Performance Optimization of β-Ga₂O₃-Based Solar-Blind Photodetector by Introducing an Ultra-Thin Sn-Doped High Conductivity Layer","authors":"Bin Yin;Weizhe Cui;Chuanhan Lin;Shihao Fu;Aidong Shen;Bingsheng Li","doi":"10.1109/JEDS.2025.3583305","DOIUrl":"https://doi.org/10.1109/JEDS.2025.3583305","url":null,"abstract":"The metal/semiconductor (M/S) contact plays a crucial role in carrier collection efficiency and is a key factor in photoelectric conversion. To optimize the M/S contact of Al and <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga2O3, several annealing procedures were explored, including low-temperature annealing, direct Sn layer deposition, and face-to-face annealing. Among these methods, the <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga2O3-based solar-blind photodetector fabricated using face-to-face annealing—incorporating an ultra-thin Sn-doped high-conductivity layer—demonstrated superior performance. This device achieved an exceptionally high light-to-dark current ratio of <inline-formula> <tex-math>$1.71times 10{^{{8}}}$ </tex-math></inline-formula>, with a responsivity of 14.13 A/W and a detectivity of <inline-formula> <tex-math>$1.87times 10^{16}$ </tex-math></inline-formula> Jones at a 10 V bias under 255 nm irradiation (<inline-formula> <tex-math>$23.75~mu $ </tex-math></inline-formula>w/cm2 light intensity). Additionally, it is capable of providing quick signal feedback, with a decay time of 2.81 ms/72.46 ms. The enhanced performance of the face-to-face annealing method is attributed to the formation of a more uniform ultra-thin Sn-doped conductive layer. This layer effectively lowers the barrier height at the M/S interface, improves carrier migration, and reduces contact resistance. These findings highlight that interface engineering through Sn-doped conductive layers is a promising strategy for optimizing the performance of <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga2O3-based photodetectors.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"577-581"},"PeriodicalIF":2.0,"publicationDate":"2025-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11082297","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144687625","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Ternary CMOS Compact Model for Low Power On-Chip Memory Applications 低功耗片上存储器应用的三元CMOS紧凑模型

IF 2.4 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2025-07-15 DOI: 10.1109/JEDS.2025.3588398

Young-Eun Choi;Woo-Seok Kim;Myoung Kim;Junyoung Park;Min Woo Ryu;Kyung Rok Kim

引用次数: 0

Defects Passivation and Performance Enhancement of AlGaN/GaN HEMTs by Supercritical Hydrogen Treatment 超临界氢处理AlGaN/GaN hemt的缺陷钝化及性能增强

IF 2.4 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2025-07-15 DOI: 10.1109/JEDS.2025.3589195

J. K. Lian;Y. Q. Chen;C. Liu;X. Y. Zhang

{"title":"Defects Passivation and Performance Enhancement of AlGaN/GaN HEMTs by Supercritical Hydrogen Treatment","authors":"J. K. Lian;Y. Q. Chen;C. Liu;X. Y. Zhang","doi":"10.1109/JEDS.2025.3589195","DOIUrl":"https://doi.org/10.1109/JEDS.2025.3589195","url":null,"abstract":"In this paper, supercritical hydrogen treatment is used to passivate the defects of normally-on type AlGaN/GaN high electron mobility transistors. By comparing the electrical characteristics of devices before and after the experiment, the treated devices have shown larger on-state current, a negative shift of threshold voltage and shorter gate-lag. In addition, the reliability of the devices before and after treatment is tested by applying a DC reverse bias stress to the gate and the result indicates that the treated devices show less degradation after RB stress. At the same time, through the low-frequency noise test, it is further verified that the defect density near the 2DEG channel reduced from <inline-formula> <tex-math>$1.25 times 10^{20}~ {mathrm {cm}}^{-3}{mathrm {eV}}^{-1}$ </tex-math></inline-formula> to <inline-formula> <tex-math>$8.94 times 10^{18}~ {mathrm {cm}}^{-3}{mathrm {eV}}^{-1}$ </tex-math></inline-formula>. Based on the above results, a physical model is proposed to demonstrate the passivation mechanism. The original passivation layer and AlGaN barrier layer have many dangling bond defects that can capture electrons and cause virtual gate effect. Supercritical hydrogen penetrates into the material substrate and passivates the dangling bonds. The result of this experiment provides a significant reference for the research of improving the reliability of AlGaN/GaN HEMTs.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"625-629"},"PeriodicalIF":2.4,"publicationDate":"2025-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11080297","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144739820","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Phenomenological Modeling on the Nonideal Factors of Memristor Based on Single-Crystalline LiNbO₃ Thin Film 基于单晶LiNbO₃薄膜的忆阻器非理想因子的现象学建模

IF 2.4 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2025-07-14 DOI: 10.1109/JEDS.2025.3588862

Yi Wang;Xinqiang Pan;Qin Xie;Junde Tong;Yao Shuai;Wenbo Luo;Chuangui Wu;Wanli Zhang

{"title":"Phenomenological Modeling on the Nonideal Factors of Memristor Based on Single-Crystalline LiNbO₃ Thin Film","authors":"Yi Wang;Xinqiang Pan;Qin Xie;Junde Tong;Yao Shuai;Wenbo Luo;Chuangui Wu;Wanli Zhang","doi":"10.1109/JEDS.2025.3588862","DOIUrl":"https://doi.org/10.1109/JEDS.2025.3588862","url":null,"abstract":"As a novel device, memristors attracted great attention because of its potential in neural network computing. However, the nonideal factors of memristors, such as conductance drift and programming errors, limit their performance in practical applications. Single-crystalline LiNbO₃ thin film memristor (LN memristor) exhibited good characteristics for neural network computing, but few work about the nonideal factors of the memristor has been reported. This work aims to model these nonideal factors of the LN memristor and explore the influence of these nonideal factors on the memristor-based neural network computing. We extracted key nonideal parameters from the fabricated LN memristor and established the phenomenological model. The model results agree with the measured results, which proves the validity of the model. We embedded these models into the device simulation platform to evaluate the effects of different nonideal factors on memristor-based neural network. This study provides an efficient way to model the nonideal factors of the LN memristor, which can accurately capture the complex behavior of the LN memristor in practical applications. In addition, through the modelling and analysis, researchers can better understand the mechanism of the LN memristor, so as to optimize memristor design and improve memristor performance for the neural network computing.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"587-592"},"PeriodicalIF":2.4,"publicationDate":"2025-07-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11079929","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144725165","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

RESURF Ga2O3-on-SiC Field Effect Transistors for Enhanced Breakdown Voltage 用于提高击穿电压的复用Ga2O3-on-SiC场效应晶体管

IF 2 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2025-07-14 DOI: 10.1109/JEDS.2025.3584977

Junting Chen;Xiaohan Zhang;Junlei Zhao;Jin Wei;Mengyuan Hua

{"title":"RESURF Ga2O3-on-SiC Field Effect Transistors for Enhanced Breakdown Voltage","authors":"Junting Chen;Xiaohan Zhang;Junlei Zhao;Jin Wei;Mengyuan Hua","doi":"10.1109/JEDS.2025.3584977","DOIUrl":"https://doi.org/10.1109/JEDS.2025.3584977","url":null,"abstract":"Heterosubstrates have been extensively studied as a method to improve the heat dissipation of Ga2O3 devices. In this simulation work, we propose a novel role for p-type available heterosubstrates, as a component of a reduced surface field (RESURF) structure in Ga2O3 lateral field-effect transistors (FETs). The RESURF structure can eliminate the electric field crowding and contribute to higher breakdown voltage. Using SiC as an example, the designing strategy for doping concentration and dimensions of the p-type region is systematically studied using TCAD modeling. Meanwhile, the interface charges and Al2O3 interlayer that could exist in realistic devices are mimicked in the simulation. Additionally, the feasibility of the RESURF structure for high-frequency switching operation is supported by the simulation on charging/discharging time the p-SiC depletion region. This study demonstrates the great potential of utilizing the electrical properties of heat-dissipating heterosubstrates to achieve a uniform electric field distribution in Ga2O3 FETs.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"570-576"},"PeriodicalIF":2.0,"publicationDate":"2025-07-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11080126","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144671218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Compact Millimeter-Wave Single- and Dual-Band On-Chip Bandpass Filters Using GaAs Technology 采用砷化镓技术的紧凑型毫米波单频和双频片上带通滤波器

IF 2.4 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2025-07-14 DOI: 10.1109/JEDS.2025.3588470

Yongzheng Li;Xiaoyu Weng;Kai-Da Xu

引用次数: 0

Analytical Modeling for Off-State Lateral Electric Field and Breakdown Voltage of AlGaN/GaN HEMTs AlGaN/GaN hemt脱态横向电场和击穿电压的解析建模

IF 2.4 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2025-07-14 DOI: 10.1109/JEDS.2025.3588675

Soumen Deb;Amitava DasGupta;Nandita DasGupta

引用次数: 0