{"title":"Demonstration of a Re-Activatable Scandate Cathode for a High-Current Sheet Beam Electron Gun","authors":"Zhifang Lyu;Shengkun Jiang;Yasong Fan;Dejun Jin;Jibo Dong;Huarong Gong;Yubin Gong;Jiasong Wang;Pan Pan;Jinjun Feng;Zhaoyun Duan","doi":"10.1109/LED.2025.3599234","DOIUrl":"https://doi.org/10.1109/LED.2025.3599234","url":null,"abstract":"A re-activatable scandate cathode for a high-current sheet beam electron gun was demonstrated in experiment. The re-activatable scandate cathode was impregnated with high purity emission-active materials composed of <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ba2ScAlO5 and Ba3Al2O6, which were synthesized employing the polyacrylamide-assisted sol-gel method. The emission-active materials are essential for the scandate cathode to achieve low hygroscopicity and re-activatability. As a result, the re-activatable scandate cathode exhibits a low mass gain of only 0.005% after 1000 hours in air, and delivers an emission current density of 42 A/cm2 at 1140 °C. The high-performance scandate cathode was integrated into a compact sheet beam electron gun, which features a stepped elliptical focus electrode to enable anisotropic electrostatic compression. At a cathode temperature of 1140 °C and a beam voltage of 24.6 kV, the sheet beam electron gun yields a compressed sheet beam with a peak beam current of 189 mA. During three independent air-exposure, evacuation, and re-activation cycles, the beam current varied by no more than 5%. These findings confirm that the re-activatable scandate cathode is suitable for the high-current sheet beam electron gun.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 10","pages":"1869-1872"},"PeriodicalIF":4.5,"publicationDate":"2025-08-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145141733","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A High-Density 3-D Capacitor Using Through Glass Via Structure","authors":"Su-Geun Kim;Sung-Chai Yoo;Jeongwon Oh;Byung-Wook Min;Jong-Min Yook","doi":"10.1109/LED.2025.3599178","DOIUrl":"https://doi.org/10.1109/LED.2025.3599178","url":null,"abstract":"Glass substrates offer excellent properties for high-density package applications due to their low coefficient of thermal expansion, nanometer-scale surface flatness, and minimal dielectric loss. These characteristics make glass substrates well-suited for integrated passive devices. This study presents a high-density 3D via capacitor embedded in a glass substrate. The through-hole glass vias (TGVs) are conformally lined with a TiN/HfO2/TiN stack, using processes that are fully compatible with standard TGV fabrication techniques. The fabricated device exhibited an aspect ratio of 16:1 and achieved a measured capacitance of up to 9.7 nF within a <inline-formula> <tex-math>$275~mu $ </tex-math></inline-formula>m <inline-formula> <tex-math>$times 220~mu $ </tex-math></inline-formula>m area, corresponding to a capacitance density of 160.33 nF/mm2. Measured electrical performance included an ESR of 237 m <inline-formula> <tex-math>$Omega $ </tex-math></inline-formula> and a breakdown voltage of 6.31 ± 0.5 V, demonstrating its suitability for decoupling and power integrity applications.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 10","pages":"1920-1923"},"PeriodicalIF":4.5,"publicationDate":"2025-08-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145141651","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Novel P-bit Unit Based on VGSOT-MTJ for Reconfigurable Ising Machine With Fully Parallel Spin Updating Design","authors":"Wentao Huang;Kaili Zhang;Junlin Wang;Yu Liu;Bolin Zhang;Youguang Zhang;Weisheng Zhao;Lang Zeng;Deming Zhang","doi":"10.1109/LED.2025.3598983","DOIUrl":"https://doi.org/10.1109/LED.2025.3598983","url":null,"abstract":"The spin-based probabilistic bit (p-bit) built on magnetic tunnel junction (MTJ) provides a low power and low overhead solution for building high performance Ising machine (IM). In this work, we propose a novel p-bit device that integrates a voltage-controlled magnetic anisotropy (VCMA) MTJ biased by spin-orbit torque (SOT) voltage. The proposed p-bit achieves an energy consumption of approximately 33fJ/bit per operation. A synchronous Ising network utilizing this device demonstrates rapid convergence to near-ground-state solutions when solving a <inline-formula> <tex-math>${13}times {26}$ </tex-math></inline-formula>-vertex Max-Cut problem in simulation. Furthermore, a reconfigurable IM architecture, realized through the coupling of MTJ array, enables an all-spin Ising system capable of addressing various combinatorial optimization problems (COPs). The proposed IM system also exhibits functional reconfigurability among multiple invertible Boolean logic gates, achieving a peak accuracy of 95%. These results highlight the potential of the proposed p-bit as a promising building block for high-speed, low-power and universal Ising machines.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 10","pages":"1889-1892"},"PeriodicalIF":4.5,"publicationDate":"2025-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145141730","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jiacai Liao;Guoxiang Shu;Xinqiang Li;Binbin Shi;Shengtao Hong;Longshen Huang;Cunjun Ruan;Wenlong He
{"title":"Study of an Ultra-Wideband Sine-Shape Staggered Waveguide for a Terahertz Band Sheet Beam TWT","authors":"Jiacai Liao;Guoxiang Shu;Xinqiang Li;Binbin Shi;Shengtao Hong;Longshen Huang;Cunjun Ruan;Wenlong He","doi":"10.1109/LED.2025.3598920","DOIUrl":"https://doi.org/10.1109/LED.2025.3598920","url":null,"abstract":"A novel slow wave structure (SWS) featuring an innovative sine-shape staggered waveguide (SSW) and dual-mode operation has been developed for ultra-wideband sheet beam travelling wave tubes. In contrast to the double-staggered grating SWS, the SSW SWS is equivalent to reducing the grating height, enabling the broadening of the operational bandwidth while maintaining interaction impedance characteristics. Numerical simulations demonstrate exceptional broadband characteristics with <inline-formula> <tex-math>${S}_{{11}}$ </tex-math></inline-formula> below -15.3 dB and <inline-formula> <tex-math>${S}_{{21}}$ </tex-math></inline-formula> exceeding -8.5 dB across 237-324 GHz (87 GHz), achieving 31.0% fractional bandwidth. Cold-test results are consistent with the simulation results having considered fabrication tolerances, electromagnetic leakage, and surface roughness effects. PIC simulations predict good performance, achieving 65.0 W output power over a 76 GHz bandwidth (236-312 GHz, 27.8% fractional bandwidth), with a peak output power of 253.0 W at 250 GHz.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 10","pages":"1873-1876"},"PeriodicalIF":4.5,"publicationDate":"2025-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145141734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Yao Ni;Yumo Zhang;Jingjie Lin;Xingji Liu;Yue Yu;Lu Liu;Wei Zhong;Yayi Chen;Rongsheng Chen;Hoi Sing Kwok;Yuan Liu
{"title":"Transistor-Structured Artificial Dendrites for Spatiotemporally Correlated Reservoir Computing","authors":"Yao Ni;Yumo Zhang;Jingjie Lin;Xingji Liu;Yue Yu;Lu Liu;Wei Zhong;Yayi Chen;Rongsheng Chen;Hoi Sing Kwok;Yuan Liu","doi":"10.1109/LED.2025.3598823","DOIUrl":"https://doi.org/10.1109/LED.2025.3598823","url":null,"abstract":"Neuromorphic electronics, which integrate sensing, storage, and computing to boost efficiency and performance, offer a low-cost, energy-efficient alternative for temporal data processing with edge computing potential when applied to reservoir computing (RC). However, current neuromorphic RC systems struggle with diverse spatial information inputs due to device design limits. Here, we present the first artificial dendrite horizontally cascaded by Ga-Sn-O (GTO)-based synaptic transistors with efficient electron-ion coupled films as the gate dielectric. This design allows unlimited lateral gate expansion, source/drain and gate interchangeability, and sustains a microampere-level output current across a record centimeter-scale gate-channel distance. The artificial dendrite maintains stable weight modulation through <inline-formula> <tex-math>$10^{mathbf {{5}}}$ </tex-math></inline-formula> electrical cycles and <inline-formula> <tex-math>$10^{mathbf {{7}}}$ </tex-math></inline-formula> bending cycles, with performance restorable via dielectric film replacement. This work pioneers the demonstration of spatiotemporally correlated reservoir computing using artificial dendrites-based RC systems, achieving highly accurate recognition and introducing a new paradigm to the field.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 10","pages":"1881-1884"},"PeriodicalIF":4.5,"publicationDate":"2025-08-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145141643","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Bio-Inspired Ferroelectric Adaptive Transistors for Intelligent Vision Systems","authors":"Yongkai Liu;Aolin Yuan;Ruihong Yuan;Pei Liu;Zhe Qu;Kangli Xu;Jiajie Yu;Zhenhai Li;Jialin Meng;Hao Zhu;Qingqing Sun;David Wei Zhang;Tianyu Wang;Lin Chen","doi":"10.1109/LED.2025.3597286","DOIUrl":"https://doi.org/10.1109/LED.2025.3597286","url":null,"abstract":"To address the challenges of low data processing efficiency, spatiotemporal information separation, and high energy consumption in traditional machine vision systems, this work proposes a bio-inspired ferroelectric adaptive transistor based on annealing-free HZO ferroelectric films. The FeTFT achieves the lowest fabrication temperature while demonstrating exceptional performance with a high ON/OFF ratio of <inline-formula> <tex-math>${3}.{8}times {10} ^{{9}}$ </tex-math></inline-formula> and a large memory window of 2.86 V. The FeTFT exhibits bio-synaptic optoelectronic co-response characteristics and implements biological adaptive functions through dynamic reconfiguration of ferroelectric polarization. By constructing a fire vision system based on the spatiotemporal fusion mechanism, the FeTFT achieves 100% motion direction recognition accuracy and three-level speed classification capability. This research establishes a novel paradigm for developing low-power, dynamically adaptable bio-inspired intelligent vision systems.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 10","pages":"1901-1904"},"PeriodicalIF":4.5,"publicationDate":"2025-08-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145141644","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Power;M. Moras;A. Sokolov;C. Rohrbacher;X. Wu;S. V. Amitonov;I. Kriekouki;A. Aprà;P. Giounanlis;M. Asker;M. Harkin;P. Hanos-Puskai;P. Bisiaux;I. Bashir;D. Redmond;D. Leipold;R. B. Staszewski;B. Barry;N. Samkharadze;E. Blokhina
{"title":"Fully-Tunable Tunnel-Coupled Quantum Dots and Charge Sensing in a Commercial 22 nm FD-SOI Process","authors":"C. Power;M. Moras;A. Sokolov;C. Rohrbacher;X. Wu;S. V. Amitonov;I. Kriekouki;A. Aprà;P. Giounanlis;M. Asker;M. Harkin;P. Hanos-Puskai;P. Bisiaux;I. Bashir;D. Redmond;D. Leipold;R. B. Staszewski;B. Barry;N. Samkharadze;E. Blokhina","doi":"10.1109/LED.2025.3595384","DOIUrl":"https://doi.org/10.1109/LED.2025.3595384","url":null,"abstract":"Confining electrons or holes in quantum dots formed in the channel of industry-standard fully depleted silicon-on-insulator CMOS structures is a promising approach to scalable qubit architectures. In this communication, we present measurement results of a commercial nanostructure fabricated using the GlobalFoundries 22FDXTM industrial process. These quantum dots are formed in the device channel between polysilicon gates. We report precise control over inter-dot coupling, bias triangle formation, and single electron box sensing in a commercial process for the first time.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 10","pages":"1913-1916"},"PeriodicalIF":4.5,"publicationDate":"2025-08-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11107337","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145141648","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The Impact of Through Silicon Metal (TSM) Contact on Performance and Thermal Reliability in CFET","authors":"Yunho Shin;Been Kwak;Ilho Myeong;Daewoong Kwon","doi":"10.1109/LED.2025.3595404","DOIUrl":"https://doi.org/10.1109/LED.2025.3595404","url":null,"abstract":"This work proposes a common-drain engineering technique using Through-Silicon Metal (TSM) to improve electro-thermal performance in CFET architectures. After optimizing the Bottom Dielectric Isolation (BDI) thickness to 5 nm, the TSM-integrated CFET exhibits ~10% reduction in gate capacitance (Cgg: <inline-formula> <tex-math>$0.580to 0.537$ </tex-math></inline-formula> fF) and ~12.5% lower nFET thermal resistance (Rth: <inline-formula> <tex-math>$0.795to ~0.696$ </tex-math></inline-formula> K/<inline-formula> <tex-math>$mu $ </tex-math></inline-formula> W) compared to the reference. In the TSM structure, although the common drain-to-metal contact area is reduced, SNMR degradation remains minimal (~2 mV). In addition, device lifetime shows significant improvement, with BTI and HCI projections extended by <inline-formula> <tex-math>$sim 2times $ </tex-math></inline-formula> and <inline-formula> <tex-math>$sim 1.6times $ </tex-math></inline-formula>, respectively. These results demonstrate that TSM enables effective electro-thermal co-optimization for future CFET logic integration.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 10","pages":"1897-1900"},"PeriodicalIF":4.5,"publicationDate":"2025-08-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145141645","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Stress-Enhanced Ferroelectric Properties in Flexible Hf0.5Zr0.5O2 Devices With Low Thermal Budget","authors":"Qimiao Zeng;Wei Wang;Shuo Han;Chuanzhi Liu;Jindong Liu;Yi Sun;Lidan Wang;Hui Xu;Qingjiang Li;Rongrong Cao;Shukai Duan","doi":"10.1109/LED.2025.3595286","DOIUrl":"https://doi.org/10.1109/LED.2025.3595286","url":null,"abstract":"High-performance flexible HfO2-based ferroelectric devices with low thermal budget are essential for the large-scale integration and application of flexible electronic systems. In this work, the ferroelectricity of Hf0.5Zr0.5O2 (HZO) devices under a low annealing temperature of 400°C was enhanced by stress effect. Compared with Si-based HZO devices, flexible HZO devices exhibit a higher remanent polarization (Pr) value of <inline-formula> <tex-math>$28.5~mu $ </tex-math></inline-formula>C/cm2 and superior endurance, with only a 5.6% degradation in Pr after 1010 cycles. Furthermore, the flexible HZO devices were annealed under bending, resulting in an increased Pr value of <inline-formula> <tex-math>$31.4~mu $ </tex-math></inline-formula>C/cm2 and a reduced coercive field (2Ec) of 2.6 MV/cm. This work provides effective technical support for achieving high-performance flexible HZO devices.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 10","pages":"1885-1888"},"PeriodicalIF":4.5,"publicationDate":"2025-08-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145141729","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Wide Band Gap Semiconductors for Automotive Applications","authors":"","doi":"10.1109/LED.2025.3588288","DOIUrl":"https://doi.org/10.1109/LED.2025.3588288","url":null,"abstract":"","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 8","pages":"1444-1445"},"PeriodicalIF":4.1,"publicationDate":"2025-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11096961","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144705014","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}