IEEE Electron Device Letters最新文献

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Wideband On-Chip Bandpass Filter in GaAs IPD Technology With High Frequency Selectivity
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2024-11-25 DOI: 10.1109/LED.2024.3505198
Gang Zhang;Chenyang Yuan;Jinxuan Ni;Kam-Weng Tam;Wanchun Tang
{"title":"Wideband On-Chip Bandpass Filter in GaAs IPD Technology With High Frequency Selectivity","authors":"Gang Zhang;Chenyang Yuan;Jinxuan Ni;Kam-Weng Tam;Wanchun Tang","doi":"10.1109/LED.2024.3505198","DOIUrl":"https://doi.org/10.1109/LED.2024.3505198","url":null,"abstract":"This letter proposes a wideband high selective on-chip bandpass filter (BPF) implemented on GaAs substrate integrated passive device (IPD) technology. Introducing lumped elements outside the resonator and coupling them with the resonator can introduce three transmission zeros (TZs). These three TZs are elaborately generated to enhance frequency selectivity and improve stopband rejection level. Moreover, it leverages high-quality-factor lumped elements, significantly bolstering the circuit’s resonance capacity. When wideband performance is necessary, using the Chebyshev principle for design allows achieving the desired bandwidth. To validate this design approach, a BPF centered at 3.8 GHz was simulated, fabricated and measured using GaAs IPD technology, showing promising applications in integrated circuit designs.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 1","pages":"32-35"},"PeriodicalIF":4.1,"publicationDate":"2024-11-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142912442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
P-Type Ternary Logic MOSFET With Tunable Middle State Using Bidirectional Threshold Switching
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2024-11-25 DOI: 10.1109/LED.2024.3505154
Jeong-A Han;Jung-Woo Lee;Joon-Kyu Han;Do-Wan Kim;Do-Hoon Lee;Yang-Kyu Choi
{"title":"P-Type Ternary Logic MOSFET With Tunable Middle State Using Bidirectional Threshold Switching","authors":"Jeong-A Han;Jung-Woo Lee;Joon-Kyu Han;Do-Wan Kim;Do-Hoon Lee;Yang-Kyu Choi","doi":"10.1109/LED.2024.3505154","DOIUrl":"https://doi.org/10.1109/LED.2024.3505154","url":null,"abstract":"A p-type ternary logic MOSFET (P-TMOS), which serves as the counterpart to a previously reported n-type ternary logic MOSFET (N-TMOS) but has been missing for the construction of a complementary standard ternary inverter, is demonstrated. The P-TMOS consists of a PMOS and an n-type threshold switch (TS) connected in series. While the PMOS determines the type of the ternary logic device, the TS, despite being an n-type device, provides both n-type and p-type characteristics, making it bidirectional with a tunable middle state in ternary logic. This tunable middle state is attractive for balancing noise margin and controlling power-delay product. By leveraging mature CMOS technology capable of large-scale fabrication, the Si-based P-TMOS facilitates the practical implementation of a ternary logic system.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 1","pages":"16-19"},"PeriodicalIF":4.1,"publicationDate":"2024-11-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142912425","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Simultaneous Dual-Frequency High-Power Microwave Generation in a Relativistic Transit-Time Oscillator for X-Band and Ka-Band: Preliminary Experimental Study
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2024-11-22 DOI: 10.1109/LED.2024.3505136
Xingfu Gao;Liili Song;Junpu Ling;Xinbing Cheng;Rong Chen;Lei Wang;Juntao He
{"title":"Simultaneous Dual-Frequency High-Power Microwave Generation in a Relativistic Transit-Time Oscillator for X-Band and Ka-Band: Preliminary Experimental Study","authors":"Xingfu Gao;Liili Song;Junpu Ling;Xinbing Cheng;Rong Chen;Lei Wang;Juntao He","doi":"10.1109/LED.2024.3505136","DOIUrl":"https://doi.org/10.1109/LED.2024.3505136","url":null,"abstract":"This letter presents the experimental validation of a dual-frequency high-power microwave (HPM) source utilizing a relativistic transit-time oscillator (RTTO), which achieves simultaneous output in the X-band and Ka-band. To enhance measurement precision and signal isolation between the dual-frequency HPM outputs, a band-pass filter was introduced into the Ka-band measurement system. The device exhibits a compact nested structure and operates stably at a voltage of 440 kV with a low guiding magnetic field of 0.6 T, while generating output powers of 1.1 GW in the X-band and 0.25 GW in the Ka-band, with pulse widths of 80 ns and 28 ns, respectively. The generated microwave modes have been confirmed as symmetric TM\u0000<inline-formula> <tex-math>$_{text {0{n}}}$ </tex-math></inline-formula>\u0000 by conducting mode analysis, validating stable operation of the device. The experimental results substantiate that the device efficiently generates dual-frequency HPMs under low magnetic field conditions, presenting distinct advantages in compactness and lightweight dual-frequency HPM source design. Future work will focus on improving the device’s stability and output efficiency, thereby enhancing its practicality and reliability.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 1","pages":"103-106"},"PeriodicalIF":4.1,"publicationDate":"2024-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905929","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Unprecedented High Efficiency of Porous Silicon-Based Electron Emitter Achieved Through Electrochemical Oxidation
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2024-11-22 DOI: 10.1109/LED.2024.3505134
He Li;Li Sailei;Luo Wei;Li Jie
{"title":"Unprecedented High Efficiency of Porous Silicon-Based Electron Emitter Achieved Through Electrochemical Oxidation","authors":"He Li;Li Sailei;Luo Wei;Li Jie","doi":"10.1109/LED.2024.3505134","DOIUrl":"https://doi.org/10.1109/LED.2024.3505134","url":null,"abstract":"The demand for efficient electron sources in vacuum microelectronics is rising as devices become smaller and more integrated. Post-oxidation is an efficient method for passivating porous silicon (PS) to enhance the field emission performance of the PS-based electron emitter. This study reveals that electrochemical oxidation (ECO) in constant-voltage (CV) mode promotes more efficient and uniform oxidation of the PS layer without generating any surface crevices, as compared to the constant-current (CC) mode. The \u0000<inline-formula> <tex-math>$11~mu $ </tex-math></inline-formula>\u0000m thick PS layer, oxidized by the CV mode at 50 V for 20 min, achieves an unprecedented emission efficiency of 16.8% at a bias voltage of 28 V, positioning it as a promising on-chip electron source for future applications.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 1","pages":"92-95"},"PeriodicalIF":4.1,"publicationDate":"2024-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142905856","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Electrohydrodynamic Printing Enables Ultrahigh Resolution Quantum Dot Light-Emitting Diodes
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2024-11-19 DOI: 10.1109/LED.2024.3502469
Qunying Zeng;Yijie Fan;Yangbin Zhu;Tailiang Guo;Hailong Hu;Fushan Li
{"title":"Electrohydrodynamic Printing Enables Ultrahigh Resolution Quantum Dot Light-Emitting Diodes","authors":"Qunying Zeng;Yijie Fan;Yangbin Zhu;Tailiang Guo;Hailong Hu;Fushan Li","doi":"10.1109/LED.2024.3502469","DOIUrl":"https://doi.org/10.1109/LED.2024.3502469","url":null,"abstract":"Electrohydrodynamic (EHD) printing is a promising method for manufacturing high-resolution quantum dot light-emitting diodes (QLEDs). The stability of the EHD printing process and the morphology of final quantum dot (QD) film are highly dependent on the ink formulation. To solve this problem, we selected a ternary solvent (decahydronaphthalene, tetradecane and nonane) ink for cadmium-based QDs (CdSe/ZnS) to achieve excellent QD dispersion while eliminating the “coffee ring” effect, resulting in high quality QD films. We also fabricated a complete QLED device by printing a light-emitting layer formed by linearly aligned strips of QDs, achieving an external quantum efficiency (EQE) of 19.2 %, which is one of the highest levels of printing devices. On this basis, we introduced patterned PMMA structures prepared by nanoimprinting method to achieve ultrahigh resolu-tion devices. The pixel density achieved was 8,758 pixels per inch (PPI), with a maximum EQE of 10.5 %. The luminance is 9530.43 cd/m2 at a voltage of 4 volts. This work shows promising potential in realizing ultra-high resolution and high-performance QLEDs.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 1","pages":"64-67"},"PeriodicalIF":4.1,"publicationDate":"2024-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142912580","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Highly Robust p-GaN Gate HEMT With Surge-Energy Ruggedness Under Unclamped Inductive Switching and UV Pulse Laser Irradiation
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2024-11-18 DOI: 10.1109/LED.2024.3501073
Feng Zhou;Tianyang Zhou;Can Zou;Rong Yu;Junfan Qian;Weizong Xu;Fangfang Ren;Dong Zhou;Dunjun Chen;Youdou Zheng;Rong Zhang;Hai Lu
{"title":"Highly Robust p-GaN Gate HEMT With Surge-Energy Ruggedness Under Unclamped Inductive Switching and UV Pulse Laser Irradiation","authors":"Feng Zhou;Tianyang Zhou;Can Zou;Rong Yu;Junfan Qian;Weizong Xu;Fangfang Ren;Dong Zhou;Dunjun Chen;Youdou Zheng;Rong Zhang;Hai Lu","doi":"10.1109/LED.2024.3501073","DOIUrl":"https://doi.org/10.1109/LED.2024.3501073","url":null,"abstract":"The robustness of non-avalanche p-GaN gate HEMTs against dynamic overvoltage (\u0000<inline-formula> <tex-math>${V}_{text {over.}}text {)}$ </tex-math></inline-formula>\u0000 and transient surge-energy (\u0000<inline-formula> <tex-math>${E}_{text {sur.}}text {)}$ </tex-math></inline-formula>\u0000 shocks is critical for device applications, especially for high-power switching applications. In this work, by carefully constructing an energy dissipating passage from the drain to the source, the proposed device successfully possesses the ability to withstand dynamic overvoltage and safely dissipate surge energy, achieving a maximum \u0000<inline-formula> <tex-math>${V}_{text {over.}}$ </tex-math></inline-formula>\u0000 of 1.85 kV and an \u0000<inline-formula> <tex-math>${E}_{text {sur.}}$ </tex-math></inline-formula>\u0000 of 11.7 J/cm2, setting a performance record for GaN-based devices. Furthermore, the device sustains over 1-million times repeated UIS energy shocks, revealing strong robustness. In particular, under extreme conditions of UV pulse laser irradiation and inductive transient, the device still exhibits notable survivability. These results reveal the great potential of non-avalanche p-GaN HEMTs with surge energy dissipating and overvoltage sustaining capabilities for high-power switching applications.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 1","pages":"36-39"},"PeriodicalIF":4.1,"publicationDate":"2024-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142912452","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Assessing Copper High Density-TSVs for Reliable Performance in Cryogenic Systems
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2024-11-18 DOI: 10.1109/LED.2024.3500780
Stéphane Moreau;Candice Thomas;David Bouchu
{"title":"Assessing Copper High Density-TSVs for Reliable Performance in Cryogenic Systems","authors":"Stéphane Moreau;Candice Thomas;David Bouchu","doi":"10.1109/LED.2024.3500780","DOIUrl":"https://doi.org/10.1109/LED.2024.3500780","url":null,"abstract":"This study evaluates copper High Density-Through Silicon Vias (HD-TSVs) in cryogenic environments, crucial for applications like quantum computing and astrophysics. The use of HD-TSVs notably allows for increased signal density, enabling device scaling. 1980 thermal cycles between 344 K and 77 K were conducted to assess the mechanical and electrical robustness of HD-TSVs to cryogenic conditions. Additionally, one thermal cycle was carried in a cryostat down to 2 K. In situ and ex situ electrical measurements show remarkable stability in the electrical resistances of the tested structures with a variation of less than ±3 %, even after 1980 of thermal cycles. These results confirm the robustness and electrical performance of copper HD-TSV at low temperatures, opening promises for their integration within cryogenic systems.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 1","pages":"80-83"},"PeriodicalIF":4.1,"publicationDate":"2024-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142912463","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
SRAM With Oxide Semiconductor Pull-Down Transistors on the Backside Enabling Full-Node PPA Improvement
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2024-11-15 DOI: 10.1109/LED.2024.3498840
Tao Chou;Tzu-Yun Liu;Li-Kai Wang;Tsai-Yu Chung;Ching-Wang Yao;Hsin-Cheng Lin;C. W. Liu
{"title":"SRAM With Oxide Semiconductor Pull-Down Transistors on the Backside Enabling Full-Node PPA Improvement","authors":"Tao Chou;Tzu-Yun Liu;Li-Kai Wang;Tsai-Yu Chung;Ching-Wang Yao;Hsin-Cheng Lin;C. W. Liu","doi":"10.1109/LED.2024.3498840","DOIUrl":"https://doi.org/10.1109/LED.2024.3498840","url":null,"abstract":"The 6T SRAM bitcell, consisting of four pFETs on the same tier and two oxide-semiconductor pull-down transistors stacked on the backside, can achieve 17% power reduction, 32% performance enhancement, and 42% area reduction as compared to one-tier SRAM bitcell. With the high strength ratio of the pass-gate transistors to the pull-down transistors, near-threshold-voltage write reduces the minimum operating voltage.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 1","pages":"48-51"},"PeriodicalIF":4.1,"publicationDate":"2024-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142912445","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Improved Memory Performance Through Integration of Ferroelectric and Ovonic Threshold Switching Layer
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2024-11-14 DOI: 10.1109/LED.2024.3497957
Laeyong Jung;Jangseop Lee;Seungyeol Oh;Yoori Seo;Ohhyuk Kwon;Hyunsang Hwang
{"title":"Improved Memory Performance Through Integration of Ferroelectric and Ovonic Threshold Switching Layer","authors":"Laeyong Jung;Jangseop Lee;Seungyeol Oh;Yoori Seo;Ohhyuk Kwon;Hyunsang Hwang","doi":"10.1109/LED.2024.3497957","DOIUrl":"https://doi.org/10.1109/LED.2024.3497957","url":null,"abstract":"In this study, we explore the combined effects of a ferroelectric (FE) layer with an ovonic threshold switching (OTS) layer to enhance the performance of memory devices. Initially, to enlarge memory window, an FE layer was used to induce bidirectional shifts in the threshold voltage (V\u0000<inline-formula> <tex-math>$_{text {th}}text {)}$ </tex-math></inline-formula>\u0000 of OTS. This polarization-induced modulation led to an additional memory window compared to a case where the applied polarization field was not applied. Subsequently, to enhance the reliability, FE layer’s persistent field was leveraged for mitigating the OTS layer’s effective electric field. This polarization field served as an additional pulse scheme, thereby reducing the relaxation effect of traps and improving drift. Finally, our findings demonstrated FE layer’s capability to facilitate multi-level states via adjustable polarization and a large memory window. We also examined the integration with a selenium-based selector only memory (SOM) device, where we observed a notable enhancement in memory window, exceeding 2 V. These findings suggest the potential for significant improvements in SOM by strategically integrating FE and OTS layers.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 1","pages":"44-47"},"PeriodicalIF":4.1,"publicationDate":"2024-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142912422","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optoelectronic Synapse Enabled by Defect Engineering of Tellurene for Neuromorphic Computing
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2024-11-14 DOI: 10.1109/LED.2024.3498106
Junxiong Guo;Junyan Huang;Shuyi Gu;Lin Lin;Yafei Zhang;Xiang Wang;Yu Liu;Tianxun Gong;Yuan Lin;Bin Yu;Wen Huang;Xiaosheng Zhang
{"title":"Optoelectronic Synapse Enabled by Defect Engineering of Tellurene for Neuromorphic Computing","authors":"Junxiong Guo;Junyan Huang;Shuyi Gu;Lin Lin;Yafei Zhang;Xiang Wang;Yu Liu;Tianxun Gong;Yuan Lin;Bin Yu;Wen Huang;Xiaosheng Zhang","doi":"10.1109/LED.2024.3498106","DOIUrl":"https://doi.org/10.1109/LED.2024.3498106","url":null,"abstract":"Emerging optoelectronic synapses hold immense potential for advancing neuromorphic computing systems. However, achieving precise control over selective responses in optoelectronic memory and clarifying tunable synaptic weights has remained challenging. This study reports an optoelectronic synapse utilizing oxygen plasma-assisted defect engineering in tellurene for artificial neural networks. Through DFT calculations and experimental analyses, we demonstrate that tellurene conductance can be modulated by controlling plasma-defined defect engineering, allowing a transition from short-term to long-term synaptic plasticity, largely determined by intrinsic large-lattice-relaxation effects. Our artificial synapses exhibit high linearity, a broad dynamic range, and tunable synaptic weights. Additionally, our optoelectronic synapses display selective sensitivity to multi-spectral light and achieve a pattern recognition accuracy of up to 96.7% across five typical datasets, surpassing even the ideal synapse. These tunable spectral responses, combined with high-performance neuromorphic applications using spike coding, establish a foundation for developments in brain-inspired machine learning, robotics, and real-time data processing.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 1","pages":"68-71"},"PeriodicalIF":4.1,"publicationDate":"2024-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142912424","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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