IEEE Transactions on Electron Devices最新文献

{"title":"Investigation of High-Temperature Characteristics of GaN p-Channel Field-Effect Transistors at 200 °C","authors":"Linhuan Gao;Xiufeng Song;Longyang Yu;Ga Zhang;Xuejing Sun;Junchun Bai;Bin Cheng;Ming Xiao;Shuzhen You;Shenglei Zhao;Yue Hao;Jincheng Zhang","doi":"10.1109/TED.2026.3716195","DOIUrl":"https://doi.org/10.1109/TED.2026.3716195","url":null,"abstract":"GaN p-channel field-effect transistors (p-FETs) are essential for realizing efficient GaN complementary circuits. However, there has been limited research on the high-temperature reliability of GaN p-FETs. This article investigates the temperature dependence of GaN p-FETs. As temperature increases from <inline-formula> <tex-math>$25~^{circ }$ </tex-math></inline-formula>C to <inline-formula> <tex-math>$200~^{circ }$ </tex-math></inline-formula>C, the threshold voltage exhibits a negative shift from −1.79 to −2.02 V under forward scanning, while threshold voltage hysteresis increases from 0.77 to 2.17 V, and the maximum drain current declines from 0.015 to <inline-formula> <tex-math>${2.1} times 10^{-{4}}$ </tex-math></inline-formula> mA/mm, with higher leakage current and lower <inline-formula> <tex-math>$text {I}_{text {ON}}$ </tex-math></inline-formula>/<inline-formula> <tex-math>${I}_{text {OFF}}$ </tex-math></inline-formula> ratio. This is primarily attributed to enhanced carrier transitions and scattering at high temperature, which further reduce the 2-D hole gas (2DHG) density and mobility. Furthermore, the threshold voltage shows a slight positive shift above <inline-formula> <tex-math>$100~^{circ }$ </tex-math></inline-formula>C during forward sweeping, which arises from enhanced acceptor ionization at elevated temperatures. Variable-temperature Hall-effect measurement shows mobility decreases from 12.79 to 4.62 cm2/V<inline-formula> <tex-math>$cdot $ </tex-math></inline-formula>s and effective hole density increases from <inline-formula> <tex-math>${4.85} times {10}^{{12}}$ </tex-math></inline-formula> <inline-formula> <tex-math>${mathrm{cm}}^{-{2}}$ </tex-math></inline-formula> to <inline-formula> <tex-math>${4.75} times {10}^{{13}}$ </tex-math></inline-formula> <inline-formula> <tex-math>${mathrm{cm}}^{-{2}}$ </tex-math></inline-formula> within this temperature range. Notably, after 24 h of recovery, the interface trap density (<inline-formula> <tex-math>$text {D}_{text {it}}$ </tex-math></inline-formula>) decreases from 1.99~3.30<inline-formula> <tex-math>$times {10}^{{13}}$ </tex-math></inline-formula> to 1.45~2.65 <inline-formula> <tex-math>$times {10}^{{13}}$ </tex-math></inline-formula> <inline-formula> <tex-math>${mathrm{cm}}^{-{2}}$ </tex-math></inline-formula>/eV, and the trap energy levels become shallower, shifting from 0.41~0.44 to 0.36~0.38 eV. Accordingly, the drain current increases by 73% compared with its initial state. These results reveal substantial degradation in the electrical characteristics of the studied p-FET at temperatures up to <inline-formula> <tex-math>$200~^{circ }$ </tex-math></inline-formula>C, with basic recovery of electrical performance achievable after 24 h of room-temperature relaxation. This work delivers critical insights into the development of high-temperature operable GaN-based integrated complementary logic (CL) circuits.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5360-5365"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Improvement of Reverse Recovery Characteristic by Extra Etching in Source Electrode for Superjunction MOSFET","authors":"Ping Li;Juan Luo;Rongyao Ma;Wei Zeng;Tao Zhong;Zequ Han;Hao Zhong;Shengdong Hu;Zhi Lin","doi":"10.1109/TED.2026.3718884","DOIUrl":"https://doi.org/10.1109/TED.2026.3718884","url":null,"abstract":"This article proposes and investigates a Si-based superjunction MOSFET (SJ-MOSFET) with a P-type Schottky contact to the P-body region by increasing the etching depth of the source contact. The P-type Schottky junction suppresses the operation of the internal p-n junction body diode, thereby effectively reducing the injection efficiency of minority carriers and improving the reverse recovery characteristics. According to the experimental results, compared to the conventional SJ-MOSFET, the reverse peak current <inline-formula> <tex-math>${I} {_{text {rrm}}}$ </tex-math></inline-formula> of the proposed SJ-MOSFET with an etching depth of <inline-formula> <tex-math>$0.65~mu $ </tex-math></inline-formula>m decreases from 20.114 to 16.001 A, corresponding to a reduction of 20.5%. The reverse recovery time <inline-formula> <tex-math>${t} {_{text {rr}}}$ </tex-math></inline-formula> is shortened from 272.167 to 190.434 ns, and the reverse recovery charge <inline-formula> <tex-math>${Q} {_{text {rr}}}$ </tex-math></inline-formula> is reduced from 2703.542 to 1466.839 nC, a decrease of 30.0% and 45.8%, respectively. The proposed SJ-MOSFET effectively improves the reverse recovery performance without adding any additional processing steps or increasing manufacturing costs.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5508-5513"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148903127","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Crystalline InGaO TFT Rectifier With Conversion Efficiency Higher Than 90% for RFID Application","authors":"Sunaina Priyadarshi;Md. Hasnat Rabbi;Taebin Lim;Seongcheol Moon;Niels van Fraassen;Nathan Harrison;Abhishek Chandramohan;Feras Alkhalil;Jin Jang","doi":"10.1109/TED.2026.3715144","DOIUrl":"https://doi.org/10.1109/TED.2026.3715144","url":null,"abstract":"This article demonstrates a crystalline-indium gallium oxide (c-InGaO/c-IGO) thin-film transistors (TFTs)-based rectifier, with <inline-formula> <tex-math>$1~mu $ </tex-math></inline-formula>m channel length and <inline-formula> <tex-math>$500~mu $ </tex-math></inline-formula>m width, exhibiting the threshold voltage of 0.4 V and field-effect mobility of 24.07 cm2/V.s. The key contribution is the first implementation of a coplanar crystalline indium gallium oxide (c-IGO) rectifier, in contrast to conventional back-channel etched (BCE) oxide rectifiers, which suffer from large gate-to-source/drain overlap capacitance and limited high-frequency performance. The coplanar structure reduces parasitic capacitance, enabling improved cutoff frequency. In addition, the crystalline oxide semiconductor provides higher mobility than amorphous counterparts, enhancing carrier transport, switching speed, and rectification efficiency. The device demonstrates that the increased on-state current, leading to improved direct current (DC) output voltage. At 13.56 MHz with a 5 V alternating current (AC) input, the rectifier achieves over 90% voltage conversion efficiency (VCE). The estimated maximum operational frequency is 3.52 GHz, comparable to Si-CMOS rectifiers for low-cost radio frequency identification (RFID) applications.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5817-5822"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148903132","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"High-Throughput Screening of Excitatory/Inhibitory FeFETs for Customizable Spiking Neural Networks","authors":"Jiaqi Yan;Liyufen Dai;Xiangli Zhong;Yongshuai Ge;Jinbin Wang;Gaokuo Zhong","doi":"10.1109/TED.2026.3710163","DOIUrl":"https://doi.org/10.1109/TED.2026.3710163","url":null,"abstract":"Customizable spiking neural networks (SNNs), which tailor network dynamics to diverse tasks, hold great promise for advancing high-performance neuromorphic systems. However, no prior study has integrated artificial excitatory or inhibitory neuron units into customizable SNNs. Realizing such excitatory/inhibitory units poses a fundamental challenge, as their functionalities emerge from a convoluted interplay of material properties and device architectures, rendering conventional trial-and-error approaches ineffective. Herein, we developed a high-throughput screening strategy to elucidate structure–function relationships in ferroelectric field-effect transistors (FeFETs), aiming to unlock their potential as tunable excitatory/inhibitory neuron elements. Our analysis revealed that FeFETs incorporating a thinner InGaZnO (IGZO) channel of 7.7 nm exhibit repeatable self-reset excitatory firing, while a thicker IGZO channel of 10.3 nm shows inhibitory behaviors under identical unipolar stimulation. This transition is attributed to the thickness-dependent interplay between ferroelectric polarization coupling and interfacial charge dynamics. Moreover, the excitatory/inhibitory FeFETs are integrated into a customizable SNN with precisely controlled excitatory–inhibitory (E/I) ratios, achieving a high recognition accuracy of 88.9% at an optimal E/I ratio of 0.2. These findings establish a connection between material-level parameters and neuromorphic functionality, offering a generalizable framework for designing high-performance customizable excitatory/inhibitory FeFET-based neuromorphic hardware.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5804-5809"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148903134","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Fully Sputtered HfOy/HfOx RRAM: Improved Synaptic Behavior for Neuromorphic Training Accelerators","authors":"Yunsur Kim;Seonuk Jeon;Seokjae Lim;Jiyong Woo","doi":"10.1109/TED.2026.3714373","DOIUrl":"https://doi.org/10.1109/TED.2026.3714373","url":null,"abstract":"Atomic layer deposition (ALD)-based stoichiometric HfO2 films have been widely used in analog resistive random access memories (RRAMs) for preparing neuromorphic synapses; however, the poor controllability in terms of synaptic weight updates under dynamic pulsing conditions often limits the application of these RRAMs in real-time learning accelerators. To overcome these limitations, we propose a bilayer structure, a substoichiometric HfOx switching layer (SL) and an oxygen-rich HfOy interface layer (IL), fabricated entirely via radio frequency (RF) sputtering. The substoichiometric HfOx SL facilitates rapid oxygen vacancy (V<inline-formula> <tex-math>${}_{{0}}text {)}$ </tex-math></inline-formula> migration, enabling fast and continuous conductance modulation. In addition, the HfOy IL contains a uniform distribution of V0s across the HfOy/HfOx stack, suppressing excessive local field concentration and mitigating instability during conductive filament (CF) formation and dissolution. Therefore, this HfOy/HfOx RRAM device exhibits excellent device-to-device (D2D) and cycle-to-cycle (C2C) uniformity, stable multilevel retention, and reliable linear weight updates even under short pulse widths of 100 ns. Real-time transient current analysis confirms a short switching delay of ~8 ns and ultralow energy consumption of ~0.83 pJ/pulse. Furthermore, the achieved synaptic update behavior of the RRAM enables near-ideal neuromorphic performance with a classification accuracy of 93.4% on the Modified National Institute of Standards and Technology (MNIST) dataset in multilayer neural networks through the IBM AIHWKIT simulator, highlighting the potential of using these RRAMs in low-power, high-speed training accelerators for neuromorphic computing systems.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5789-5797"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902660","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Analysis and Suppression of Asymmetric Mode Competition in a Ka-Band Transit Time Oscillator","authors":"Zengyao Lei;Jin Meng;Bingfang Deng;Chaochao Yang;Haitao Wang","doi":"10.1109/TED.2026.3709794","DOIUrl":"https://doi.org/10.1109/TED.2026.3709794","url":null,"abstract":"As high-power microwave (HPM) field is advancing toward higher power and frequencies, asymmetric mode competition emerges as a critical issue that cannot be overlooked, demanding focused consideration in asymmetric mode suppression strategies. The evident asymmetric mode competition was observed in the experiment of the Ka-band transit time oscillator (TTO) in accordance with PIC simulation. It is confirmed that the asymmetric mode is TM₁₁₂ after analyzing the electric field distribution and resonance curve of cold cavity tests. The causes of mode competition were precisely identified as the highly similar high-frequency characteristics between the TM₀₁ and TM₁₁ modes, including the external quality factor <inline-formula> <tex-math>${Q}_{text {e}}$ </tex-math></inline-formula> and electron conductivity. The perspectives of mode excitation and microwave output were adopted to resolve the issue. By optimizing the reflector and collector, the positive feedback and output capability of the operating mode TM₀₁ are enhanced superior to TM₁₁, thereby achieving suppression. This approach was validated by both simulation and experimental results. As the magnetic field from the permanent magnet was 0.6 T and the diode voltage was 489 kV, the HPM with an output power of 358 MW and a pulsewidth of 14 ns was achieved.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5745-5750"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902833","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"1.92 kV/5 A β-Ga2O3 Schottky Barrier Diodes With Room-Temperature Sputtered Al2O3 Field Plate","authors":"Yeye Guo;Hao Zhang;Jining Yang;Yongjie He;Yiwen Yu;Senchong Zhao;Haichuan Yu;Yangxue Ou;Hao Zhu;Chenjie Gu;Wenjun Liu","doi":"10.1109/TED.2026.3714360","DOIUrl":"https://doi.org/10.1109/TED.2026.3714360","url":null,"abstract":"This work reports a significant enhancement in the performance of <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga2O3 Schottky barrier diodes (SBDs) by employing a room-temperature sputtered Al2O3 field plate (FP). The fabricated sputtering FP-SBD achieves a high reverse breakdown voltage (<inline-formula> <tex-math>${V}_{text {br}}text {)}$ </tex-math></inline-formula> of 1.92 kV, a specific <sc>on</small>-resistance (<inline-formula> <tex-math>${R}_{textsc{on,} text{sp}}text {)}$ </tex-math></inline-formula> of 7.1 m<inline-formula> <tex-math>$Omega cdot $ </tex-math></inline-formula>cm2, and a forward current (<inline-formula> <tex-math>${I}_{text {F}}text {)}$ </tex-math></inline-formula> of 5 A, yielding a high-power figure-of-merit (PFOM) of 0.52 GW/cm2 for large-area (>1 <inline-formula> <tex-math>$mathrm{mm}^{{2}}text {)}$ </tex-math></inline-formula> devices. Compared to atomic layer deposition (ALD) counterparts, the sputtering FP-SBD demonstrates a 47.69% improvement in <inline-formula> <tex-math>${V}_{text {br}}$ </tex-math></inline-formula> with only a marginal 13.9% reduction in <inline-formula> <tex-math>${I}_{text {F}}$ </tex-math></inline-formula> at 2 V. This substantial advancement in reverse blocking capability is attributed to the minimized thermal budget and interfacial sheet charges. X-ray photoelectron spectroscopy (XPS) analyses further reveal that the sputtered interface possesses a lower proportion of oxygen vacancies. The sputtering FP-SBD exhibits a fast reverse recovery time of 8.54 ns and a low reverse recovery charge of 10.49 nC (at di/dt = 510 A/<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>s) with <inline-formula> <tex-math>${V}_{text {br}}$ </tex-math></inline-formula> of 100 V, maintaining excellent rectification characteristics. These results underscore the efficacy of room-temperature sputtering as a low-thermal-budget process for realizing high-performance <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga2O3 power electronics.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5872-5876"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902836","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Electric Gain Effect in LWIR ICIPs Under Thermoelectric Cooling (200/230 K)","authors":"Karol Dąbrowski;Piotr Baranowski;Bartłomiej Seredyński;Łukasz Kubiszyn;Waldemar Gawron;Piotr Martyniuk","doi":"10.1109/TED.2026.3720450","DOIUrl":"https://doi.org/10.1109/TED.2026.3720450","url":null,"abstract":"This article presents an analysis of the electric gain in interband cascade infrared photodetectors (ICIPs) impacting the final performance of the long-wavelength infrared (LWIR) detectors fabricated in VIGO Photonics S.A. (VIGO) and optimized for 200 and 230 K. The aim is to illustrate the presence of the gain in selected ICIP structures, as well as to demonstrate its dependence on the carrier diffusion length and series resistance versus operating temperatures. All analyzed devices are based on the InAs/InAsSb type-II superlattice (T2SLs) with subsequent cells connected by highly doped p+/n+ tunnel junctions. Additionally, to increase the optical area and signal-to-noise ratio, immersion lenses were processed in all devices. This article focuses on the electric gain analysis, being defined as the ratio of the measured current responsivity and the theoretically simulated one based on the active layer absorption coefficient. Furthermore, this article presents the impact of a double radiation pass through the last stage of the cascade structure after its reflection from the metallization on quantum efficiency (QE), current responsivity, and gain from the simulations.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5659-5664"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Highly Sensitive MAPbBr3 Single Crystal Photodetector by Surface Reconstruction","authors":"Yuangan Chen;Zujian Dai;Haolan Xu;Lijuan Huang;Mingzhu Hu;Lixin He;Yongqiang Yu;Qin Hu","doi":"10.1109/TED.2026.3716666","DOIUrl":"https://doi.org/10.1109/TED.2026.3716666","url":null,"abstract":"MAPbBr3 single crystals (SCs) have attracted significant attention due to their low defect density and excellent optoelectronic properties. However, residual solvents introduced during solution-based SC synthesis increase defects and surface roughness, compromising metal–semiconductor contact quality. Meanwhile, ion migration associated with these defects degrades dark current stability, limiting carrier transport. To address these issues, we develop a surface reconstruction strategy (SRS) to remove the residual and passivate defects in MAPbBr3SC. As a result, the device achieves a faster response time, which is reduced from 212 to <inline-formula> <tex-math>$2~mu $ </tex-math></inline-formula>s. In addition, the dark current drift is lowered by approximately two orders of magnitude to an ultralow value of <inline-formula> <tex-math>${8}.{86}~times ~{10} ^{-{7}}$ </tex-math></inline-formula> nA<inline-formula> <tex-math>$cdot $ </tex-math></inline-formula>mm/(V<inline-formula> <tex-math>$cdot $ </tex-math></inline-formula>s), along with a noise current of <inline-formula> <tex-math>${2}.{54}~times ~{10} ^{-{13}}$ </tex-math></inline-formula> A/Hz<inline-formula> <tex-math>${}^{text {1/2}}$ </tex-math></inline-formula>. Benefiting from reduced dark current drift, the outstanding photodetectors (PDs) successfully achieve stable signal acquisition and accurate heart rate (HR) monitoring in a photoplethysmography (PPG) system.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5640-5645"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Hybrid Optimized WOA Parameter Extraction Algorithm of Perovskite Solar Cells' Three-Diode Core Equivalent Circuit Model","authors":"Yuanjun Liu;Bingyan Quan;Erkun Ke;Junfan Chen;Fei Yu;Shuting Cai","doi":"10.1109/TED.2026.3714362","DOIUrl":"https://doi.org/10.1109/TED.2026.3714362","url":null,"abstract":"The three-diode equivalent circuit model accurately describes the electrical characteristics of solar cells, but its obvious nonlinearities and other defects often lead to problems such as low accuracy and susceptibility to local optimization when parameters are extracted using traditional optimization methods. To address this challenge, this article proposes a hybrid whale optimization algorithm (HWOA) that combines the whale optimization algorithm (WOA) and nonlinear least squares (NLSs). The core mechanism consists of a global search via the WOA to determine the approximate parameter ranges, and a local optimization via the NLSs method to improve the final accuracy. This approach achieves a balance between global exploration and local convergence, resulting in the efficient extraction of optimal solutions for the parameters. Experimental validation was performed using a measurement dataset of perovskite solar cells. The proposed algorithm achieves the lowest root mean square error (RMSE) values. The proposed algorithm was further validated using KC200GT solar cells under different light intensity and temperature conditions. The experimental results show a high correlation between the fit values and the measured values, proving the validity and reliability of the algorithm for parameter extraction.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5620-5625"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148903089","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}