IEEE Transactions on Electron Devices最新文献_第7页

Effective Reduction of Current Collapse in AlGaN/GaN MISHEMT via Low-Temperature Nitriding Treatment

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-24 DOI: 10.1109/TED.2025.3542010

Sheng-Yao Chou;Yan-Chieh Chen;Cheng-Hsien Lin;Yan-Lin Chen;Shuo-Bin Wu;Hsin-Chu Chen;Ting-Chang Chang

{"title":"Effective Reduction of Current Collapse in AlGaN/GaN MISHEMT via Low-Temperature Nitriding Treatment","authors":"Sheng-Yao Chou;Yan-Chieh Chen;Cheng-Hsien Lin;Yan-Lin Chen;Shuo-Bin Wu;Hsin-Chu Chen;Ting-Chang Chang","doi":"10.1109/TED.2025.3542010","DOIUrl":"https://doi.org/10.1109/TED.2025.3542010","url":null,"abstract":"We successfully demonstrated a 72% reduction in current collapse under high-field driving conditions (<inline-formula> <tex-math>${V}_{text {D}} =300$ </tex-math></inline-formula> V) for AlGaN/GaN MISHEMT using low-temperature supercritical fluid nitridation (SCFN) treatment at <inline-formula> <tex-math>$180~^{circ }$ </tex-math></inline-formula>C for 1 h. A significant improvement in the off-state (<inline-formula> <tex-math>${V}_{text {G}}= -10$ </tex-math></inline-formula> V) gate leakage current was observed in MISHEMT with SCFN treatment, resulting in a high breakdown voltage (BV) capability of up to <inline-formula> <tex-math>${V}_{text {D}}=710$ </tex-math></inline-formula> V (at <inline-formula> <tex-math>$1~mu $ </tex-math></inline-formula>A/mm), compared to only <inline-formula> <tex-math>${V}_{text {D}}=110$ </tex-math></inline-formula> V without SCFN. Furthermore, in terms of characteristics, the device was improved with a 4.6% increase in maximum drain current (<inline-formula> <tex-math>${I}_{text {D},max }$ </tex-math></inline-formula>), a 2.9% increase in maximum transconductance (<inline-formula> <tex-math>${G}_{text {m},max }$ </tex-math></inline-formula>), and an 11.1% decrease in drain-source on resistance [<inline-formula> <tex-math>${R}_{text {DS}}$ </tex-math></inline-formula>(on)]. These improvements can be attributed to the repairs of dangling bonds on the AlGaN surface and the elimination of the Al2O3/AlGaN interface traps, which collectively lead to improved performance and stability. Based on the abovementioned results, the X-ray photoelectron spectroscopy (XPS), conduction band edge of defect state density (<inline-formula> <tex-math>${D}_{text {it}}$ </tex-math></inline-formula>), and gate leakage trap-related hopping conduction mechanism were analyzed to explain the phenomenon.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"2090-2094"},"PeriodicalIF":2.9,"publicationDate":"2025-02-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740424","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Multibit N-Type and P-Type Fe-GAAFETs Using HfO₂/ZrO₂ Superlattice Dielectric and SiGe/Si Superlattice Channel With Record Low Voltage, Large Memory Window, High Speed, and Reliability for High Density 1T NVM Applications

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-24 DOI: 10.1109/TED.2025.3540768

Yi-Ju Yao;Tsai-Jung Lin;Chen-You Wei;Kai-Ting Huang;Bo-Xu Chen;Yung-Teng Fang;Heng-Jia Chang;Yu-Min Fu;Guang-Li Luo;Fu-Ju Hou;Yung-Chun Wu

{"title":"Multibit N-Type and P-Type Fe-GAAFETs Using HfO₂/ZrO₂ Superlattice Dielectric and SiGe/Si Superlattice Channel With Record Low Voltage, Large Memory Window, High Speed, and Reliability for High Density 1T NVM Applications","authors":"Yi-Ju Yao;Tsai-Jung Lin;Chen-You Wei;Kai-Ting Huang;Bo-Xu Chen;Yung-Teng Fang;Heng-Jia Chang;Yu-Min Fu;Guang-Li Luo;Fu-Ju Hou;Yung-Chun Wu","doi":"10.1109/TED.2025.3540768","DOIUrl":"https://doi.org/10.1109/TED.2025.3540768","url":null,"abstract":"This article presents novel approach to achieving record low voltage, large memory window (MW), high speed, and endurance for high-density 1T nonvolatile memory (NVM) with N-type and P-type Fe-gate-all around field-effect transistors (GAAFETs) utilizing HfO2/ZrO2 superlattice (SL) dielectric and SiGe/Si SL channel for multibit memory. The proposed multibit Fe-GAAFETs exhibit a rapid switching speed of 100 ns and a substantial MW of approximately 2.5 V with an interfacial layer (IL) of SiO2. Notably, P-type devices demonstrate write voltage at only 2 V, showcasing endurance exceeding 107 cycles for each state, and a data retention time surpassing 105 s, linearly extrapolated ten years without performance decrease and well-separated intermediate states. Additionally, the quantum well effect of the SiGe/Si SL channel is analyzed. These findings emphasize the feasibility of achieving low operating voltage for high-density 1T NVM applications.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1569-1573"},"PeriodicalIF":2.9,"publicationDate":"2025-02-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740209","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Dopant-Assisted Exciton Enhancement: Improved Photoelectric Performance in Copolymer-Based Photodiodes

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-24 DOI: 10.1109/TED.2025.3541163

Yujie Jin;Jun Zhang;Hengdian Chang;Haonan Lin;Yuyao Tu;Yudong Cao;Yabin Mou;Yuan Yang;Ziqiang Zhao;Zhiyao Wu;Yufeng Guo

{"title":"Dopant-Assisted Exciton Enhancement: Improved Photoelectric Performance in Copolymer-Based Photodiodes","authors":"Yujie Jin;Jun Zhang;Hengdian Chang;Haonan Lin;Yuyao Tu;Yudong Cao;Yabin Mou;Yuan Yang;Ziqiang Zhao;Zhiyao Wu;Yufeng Guo","doi":"10.1109/TED.2025.3541163","DOIUrl":"https://doi.org/10.1109/TED.2025.3541163","url":null,"abstract":"Copolymers organic semiconductors (OSCs) such as diketo pyrrolopyrrole-thieno[3,2-b]thiophene (DPPT-TT) have demonstrated strong peak absorption in ultraviolet (UV) and near-infrared (NIR) regions. However, OSC-based photodiodes (OPDs) still suffer from low photodetection efficiency and photocurrent due to the high recombination rate of Frenkel excitons and limited light absorption caused by the thin active layer. In this work, a dopant-assisted exciton enhancement (DEE) mechanism is explored. By introducing a dopant layer between the bottom electrode and active layer, charge transfer is driven, significantly suppressing exciton recombination, resulting in more than a ten-fold increase in photodiode responsivity. To further enhance light absorption, a layer of metal particle nanostructure is employed. The fabricated OPDs exhibit significantly improved photoelectric performance, achieving a photocurrent density of 15.83 mA/cm2 under a light intensity of 0.002 W/cm2 at 264 nm. The external quantum efficiency (EQE) reaches approximately 98.41% at a bias voltage of 2 V, which is a 27-fold increase compared to conventional devices. Experimental results demonstrate that thin organic photodetectors, modified by electrophilic substitution and light scattering principles, hold great potential for nonvisible light band detection.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1939-1947"},"PeriodicalIF":2.9,"publicationDate":"2025-02-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740427","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Performance and Reliability Tradeoffs of Power Amplifier Cells Using High-Performance and Medium Breakdown SiGe HBTs

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-21 DOI: 10.1109/TED.2025.3540762

Harrison P. Lee;Nelson E. Sepúlveda-Ramos;Jeffrey W. Teng;John D. Cressler

{"title":"Performance and Reliability Tradeoffs of Power Amplifier Cells Using High-Performance and Medium Breakdown SiGe HBTs","authors":"Harrison P. Lee;Nelson E. Sepúlveda-Ramos;Jeffrey W. Teng;John D. Cressler","doi":"10.1109/TED.2025.3540762","DOIUrl":"https://doi.org/10.1109/TED.2025.3540762","url":null,"abstract":"In this work, the reliability and performance characteristics of silicon–germanium heterojunction bipolar transistor (SiGe HBT) cascode amplifier cells are investigated. In particular, this study investigates the tradeoffs of using transistors scaled for maximum performance or for increased breakdown voltage in the common-base stage of the cascode. The cascode structures are investigated for their dc operating limits, as well as their small- and large-signal performance, and their electrical reliability. Simulations and measurements are performed to determine how to minimize the performance tradeoffs and maximize the reliability improvement of each device type. It is shown that the difference in peak unity cutoff frequency (<inline-formula> <tex-math>${f}_{T}$ </tex-math></inline-formula>) is much smaller between the high-performance (HP) and medium breakdown (MB) cascodes than for the individual devices, and that biasing the collector–base (CB) device past its base current reversal point further increases <inline-formula> <tex-math>${f}_{T}$ </tex-math></inline-formula> of the cell by 10% or more. Reliability data show that more reliable cascode cell depends on the biasing condition and load line of the cell. Overall, results show that bias and load line can be changed to improve both the performance and reliability of cascode cells.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1589-1596"},"PeriodicalIF":2.9,"publicationDate":"2025-02-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740253","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Impact of Gate/Drain Biases in FDSOI-Based Analog Synapse on Artificial Neural-Network Performance

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-20 DOI: 10.1109/TED.2025.3540764

Wannian Wang;Shun Xu;Jiabao Ye;Jiayi Zhao;Junru Qu;Sebastien Loubriat;Guillaume Besnard;Christophe Maleville;Olivier Weber;Franck Arnaud;Dong Liu;Xiao Yu;Ran Cheng;Bing Chen;Yan Liu;Genquan Han

{"title":"Impact of Gate/Drain Biases in FDSOI-Based Analog Synapse on Artificial Neural-Network Performance","authors":"Wannian Wang;Shun Xu;Jiabao Ye;Jiayi Zhao;Junru Qu;Sebastien Loubriat;Guillaume Besnard;Christophe Maleville;Olivier Weber;Franck Arnaud;Dong Liu;Xiao Yu;Ran Cheng;Bing Chen;Yan Liu;Genquan Han","doi":"10.1109/TED.2025.3540764","DOIUrl":"https://doi.org/10.1109/TED.2025.3540764","url":null,"abstract":"In this work, a low-cost artificial intelligent analog synapse using commercial 28-nm fully depleted silicon-on-insulator (FDSOI) CMOS technology was applied in a computing-in-memory (CIM)-based neural network (NN) and co-optimized from the device level to the system level. Through read-and-write scheme optimization, the synapse realized the nonlinearity of 0.14/0.90 and the <inline-formula> <tex-math>${I}_{text {Pot}.}$ </tex-math></inline-formula>/<inline-formula> <tex-math>${I}_{text {Dep}.}$ </tex-math></inline-formula> ratio of 4.3:1, as well as excellent retention and uniformity. The comprehensive performance of the CIM-based NN system, including accuracy, energy, and latency, was evaluated by the open-source simulation tool NeuroSim+. Based on the device and system co-optimization, the CIM-based NN system can achieve an accuracy of 92% and energy consumption of only 0.45 mJ during online training. This work revealed the feasibility of the FDSOI FET-based synapse as a high performance and low cost solution for the CIM-based NN system.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"2059-2064"},"PeriodicalIF":2.9,"publicationDate":"2025-02-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740392","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Energy Consumption in Micro- and Nanoelectromechanical Relays

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-19 DOI: 10.1109/TED.2025.3537945

Qi Tang;Elliott Worsey;Mukesh K. Kulsreshath;Yue Fan;Yingying Li;Simon Bleiker;Harold Chong;Frank Niklaus;Dinesh Pamunuwa

{"title":"Energy Consumption in Micro- and Nanoelectromechanical Relays","authors":"Qi Tang;Elliott Worsey;Mukesh K. Kulsreshath;Yue Fan;Yingying Li;Simon Bleiker;Harold Chong;Frank Niklaus;Dinesh Pamunuwa","doi":"10.1109/TED.2025.3537945","DOIUrl":"https://doi.org/10.1109/TED.2025.3537945","url":null,"abstract":"Electrostatically operated micro- and nanoelectromechanical (MEM/NEM) relays have been proposed as digital switches to replace transistors due to their sharp turn-on/off transient, zero leakage current between drain and source in the off-state, and capability to operate at far higher temperatures and radiation levels than CMOS. However, the different components associated with energy consumption in MEM/NEM relays, including the dynamic energy associated with charging the gate capacitance and static energy lost through substrate leakage, have not been investigated to date. Here, we present a detailed analysis of the energy consumption of NEM/MEM relays starting from first principles and compare against measurements carried out on silicon MEM relay prototypes. The dynamic energy consumed by a transistor in a binary switching transfer is accurately captured by <inline-formula> <tex-math>${0.5}textit {CV}^{{2}}$ </tex-math></inline-formula>. This expression, which has also been used for relays, is only valid under the approximation of an unvarying capacitance C. However, the gate capacitance of an MEM/NEM relay varies as a function of gate voltage, as it is determined by the airgap between the gate electrode and the moving beam. We show how including this effect adds an extra term to the dynamic energy consumption expression. Furthermore, we investigate different current leakage mechanisms and devise a new method to estimate the substrate leakage current based on using the switching hysteresis of relays. The models, analyses, and measurement methodologies presented here constitute a set of essential techniques for accurate estimation of the energy consumption of MEM/NEM relays in ultralow power circuit applications.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1969-1976"},"PeriodicalIF":2.9,"publicationDate":"2025-02-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740161","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Short-Pulse Laser and Plasma Etching Composite Micromachining for Realizing High-Accuracy SiC Pressure Sensor

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-19 DOI: 10.1109/TED.2025.3539647

Yabing Wang;You Zhao;Yu Yang;Yulong Zhao

{"title":"Short-Pulse Laser and Plasma Etching Composite Micromachining for Realizing High-Accuracy SiC Pressure Sensor","authors":"Yabing Wang;You Zhao;Yu Yang;Yulong Zhao","doi":"10.1109/TED.2025.3539647","DOIUrl":"https://doi.org/10.1109/TED.2025.3539647","url":null,"abstract":"The micromachining of silicon carbide (SiC) materials, particularly deep etching with high precision and uniformity, limits their widespread application. This article presents a composite micromachining method combining short-pulse laser and plasma etching. Approximately 85 sensitive diaphragms are successfully fabricated on one-quarter of a 6-in SiC wafer. The central <inline-formula> <tex-math>$5times 5$ </tex-math></inline-formula> array was selected for testing, with the final diaphragm thickness deviation maintained below 3%. A statistical analysis of the static characteristics of eight sensors was conducted, revealing a correlation between machining error and sensitivity error. The best-performing sensor exhibited a sensitivity of 1.819 mV/V/MPa within the 0–5-MPa range, with an accuracy error as low as 0.36%. The zero temperature drift coefficient (TCZ) of the chip was within 0.1% FS/°C up to <inline-formula> <tex-math>$550~^{circ }$ </tex-math></inline-formula>C, reaching a maximum value of approximately 0.15% FS/°C at <inline-formula> <tex-math>$600~^{circ }$ </tex-math></inline-formula>C. The relative voltage fluctuation (RVF) remained within 8% at <inline-formula> <tex-math>$600~^{circ }$ </tex-math></inline-formula>C. After 12 days of exposure, the chip’s resistance value increased by 0.72% in H2SO4 solution and by 1.47% in NaOH solution, demonstrating its resilience to corrosive environment.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1986-1992"},"PeriodicalIF":2.9,"publicationDate":"2025-02-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740292","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Influence of Bulk Trap Properties in HfO₂-Based Ferroelectric Layers on the Transient Dynamics of Ferroelectric Field-Effect Transistors

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-19 DOI: 10.1109/TED.2025.3539640

Hyoseok Kim;Ilho Myeong;Seunghyun Kim;Sungduk Hong;Sung Jin Kim;Wanki Kim;Daewon Ha;Dae Sin Kim

引用次数: 0

Investigation of Cell Variation Effect on Z-Interference in Charge-Trap-Based 3-D NAND Flash Memory

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-19 DOI: 10.1109/TED.2025.3534187

Sangmin Ahn;Hyungjun Jo;Sechun Park;Jongwoo Kim;Hyungcheol Shin

{"title":"Investigation of Cell Variation Effect on Z-Interference in Charge-Trap-Based 3-D NAND Flash Memory","authors":"Sangmin Ahn;Hyungjun Jo;Sechun Park;Jongwoo Kim;Hyungcheol Shin","doi":"10.1109/TED.2025.3534187","DOIUrl":"https://doi.org/10.1109/TED.2025.3534187","url":null,"abstract":"In this article, we investigated the effects of cell variations, specifically the variations in gate length (<inline-formula> <tex-math>${L}_{text {g}}$ </tex-math></inline-formula>), spacer length (<inline-formula> <tex-math>${L}_{text {s}}$ </tex-math></inline-formula>), filler oxide thickness (<inline-formula> <tex-math>${T}_{text {f}}$ </tex-math></inline-formula>), channel thickness (<inline-formula> <tex-math>${T}_{text {ch}}$ </tex-math></inline-formula>), tunneling oxide thickness (<inline-formula> <tex-math>${T}_{text {tox}}$ </tex-math></inline-formula>), charge trap nitride thickness (<inline-formula> <tex-math>${T}_{text {ctn}}$ </tex-math></inline-formula>), and blocking oxide thickness (<inline-formula> <tex-math>${T}_{text {box}}$ </tex-math></inline-formula>), on the z-direction interference (Z-interference) in charge-trap-based 3-D NAND flash memory. Most previous studies have primarily focused on Z-interference degradation caused by the physical scaling of Z-dimensions, which has become a major obstacle in developing advanced multilevel cell technologies such as quad-level cell (QLC) and penta-level cell (PLC). However, with the physical scaling issue, the limitations of the fabrication process are causing cell variation. Nevertheless, research on Z-interference resulting from cell variation remains insufficient in existing studies. Therefore, we analyzed the impact of cell variation on threshold voltage (<inline-formula> <tex-math>${V}_{text {th}}$ </tex-math></inline-formula>) distribution through the Monte Carlo simulation, incorporating technology computer-aided design (TCAD) and experimental data. These results not only offer a comprehensive understanding of Z-interference but also provide valuable insights for formulating process design guidelines.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 3","pages":"1141-1145"},"PeriodicalIF":2.9,"publicationDate":"2025-02-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143521438","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Compact Modeling of Trap-Assisted Tunneling Current in 3-D NAND Flash Memory

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-19 DOI: 10.1109/TED.2025.3541603

Hyungjun Jo;Hyungcheol Shin

引用次数: 0