IEEE Transactions on Electron Devices最新文献_第6页

A Unified Model for MoS2 FETs Transfer Characteristic Based on Cubic Bezier Curves 基于三次Bezier曲线的MoS2场效应管转移特性统一模型

IF 3.6 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2026-09-01 Epub Date: 2026-07-21 DOI: 10.1109/TED.2026.3713144

Xing Su;Ziji Wang;Yifan Yuan;Min Sun;Yifei Zhang;Si-Ping Gao

{"title":"A Unified Model for MoS2 FETs Transfer Characteristic Based on Cubic Bezier Curves","authors":"Xing Su;Ziji Wang;Yifan Yuan;Min Sun;Yifei Zhang;Si-Ping Gao","doi":"10.1109/TED.2026.3713144","DOIUrl":"https://doi.org/10.1109/TED.2026.3713144","url":null,"abstract":"This article presents a unified compact model for the transfer characteristics of MoS2 field-effect transistors (FETs) based on cubic Bezier curves. The model is constructed by combining an area-gap criterion with a physics-based endpoint-reconstruction method. The area-gap criterion is used to determine the fitting window and the minimum polynomial order required for accurate representation, while the endpoint-reconstruction method maps physics-based endpoint current and derivative constraints into Bezier control points, thereby yielding a unified analytical expression. Key effects, including interface traps, drain-induced barrier lowering (DIBL), mobility degradation, and velocity saturation, are incorporated through endpoint constraints. The proposed model is explicit, nonpiecewise, and continuously differentiable from deep subthreshold to strong inversion. Validation results show good agreement with measured transfer characteristics under different device dimensions and bias conditions while accurately reproducing transconductance and higher order derivative behavior. The proposed model is therefore suitable for parameter extraction and circuit simulation of MoS2 FETs.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5387-5394"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902871","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Enhanced Long-Term Memory (LTM) of BTO-/ZQDs-Based Optoelectronic Synapse 基于BTO / zqds的光电突触的长期记忆增强

IF 3.6 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2026-09-01 Epub Date: 2026-07-31 DOI: 10.1109/TED.2026.3717010

Monu Kumar;Varun Goel;Yogesh Kumar

{"title":"Enhanced Long-Term Memory (LTM) of BTO-/ZQDs-Based Optoelectronic Synapse","authors":"Monu Kumar;Varun Goel;Yogesh Kumar","doi":"10.1109/TED.2026.3717010","DOIUrl":"https://doi.org/10.1109/TED.2026.3717010","url":null,"abstract":"This work investigates the enhancement of long-term memory (LTM) in optical synaptic photodetectors based on ferroelectric barium titanate (BTO) and ZnO quantum dots (ZQDs). The low-cost, solution-processed spin-coating technique is employed to fabricate the photodetectors, with successive deposition of BTO, ZQD, and Ag interdigitated metal–semiconductor–metal (MSM) electrodes on a quartz substrate. The ZQDs film was grown over the preannealed BTO layer (at <inline-formula> <tex-math>$700~^{circ }$ </tex-math></inline-formula>C). The complete BTO/ZQDs bilayer structure was finally annealed at <inline-formula> <tex-math>$450~^{circ }$ </tex-math></inline-formula>C. The variation in annealing temperatures introduces interface states between BTO and ZQDs, where the electrostatic potential arises from BTO. The self-polarization nature of BTO played a crucial role in enhancing photocharge carrier generation and suppressing charge recombination. The fabricated photodetector demonstrated a higher excitatory postsynaptic current (EPSC) under UV illumination and a significantly slower decay rate of photocurrent after UV exposure compared to a ZQDs-based device (without BTO). This slower decay indicates an improvement in LTM retention time (from 6.57 s for the device without BTO to 96.81 s for the BTO/ZQDs-based device) for 90% threshold, and it approaches ~3000 s for 30% threshold. This work presents the fabrication, characterization, and performance analysis of BTO/ZQDs/Ag-MSM photodetectors, emphasizing their potential for EPSC enhancement and LTM applications in neuromorphic computing. Also, the photosensitivity and responsivity of the BTO/ZQDs-based device are ~39 and 11.8 times higher than those of the ZQDs-based device, respectively.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5798-5803"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148903131","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Influence of Operating Regions on Synaptic Characteristics of Charge-Trapping Thin-Film Transistors 工作区域对电荷捕获薄膜晶体管突触特性的影响

IF 3.6 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2026-09-01 Epub Date: 2026-07-24 DOI: 10.1109/TED.2026.3714371

Younggeon Ko;Danyoung Cha;Sungsik Lee

{"title":"Influence of Operating Regions on Synaptic Characteristics of Charge-Trapping Thin-Film Transistors","authors":"Younggeon Ko;Danyoung Cha;Sungsik Lee","doi":"10.1109/TED.2026.3714371","DOIUrl":"https://doi.org/10.1109/TED.2026.3714371","url":null,"abstract":"We present a study on synaptic characteristics (e.g., the weight update and retention characteristics) dependent on the operating region of synaptic thin-film transistors (Syn-TFTs) based on a charge-trapping mechanism. For the memory phenomenon of the Syn-TFT, defects, such as trap states, in the insulator layer can deliberately be used for charge trapping. Based on this function, it can be expected that the synaptic characteristics are different depending on each operating region [i.e., above-threshold region (ATR) and subthreshold region (STR)]. To validate this, the static and pulsed characteristics of the fabricated Syn-TFTs need to be experimentally monitored. From the experiment results, it is found that the programming speed, as a measure of the weight-update characteristics, for the STR is faster compared to the ATR due to the exponential dependence in the STR. On the other hand, a longer retention time, as a performance metric of the retention characteristics, is observed for the ATR in comparison with the STR because of a higher gate read voltage in the ATR. So, a tradeoff relation between the programming speed and retention time is confirmed with respect to two operating regions. Besides the weight-update and retention characteristics, other synaptic characteristics (e.g., endurance and reliability) and their application are displayed and discussed, respectively.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5810-5816"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148903135","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Performance Enhancement of AlGaInP-Based Red Mini-LEDs Through Acetic Acid Chemical Treatment 醋酸化学处理增强algainp基红色迷你led的性能

IF 3.6 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2026-09-01 Epub Date: 2026-07-23 DOI: 10.1109/TED.2026.3712327

Linyue Meng;Qianxi Zhou;Jingjing Jiang;Siyuan Cui;Yuhui Gu;Sheng Liu;Shengjun Zhou

{"title":"Performance Enhancement of AlGaInP-Based Red Mini-LEDs Through Acetic Acid Chemical Treatment","authors":"Linyue Meng;Qianxi Zhou;Jingjing Jiang;Siyuan Cui;Yuhui Gu;Sheng Liu;Shengjun Zhou","doi":"10.1109/TED.2026.3712327","DOIUrl":"https://doi.org/10.1109/TED.2026.3712327","url":null,"abstract":"The enhancement of external quantum efficiency (EQE) and suppression of leakage current in AlGaInP-based red miniaturized light-emitting diodes (mini-LEDs) remain significant challenges, primarily due to the sidewall damage induced by inductively coupled plasma (ICP) etching. This damage introduces a high density of nonradiative recombination centers, severely limiting the device performance. This study demonstrates an effective sidewall treatment using acetic acid, with treatment durations of 0, 100, 200, and 300 s. Scanning electron microscopy (SEM) indicates selective etching of AlInP layers, which expands the sidewall area of the active region to improve light extraction. X-ray photoelectron spectroscopy (XPS) results confirm a significant decrease in the ratios of In-O-P and Ga-O bonds on the sidewall surfaces of the device with a 200-s acetic acid treatment. Consequently, the reverse leakage current is suppressed due to the reduction of surface defect density and the suppression of trap-assisted tunneling paths. Furthermore, the device with a 200-s acetic acid treatment exhibits a 13.6% improvement in peak EQE, compared to the untreated device. These results highlight acetic acid treatment as a promising, low-damage sidewall treatment strategy for advancing the performance and reliability of AlGaInP-based red mini-LEDs.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5609-5613"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148903224","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Mechanism of Short-Channel Effect Suppression in Double-Heterostructure p-GaN Gate AlGaN/GaN HEMTs 双异质结构p-GaN栅极AlGaN/GaN hemt短通道效应抑制机理

IF 3.6 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2026-09-01 Epub Date: 2026-07-22 DOI: 10.1109/TED.2026.3712303

Hidekazu Umeda;Tetsuzo Ueda;Yusuke Mori;Nobuya Mori

{"title":"Mechanism of Short-Channel Effect Suppression in Double-Heterostructure p-GaN Gate AlGaN/GaN HEMTs","authors":"Hidekazu Umeda;Tetsuzo Ueda;Yusuke Mori;Nobuya Mori","doi":"10.1109/TED.2026.3712303","DOIUrl":"https://doi.org/10.1109/TED.2026.3712303","url":null,"abstract":"This study compares single-heterostructure (SH) and double-heterostructure (DH) p-GaN gate AlGaN/GaN high-electron-mobility transistors (HEMTs) and clarifies how the DH structure suppresses short-channel effects (SCEs) during gate-length scaling. Experimentally, clear SCEs appear in short-channel SH devices, whereas they are strongly suppressed in the DH structure down to a gate length of <inline-formula> <tex-math>$0.5~upmu $ </tex-math></inline-formula>m. The short-channel-safe range, defined here by the absence of a negative threshold-voltage shift, is extended by at least threefold within the examined range. 2-D simulations reveal that the net negative interfacial sheet charge at the i-GaN channel/i-AlGaN back-barrier interface is the key origin of this improvement. This net negative interfacial charge raises the zero-bias channel barrier and increases the hole concentration near the p-GaN/i-AlGaN barrier interface, thereby suppressing both the drain-side lateral depletion of the p-GaN gate and the resulting localized <inline-formula> <tex-math>${E}_{C}$ </tex-math></inline-formula> lowering near the drain-side gate edge. These results show that the DH advantage arises from both zero-bias barrier enhancement and the suppression of drain-induced p-GaN gate depletion, thereby providing a physics-based design guideline for further scaling of p-GaN gate HEMTs.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5327-5334"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902652","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Investigation on Switching Characteristic Degradation and Single-Event Burnout Mechanism Caused by Ta Heavy Ions in p-GaN Gate HEMTs Ta重离子对p-GaN栅极hemt开关特性退化及单事件烧坏机制的研究

IF 3.6 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2026-09-01 Epub Date: 2026-07-14 DOI: 10.1109/TED.2026.3709773

Xuejing Sun;Shenglei Zhao;Xiufeng Song;Kunshu Wang;Lin Du;Zebin Kong;Longyang Yu;Shengrui Xu;Ga Zhang;Zhongxu Wang;Yachao Zhang;Shuzhen You;Yue Hao;Jincheng Zhang

{"title":"Investigation on Switching Characteristic Degradation and Single-Event Burnout Mechanism Caused by Ta Heavy Ions in p-GaN Gate HEMTs","authors":"Xuejing Sun;Shenglei Zhao;Xiufeng Song;Kunshu Wang;Lin Du;Zebin Kong;Longyang Yu;Shengrui Xu;Ga Zhang;Zhongxu Wang;Yachao Zhang;Shuzhen You;Yue Hao;Jincheng Zhang","doi":"10.1109/TED.2026.3709773","DOIUrl":"https://doi.org/10.1109/TED.2026.3709773","url":null,"abstract":"In this article, we investigate the switching characteristic degradation and single-event burnout mechanism of Ta high-energy particles on the p-GaN gate HEMTs under high-voltage bias. The irradiated device saturation current decreases and the <sc>on-resistance increases. The gate leakage current increases by two and three orders of magnitude at <sc>off and <sc>on states. The dynamic switching characteristics of irradiated devices in the circuit are characterized for the first time through double-pulse test (DPT). It is found that the conduction ability of irradiated devices is seriously affected at conduction state. Under 350-V high-voltage bias stress, the turn-on/off time of irradiated device increases by 20/12 ns and turn-on/off loss increases by 10.19/<inline-formula> <tex-math>$1.39~mu $ </tex-math></inline-formula>J at <inline-formula> <tex-math>${V}_{text {DS}} = {75}$ </tex-math></inline-formula> V. In addition, an obvious burnout point is viewed on the drain electrode. More significantly, high-energy incident particle Ta element is directly observed in the failure cavities for the first time. The potential burnout mechanism may be the heat accumulation in the GaN and substrate materials is difficult to release in a short time, resulting in the formation of cavities. The single-event effect (SEE) research of Ta particles on the p-GaN gate HEMTs is greatly significant on the development of GaN-based devices aerospace technology application in radiation environment.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5722-5728"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902834","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Sn Quasi-δ-Doped ε-(Al0.22Ga0.78)2O3/α-Ga2O3 MOS-HFET Exceeding 3-kV Breakdown Voltage Sn准δ掺杂ε-(Al0.22Ga0.78)2O3/α-Ga2O3 MOS-HFET超过3kv击穿电压

IF 3.6 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2026-09-01 Epub Date: 2026-07-09 DOI: 10.1109/TED.2026.3709701

Han-Yin Liu;Nei-En Chiu;Jia-Zhe Wu;Yu-Jie Ge;Chun-Chien Lo;Ko-Fan Hu

{"title":"Sn Quasi-δ-Doped ε-(Al0.22Ga0.78)2O3/α-Ga2O3 MOS-HFET Exceeding 3-kV Breakdown Voltage","authors":"Han-Yin Liu;Nei-En Chiu;Jia-Zhe Wu;Yu-Jie Ge;Chun-Chien Lo;Ko-Fan Hu","doi":"10.1109/TED.2026.3709701","DOIUrl":"https://doi.org/10.1109/TED.2026.3709701","url":null,"abstract":"The Sn quasi-<inline-formula> <tex-math>$delta $ </tex-math></inline-formula>-doped <inline-formula> <tex-math>$varepsilon $ </tex-math></inline-formula>-(Al<inline-formula> <tex-math>${}_{{0}.{22}}$ </tex-math></inline-formula>Ga<inline-formula> <tex-math>${}_{{0}.{78}}text {)}_{{2}}$ </tex-math></inline-formula>O3/<inline-formula> <tex-math>$alpha $ </tex-math></inline-formula>-Ga2O3 heterostructure was successfully grown by mist chemical vapor deposition, enabling simultaneous polytype and bandgap engineering in Ga2O3 devices. The heterostructure has a high sheet electron density of <inline-formula> <tex-math>$text {9. 4} times {10}^{{12}}$ </tex-math></inline-formula> cm<inline-formula> <tex-math>${}^{-{2}}$ </tex-math></inline-formula>, which directly serves as the channel of a metal–oxide–semiconductor heterostructure field-effect transistor (MOS-HFET). The fabricated device exhibits a low specific <sc>on-resistance of 64.6 m<inline-formula> <tex-math>$Omega cdot $ </tex-math></inline-formula>cm2 together with a high breakdown voltage exceeding 3 kV, resulting in a power figure of merit surpassing 139 MW/cm2. To the best of our knowledge, this work demonstrates for the first time a Ga2O3-based MOS-HFET that integrates polytype and bandgap engineering, offering a promising pathway toward high-voltage power electronics.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5729-5735"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902835","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Access-Induced Pass-Gate Bias Stress in Oxide-Semiconductor SRAM: Stress-Aware SPICE Analysis and SU-8 Passivation 氧化物半导体SRAM中通路诱导的通栅极偏置应力：应力感知SPICE分析和SU-8钝化

IF 3.6 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2026-09-01 Epub Date: 2026-07-28 DOI: 10.1109/TED.2026.3714366

Changwoo Han;Hyeonjung Park;Yejoo Choi;Junseok Kim;Jaehyuk Lim;Myeongjae Choi;Huiseong Shin;Seungjoon Jeong;Changhwan Shin

{"title":"Access-Induced Pass-Gate Bias Stress in Oxide-Semiconductor SRAM: Stress-Aware SPICE Analysis and SU-8 Passivation","authors":"Changwoo Han;Hyeonjung Park;Yejoo Choi;Junseok Kim;Jaehyuk Lim;Myeongjae Choi;Huiseong Shin;Seungjoon Jeong;Changhwan Shin","doi":"10.1109/TED.2026.3714366","DOIUrl":"https://doi.org/10.1109/TED.2026.3714366","url":null,"abstract":"Oxide-semiconductor static random-access memory (SRAM) suffers from gate-bias-stress vulnerability in word-line (WL)-driven access thin-film transistors (TFTs). We identify row-level WL activation as an intrinsic “access-induced” stress source that also biases pass-gate TFTs in unselected cells within the same row. SnO and indium--gallium--zinc oxide (IGZO) TFTs are characterized and calibrated using Berkeley short-channel IGFET model--common multi-gate (BSIM-CMG), enabling stress-aware SPICE simulations. Positive bias stress (PBS) induces pronounced transfer-curve shifts in unpassivated IGZO pass-gate TFTs, while SU-8 passivation effectively suppresses the degradation. By incorporating PBS-calibrated pass-gate models into SRAM analysis, we observe a tradeoff in which the read static noise margin (RSNM) degrades, whereas the write noise margin (WNM) improves with stress time. Notably, when SU-8 passivation is applied to the pass-gate devices, the SRAM read/write margins exhibit minimal variation even under extended PBS. These results demonstrate, using SU-8 as a proof-of-concept (PoC) encapsulation, that suppressing pass-gate bias-stress drift is an effective strategy for stabilizing oxide semiconductor SRAM under repeated WL accesses.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5535-5539"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902880","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Design and Fabrication of a WLP-Packaged Ultrawideband BAW Filter Based on Al0.7Sc0.3N Film With Cap-Wafer IPD Matching Inductors 基于Al0.7Sc0.3N薄膜的wlp封装超宽带BAW滤波器的设计与制造

IF 3.6 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2026-09-01 Epub Date: 2026-08-05 DOI: 10.1109/TED.2026.3717005

Danyu Mu;Weipeng Xuan;Gang Liu;Rui Ding;Feng Gao;Hao Jin;Jikui Luo;Shurong Dong

{"title":"Design and Fabrication of a WLP-Packaged Ultrawideband BAW Filter Based on Al0.7Sc0.3N Film With Cap-Wafer IPD Matching Inductors","authors":"Danyu Mu;Weipeng Xuan;Gang Liu;Rui Ding;Feng Gao;Hao Jin;Jikui Luo;Shurong Dong","doi":"10.1109/TED.2026.3717005","DOIUrl":"https://doi.org/10.1109/TED.2026.3717005","url":null,"abstract":"This work reports an ultrawideband bulk acoustic wave (BAW) filter based on the codesign of a high-effective coupling coefficient (<inline-formula> <tex-math>${k}_{textit {eff}}^{{2}}text {)}$ </tex-math></inline-formula> Al0.7Sc0.3N resonator and wafer-level-packaging (WLP) compatible cap-wafer integrated passive device (IPD) matching inductors. The fabricated BAW resonators exhibit a <inline-formula> <tex-math>${k}_{textit {eff}}^{{2}}$ </tex-math></inline-formula> of 21.1% and a maximum Bode Q of 690. The 2-<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>m-thick Au cap-wafer inductors provide an inductance of approximately 0.95 nH and a measured Q value of about 16 at 3 GHz. The cap-wafer inductors are introduced at the filter ports to reshape the port impedance and maintain a low voltage standing wave ratio (VSWR) across the enlarged passband without requiring PCB-level or postpackaging matching components. The resulting filter achieves a center frequency of 3.1 GHz, a 355-MHz 3-dB bandwidth (11.5% fractional bandwidth), an in-band VSWR <inline-formula> <tex-math>$le 1.5$ </tex-math></inline-formula>, out-of-band rejection > 36 dB, and a minimum insertion loss of −1.53 dB. The packaged filter also exhibits a temperature coefficient of frequency (TCF) of −27 ppm/°C, a measured <inline-formula> <tex-math>${mathrm{P}}_{text {1$,$ {dB}}}$ </tex-math></inline-formula> of 35 dBm, and a compact WLP size of <inline-formula> <tex-math>$1.1times 0.9times 0.3$ </tex-math></inline-formula> mm. Failure analysis further indicates that the power-induced degradation is mainly associated with the BAW resonators rather than the cap-wafer inductors. These results demonstrate that cap-wafer IPD inductors provide an effective device–package–matching codesign route for wideband, miniaturized, and manufacturable BAW filters.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5846-5853"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902895","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

On-the-Fly Characterization and Modeling of PBTI/NBTI in BEOL Oxide FETs BEOL氧化场效应管中PBTI/NBTI的动态表征与建模

IF 3.6 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2026-09-01 Epub Date: 2026-07-15 DOI: 10.1109/TED.2026.3709791

Hyun Jae Lee;Hyeonwoo Park;Faaiq Waqar;Chengyang Zhang;Jaewon Shin;Eknath Sarkar;Hwan Kim;Jongho Park;Daewon Ha;Asif Khan;Shimeng Yu;Suman Datta

{"title":"On-the-Fly Characterization and Modeling of PBTI/NBTI in BEOL Oxide FETs","authors":"Hyun Jae Lee;Hyeonwoo Park;Faaiq Waqar;Chengyang Zhang;Jaewon Shin;Eknath Sarkar;Hwan Kim;Jongho Park;Daewon Ha;Asif Khan;Shimeng Yu;Suman Datta","doi":"10.1109/TED.2026.3709791","DOIUrl":"https://doi.org/10.1109/TED.2026.3709791","url":null,"abstract":"Bias temperature instability (BTI) in the DRAM access transistors increasingly evolves under alternating stress and relaxation conditions, where conventional DC-based reliability analysis fails to capture cycle-resolved degradation behavior. Such an operation inherently introduces recovery-dominant dynamics and time-dependent weighting of multiple BTI components, necessitating an AC-aware characterization and modeling framework. In this work, we first experimentally demonstrate full-cycle BTI evolution using on-the-fly (OTF) threshold voltage tracking in back-end-of-line (BEOL)-compatible dual-gated oxide channel transistors under both positive BTI (PBTI) and negative BTI (NBTI) conditions, including <sc>off-state stress regimes. Building on these observations, we develop a cycle-resolved AC BTI model by extending DC stretched-exponential formulations into a closed-form framework, enabling a continuous tracking of stress and recovery sequences. The proposed model is quantitatively validated against multicondition DC and AC measurements, allowing the separation of distinct BTI components and the extraction of their characteristic time constants. Finally, a recovery-pulse-assisted access scheme is assessed, demonstrating that intentional scheduling of relaxation windows can effectively suppress long-term BTI accumulation under repeated access scenarios.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5688-5694"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902987","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0