IEEE Transactions on Electron Devices最新文献_第6页

Radiation Degradation and Mitigation of an Ultrathin SOI SPAD Using a Perimeter Gate

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-27 DOI: 10.1109/TED.2025.3543789

Tom Klauner;Nicolas Roisin;Ottilie Bonfanti;Iman Sabri Alirezaei;Nicolas André;Denis Flandre

{"title":"Radiation Degradation and Mitigation of an Ultrathin SOI SPAD Using a Perimeter Gate","authors":"Tom Klauner;Nicolas Roisin;Ottilie Bonfanti;Iman Sabri Alirezaei;Nicolas André;Denis Flandre","doi":"10.1109/TED.2025.3543789","DOIUrl":"https://doi.org/10.1109/TED.2025.3543789","url":null,"abstract":"This work investigates the robustness of an ultrathin backside-illuminated (BSI) silicon-on-insulator (SOI) single-photon avalanche diode (SPAD) against gamma-ray irradiation for space applications. Experimental results demonstrate a breakdown voltage shift in the studied SPAD from 10.17 to 9.95 V after a total ionizing dose (TID) of 132 krad(Si). An increase in dark count rate (DCR) from 1490 to 2700 cps/<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>m2 at 1 V excess bias is shown at this dose. TCAD simulations explain the role of the oxide-trapped charges, induced by irradiation in the insulating layer surrounding the active region, on the SPAD performance. These trapped charges shift the peak electric field, leading to premature breakdown while the extension of the active area affected by impact ionization increases the DCR. Further simulations show that implementing a perimeter-gated structure and reducing oxide thickness can effectively mitigate these effects by leveraging capacitive effects, preventing a breakdown voltage shift. The perimeter gate (PG) lowers the simulated DCR after irradiation from 2700 to 1365 cps/<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>m2, thereby enhancing the radiation resilience of ultrathin SOI SPADs beyond a TID of 132 krad(Si).","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1844-1850"},"PeriodicalIF":2.9,"publicationDate":"2025-02-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740158","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Low-Frequency Noise Characterization of BEOL Metal–Insulator–Metal Capacitors

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-27 DOI: 10.1109/TED.2025.3542748

G. Giusi;Nishant Saini;K. Croes;I. Ciofi;G. Scandurra;C. Ciofi;D. Tierno

{"title":"Low-Frequency Noise Characterization of BEOL Metal–Insulator–Metal Capacitors","authors":"G. Giusi;Nishant Saini;K. Croes;I. Ciofi;G. Scandurra;C. Ciofi;D. Tierno","doi":"10.1109/TED.2025.3542748","DOIUrl":"https://doi.org/10.1109/TED.2025.3542748","url":null,"abstract":"Dielectrics are fundamental building blocks in both analog and digital electronic devices, serving various purposes, including insulating metal lines and interconnect levels in the back-end-of-line (BEOL). In this article, we investigate the leakage and low-frequency noise (LFN) properties of three different types of dielectrics, from the low-k organo-silicate glass (OSG3.0) and silica (SiO2) to the high-k alumina (Al2O3). Test structures are large area (up to <inline-formula> <tex-math>$200times 200~mu $ </tex-math></inline-formula>m2) metal-insulator–metal (MIM) capacitors, with TiN or TaNTa electrodes, that mimic well the BEOL architecture. In particular, to the best of our knowledge, no LFN study has been reported for OSGs, which are the most used class of dielectrics in the BEOL. From a physical side, current-voltage (I–V) characterization reveals that in all three dielectrics, the conduction is bulk dominated and assisted by traps, rather than limited by electrode injection. LFN measurements (LFNMs) show a typical 1/f current power spectral density (PSD) (<inline-formula> <tex-math>${S}_{I}$ </tex-math></inline-formula>) for all three dielectrics with a strongly bias-dependent gate noise parameter <inline-formula> <tex-math>$(text {GNP})propto {S}_{I}/{I}^{{2}}$ </tex-math></inline-formula> (I being the dc current), suggesting a highly nonuniform energy trap distribution, especially for Al2O3 devices. SiO2-based capacitors demonstrated the lowest leakage at equivalent fields and superior noise performance at comparable leakage currents. Al2O3 devices exhibited the highest leakage, while OSG3.0 samples showed the poorest noise characteristics, marked by pronounced electrical instability and nonstationary random telegraph signal (RTS) events.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1933-1938"},"PeriodicalIF":2.9,"publicationDate":"2025-02-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740178","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

GT3: An Open-Source 3-nm GAAFET PDK and Platform for End-to-End Evaluation of Emerging Technologies GT3：用于新兴技术端到端评估的开源 3 纳米 GAAFET PDK 和平台

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-27 DOI: 10.1109/TED.2025.3540760

Da Eun Shim;Piyush Kumar;Akshata Ashok Kini;Meghana Mallikarjuna;Md. Nahid Haque Shazon;Azad Naeemi

{"title":"GT3: An Open-Source 3-nm GAAFET PDK and Platform for End-to-End Evaluation of Emerging Technologies","authors":"Da Eun Shim;Piyush Kumar;Akshata Ashok Kini;Meghana Mallikarjuna;Md. Nahid Haque Shazon;Azad Naeemi","doi":"10.1109/TED.2025.3540760","DOIUrl":"https://doi.org/10.1109/TED.2025.3540760","url":null,"abstract":"In this article, we present a comprehensive end-to-end evaluation platform for various front-end-of-line (FEOL) and back-end-of-line (BEOL) technology options at the 3-nm technology node. Based on TCAD modeling of FE and BE, we have developed a 3-nm GAAFET-based process design kit (PDK). We have developed a 6-track standard cell library including 65 cells with a library height of 144 nm. Based on TCAD modeling of interconnects, we have evaluated the resistance of the entire BEOL stack using ruthenium for lower metal levels (M0–M3) and copper for higher metal levels (M4–M13). Based on place and route (PnR) studies using our PDK, we have analyzed the impact of high aspect ratio (AR) Ru interconnects at M2 and M3 in terms of performance using benchmark designs. Our results show that using Ru interconnects improves the circuit performance by up to 10.4% compared with Cu interconnects and that increasing the AR generally results in performance degradation due to the increase in capacitance and via resistances. We have observed a 5.9% and 4% degradation in performance for AES and LDPC, respectively, when moving from AR2 to AR6 local interconnects. However, adding an airgap can improve the higher AR Ru interconnect cases and AR4 with airgap case shows the most performance improvement with an overall 19.7% improvement compared with Cu. This case study also serves as an example that shows the importance of an end-to-end evaluation platform.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1582-1588"},"PeriodicalIF":2.9,"publicationDate":"2025-02-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

On the Interaction Between Hot Carrier Degradation (HCD) and Electrical-Induced Breakdown (EiB) in Advanced FinFET Nodes

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-26 DOI: 10.1109/TED.2025.3543330

Yongkang Xue;Yilin Hu;Maokun Wu;Chengyang Zhang;Da Wang;Jianfu Zhang;Pengpeng Ren;Xing Wu;Runsheng Wang;Zhigang Ji;Ru Huang

{"title":"On the Interaction Between Hot Carrier Degradation (HCD) and Electrical-Induced Breakdown (EiB) in Advanced FinFET Nodes","authors":"Yongkang Xue;Yilin Hu;Maokun Wu;Chengyang Zhang;Da Wang;Jianfu Zhang;Pengpeng Ren;Xing Wu;Runsheng Wang;Zhigang Ji;Ru Huang","doi":"10.1109/TED.2025.3543330","DOIUrl":"https://doi.org/10.1109/TED.2025.3543330","url":null,"abstract":"The interaction between hot carrier degradation (HCD) and electrical-induced breakdown (EiB) in FinFETs at advanced technology nodes is investigated for the first time. Unlike previous findings in planar FETs, HCD significantly impacts EiB in FinFETs, with opposite effects on n- and p-type. Our analysis reveals that the competitive mechanism between defect-induced leakage increase and defect-induced electric field reduction is the primary cause of these differences. For nFinFETs, HCD-induced defects lead to significant leakage current and substantial Joule heating, both of which accelerate the breakdown of interconnect M0 metal. Conversely, for pFinFETs, the leakage current increase is negligible, while fixed charges generated in the high-k (HK) layer reduce the internal electric field within the dielectric, thereby slowing down EiB. The study also traces the physical origins of defects caused by HCD, identifying hydroxyl-E<inline-formula> <tex-math>$^{prime }$ </tex-math></inline-formula> (H-E<inline-formula> <tex-math>$^{prime }$ </tex-math></inline-formula>) centers in the IL layer and oxygen vacancy (Vo) in the HK layer as key contributors to the differing leakage behaviors of n- and p-FinFETs. To address the reliability challenges posed by HCD on EiB in nFinFETs, a novel M0 metal design methodology that considers the interaction between HCD and EiB is proposed, offering a pathway to improve interconnect reliability for advanced technology nodes.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1604-1611"},"PeriodicalIF":2.9,"publicationDate":"2025-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740214","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Novel MEMS Microwave Power Detection Chip Based on Multibeam Structure

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-26 DOI: 10.1109/TED.2025.3543471

Haoyu Sun;Yuxiang Liang;Yuzhao Wu;Debo Wang

{"title":"A Novel MEMS Microwave Power Detection Chip Based on Multibeam Structure","authors":"Haoyu Sun;Yuxiang Liang;Yuzhao Wu;Debo Wang","doi":"10.1109/TED.2025.3543471","DOIUrl":"https://doi.org/10.1109/TED.2025.3543471","url":null,"abstract":"In order to effectively improve the sensitivity performance of micro-electromechanical system (MEMS) microwave power detection chips, a MEMS microwave power detection chip based on a multibeam structure is proposed in this work. A four-beam parallel structure is designed, and the output capacitance of the chip is increased, thereby enhancing its sensitivity. The risk of collapse associated with excessively long single beams is also mitigated, reducing the occurrence of adhesion. The sensitivity and microwave performance of the chip have been theoretically studied, and the chip has been fabricated and measured. Measured results show that in the range from 8 to 12 GHz, the results of <inline-formula> <tex-math>${S}_{{11}}$ </tex-math></inline-formula> range from −18.5 to −15.3 dB, while the theoretical results range from −26.8 to −25.2 dB. The reflection ratio deviation of input power is 1.2%. The measured results of <inline-formula> <tex-math>${S}_{{21}}$ </tex-math></inline-formula> range from −3.6 to −3.4 dB, while the optimized theoretical results range from −3.42 to −2.27 dB, with an error of 1.8% between them. The measured sensitivity of the chip is 72.76 fF/W, while the theoretical value of the model is 73.5 fF/W, resulting in an error of only 1.01%. Compared to existing structures, the four-beam parallel structure achieves a sensitivity improvement of up to 38.9 times at its maximum and 1.4 times at its minimum. Therefore, the MEMS microwave power detection chip based on a multibeam structure proposed in this work provides a valuable reference for improving sensitivity performance.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"2006-2012"},"PeriodicalIF":2.9,"publicationDate":"2025-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740293","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Data-Driven Remaining Useful Life Prediction Method for Power MOSFETs Considering Nonlinear Dynamical Behaviors

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-25 DOI: 10.1109/TED.2025.3543149

Jianmin Yi;Cunbao Ma;Hao Wang

{"title":"A Data-Driven Remaining Useful Life Prediction Method for Power MOSFETs Considering Nonlinear Dynamical Behaviors","authors":"Jianmin Yi;Cunbao Ma;Hao Wang","doi":"10.1109/TED.2025.3543149","DOIUrl":"https://doi.org/10.1109/TED.2025.3543149","url":null,"abstract":"Prognostic and health management (PHM) techniques for power MOSFETs are getting increasing attention recently. A variety of methods have been developed and implemented to conduct lifetime predictions for power MOSFETs. Nevertheless, most of the current studies seem to have limitations in a comprehensive understanding of the nonlinear dynamical degradation process. Single parameter-oriented prediction methods may ignore deeper dynamical behaviors during the degradation. Besides, the methods are incapable of tackling abnormal degradation paths such as a sudden rise. In view of the limitations, a data-driven prediction method taking into consideration the nonlinear dynamical behaviors is developed. To analyze nonlinear and chaotic properties, phase space reconstruction (PSR) is conducted on the time series degradation data. Then, the largest Lyapunov exponent and power spectrum are calculated against aging time. The evolution of nonlinear and chaotic behaviors during the degradation is investigated. Thereby, a novel health indicator (HI) taking into account nonlinear indices is constructed. Subsequently, a prediction method based on a long short-term memory (LSTM) network is proposed. The developed method is validated by an actual degradation dataset. The results show that the developed method is capable of addressing the limitations with desirable accuracies.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1885-1892"},"PeriodicalIF":2.9,"publicationDate":"2025-02-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740302","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Impacts of Postdeposition Annealing on Interface Properties of HfO2/Si0.7Ge0.3 Gate Stacks With TMA Predoping 沉积后退火对掺杂 TMA 的 HfO2/Si0.7Ge0.3 栅极叠层界面特性的影响

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-25 DOI: 10.1109/TED.2025.3543467

Xiaotong Mao;Yu Zhou;Xiaofeng Jia;Xi Zhang;Haoyan Liu;Shengkai Wang;Xiaolei Wang;Yongliang Li

{"title":"Impacts of Postdeposition Annealing on Interface Properties of HfO2/Si0.7Ge0.3 Gate Stacks With TMA Predoping","authors":"Xiaotong Mao;Yu Zhou;Xiaofeng Jia;Xi Zhang;Haoyan Liu;Shengkai Wang;Xiaolei Wang;Yongliang Li","doi":"10.1109/TED.2025.3543467","DOIUrl":"https://doi.org/10.1109/TED.2025.3543467","url":null,"abstract":"The impacts of postdeposition annealing (PDA) on the electrical characteristics and structural properties of HfO2/Si0.7Ge0.3 gate stacks using trimethylaluminum (TMA) predoping are investigated in detail. The interface state density (<inline-formula> <tex-math>${D} _{text {it}}$ </tex-math></inline-formula>) first decreases and then increases under the PDA from <inline-formula> <tex-math>$300~^{circ }$ </tex-math></inline-formula>C to <inline-formula> <tex-math>$600~^{circ }$ </tex-math></inline-formula>C. Compared with PDA of <inline-formula> <tex-math>$300~^{circ }$ </tex-math></inline-formula>C, the minimum <inline-formula> <tex-math>${D} _{text {it}}$ </tex-math></inline-formula> of <inline-formula> <tex-math>$8times 10^{{11}}$ </tex-math></inline-formula> eV<inline-formula> <tex-math>$^{-{1}} cdot $ </tex-math></inline-formula>cm<inline-formula> <tex-math>$^{-{2}}$ </tex-math></inline-formula> is achieved at PDA of <inline-formula> <tex-math>$400~^{circ }$ </tex-math></inline-formula>C because the formation of Ge-O bonds at the interface is more effectively suppressed. As the PDA temperature further increases to <inline-formula> <tex-math>$500~^{circ }$ </tex-math></inline-formula>C and <inline-formula> <tex-math>$600~^{circ }$ </tex-math></inline-formula>C, the diffusion of Al into HfO2 causes the formation of an increasing number of Al-O bonds, and the oxygen defects within the Al-O network facilitates the diffusion of additional oxygen to the interface, resulting in the formation of more GeO that contribute to the deterioration of <inline-formula> <tex-math>${D} _{text {it}}$ </tex-math></inline-formula>.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1612-1616"},"PeriodicalIF":2.9,"publicationDate":"2025-02-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Investigation of Random Telegraph Noise Scaling Dependency in 3-D NAND Using Monte Carlo Simulator

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-25 DOI: 10.1109/TED.2025.3542008

Eunseok Oh;Hyungcheol Shin

{"title":"Investigation of Random Telegraph Noise Scaling Dependency in 3-D NAND Using Monte Carlo Simulator","authors":"Eunseok Oh;Hyungcheol Shin","doi":"10.1109/TED.2025.3542008","DOIUrl":"https://doi.org/10.1109/TED.2025.3542008","url":null,"abstract":"Random telegraph noise (RTN) shifts the threshold voltage (<inline-formula> <tex-math>${V} _{t}$ </tex-math></inline-formula>) of 3-D <sc>nand</small> flash memory cells, making it a major cause of device malfunction. As device scaling continues, RTN has become an increasingly significant factor affecting device performance. The aim of this study is to develop a simulator that predicts the distribution of <inline-formula> <tex-math>${V} _{t}$ </tex-math></inline-formula> shifts induced by RTN in scaled 3-D <sc>nand</small> flash memory. Previous RTN analysis methods rely heavily on numerous simulations or measurements, which are not only time-consuming but also limited in predicting the effects of device scaling on RTN-induced <inline-formula> <tex-math>${V} _{t}$ </tex-math></inline-formula> shifts. To address these limitations, we developed a novel RTN Monte Carlo simulator that integrates a previously developed artificial neural network (ANN)-based machine learning (ML) model with a Markov process for trap occupancy states. Using this simulator, we comprehensively analyzed RTN effects in 3-D <sc>nand</small> devices with multiple traps, extracted the corresponding decay constants (<inline-formula> <tex-math>$lambda $ </tex-math></inline-formula>), and modeled the dependence of <inline-formula> <tex-math>$lambda $ </tex-math></inline-formula> on device physical parameters. The simulator provides flexibility in generating large-scale RTN data without the need for additional simulations or measurements, significantly reducing computation time while maintaining accuracy.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1750-1755"},"PeriodicalIF":2.9,"publicationDate":"2025-02-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740394","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Highly Efficient AlGaInP-Based Micro-LEDs Achieved by Plasma Sidewall Treatment

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-24 DOI: 10.1109/TED.2025.3541621

Min-Hua Li;Xi Zheng;Kang Zhang;Chen-Ming Zhong;Zhi-Cheng Lu;Yi-Jun Lu;Zhong Chen;Wei-Jie Guo

引用次数: 0

Omni 3D: BEOL-Compatible 3-D Logic With Omnipresent Power, Signal, and Clock

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-02-24 DOI: 10.1109/TED.2025.3537955

Suhyeong Choi;Carlo Gilardi;Paul Gutwin;Robert M. Radway;Tathagata Srimani;Subhasish Mitra

{"title":"Omni 3D: BEOL-Compatible 3-D Logic With Omnipresent Power, Signal, and Clock","authors":"Suhyeong Choi;Carlo Gilardi;Paul Gutwin;Robert M. Radway;Tathagata Srimani;Subhasish Mitra","doi":"10.1109/TED.2025.3537955","DOIUrl":"https://doi.org/10.1109/TED.2025.3537955","url":null,"abstract":"This article presents Omni 3D—a 3-D-stacked device architecture that is naturally enabled by back-end-of-line (BEOL)-compatible transistors. Omni 3D interleaves metal layers with 3-D-stacked nFETs and pFETs. Thus, the signal and power routing layers have fine-grained, all-sided access to the field-effect transistor (FET) active regions maximizing 3-D standard cell design flexibility. This is in sharp contrast to approaches such as back-side power delivery network (BSPDN), complementary FETs (CFETs), and stacked FETs. Importantly, the routing flexibility of Omni 3D is enabled by double-side metal and interleaved metal (IM) for inter- and intracell routing, respectively. In this work, we explore Omni 3D variants (e.g., both with and without the IM) and optimize these variants using a virtual-source BEOL-FET compact model. We establish a physical design flow that efficiently uses the double-side routing in Omni 3D and perform a thorough design technology co-optimization (DTCO) of Omni 3D device architecture on several design points. From our design flow, we project <inline-formula> <tex-math>${2.0}times $ </tex-math></inline-formula> improvement in the energy-delay product (EDP) and <inline-formula> <tex-math>${1.5}times $ </tex-math></inline-formula> reduction in area on average across our benchmark circuits compared with the state-of-the-art CFETs with BSPDN.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"2038-2045"},"PeriodicalIF":2.9,"publicationDate":"2025-02-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10902043","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740354","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0