IEEE Transactions on Electron Devices最新文献_第6页

IEEE Transactions on Electron Devices Publication Information IEEE电子设备出版信息汇刊

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-03-31 DOI: 10.1109/TED.2025.3547545

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Electromigration Failure Characterization Using Laser-Induced Nonuniform Heating 激光诱导非均匀加热电迁移失效表征

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-03-31 DOI: 10.1109/TED.2025.3549743

Srijita Patra;Bahar Ajdari;Ricardo Ascazubi;Ratnesh Kumar

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IEEE Transactions on Electron Devices Information for Authors IEEE电子器件信息汇刊

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-03-31 DOI: 10.1109/TED.2025.3547555

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Call for Papers: Journal of Lightwave Technology Special Issue on OFS-29 论文征集：光波技术杂志OFS-29特刊

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-03-31 DOI: 10.1109/TED.2025.3547551

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High Responsivity and Wide Bandwidth SiGe/Si Phototransistor for Optical Interconnection 用于光互连的高响应性和宽带宽SiGe/Si光电晶体管

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-03-31 DOI: 10.1109/TED.2025.3552363

Hongyun Xie;Yunpeng Ge;Zimai Xu;Ziming Liu;Yudong Ma;Xiaoyan Yi;Wanrong Zhang

{"title":"High Responsivity and Wide Bandwidth SiGe/Si Phototransistor for Optical Interconnection","authors":"Hongyun Xie;Yunpeng Ge;Zimai Xu;Ziming Liu;Yudong Ma;Xiaoyan Yi;Wanrong Zhang","doi":"10.1109/TED.2025.3552363","DOIUrl":"https://doi.org/10.1109/TED.2025.3552363","url":null,"abstract":"Silicon-based hetero-junction phototransistor (HPT) is a potential optical detector promising for communication links in optic-interconnect network due to their advantages of low cost, high internal gain, high sensitivity, and compatibility with CMOS processes. In this work, a SiGe/Si HPT with double-zone base is designed and optimized to provide high responsivity and outstanding frequency characteristics simultaneously. The SiGe HPTs with different window positions and areas are fabricated using BiCMOS-compatible mesa process, and the influence of transverse parameters on HPT performance is analyzed comprehensively. With this design, a maximum optical responsivity of 8.52 A/W and a maximum optical 3 dB bandwidth of 638 MHz are demonstrated. The responsivity bandwidth product achieves <inline-formula> <tex-math>$4.69~text {GHz}cdot text {A}/text {W}$ </tex-math></inline-formula> with <inline-formula> <tex-math>$50times 50~mu $ </tex-math></inline-formula>m2 optical window on emitter mesa under 850 nm incident light, which is expected to be applied in silicon-based optical connecting technology to simplify the optical receiving circuits and lower its power consumption.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 5","pages":"2417-2423"},"PeriodicalIF":2.9,"publicationDate":"2025-03-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144073229","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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Call for Nominations for Editor-in-Chief: IEEE Transactions on Semiconductor Manufacturing 呼吁提名主编：IEEE半导体制造汇刊

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-03-31 DOI: 10.1109/TED.2025.3547547

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Call for Papers for a Special Issue of IEEE Transactions on Materials for Electron Devices: Exploration of the Exciting World of Multifunctional Oxide-Based Electronic Devices: From Material to System-Level Applications IEEE电子器件材料特刊征文：探索多功能氧化物基电子器件的激动人心的世界：从材料到系统级应用

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-03-31 DOI: 10.1109/TED.2025.3547549

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Alleviated Asymmetry in Carrier Transport With V-Shaped Multiple Quantum Wells in AlGaN-Based DUV LEDs 氮化镓DUV led中v形多量子阱载流子输运的非对称性

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-03-28 DOI: 10.1109/TED.2025.3552359

Ying Qi;Hang Zhou;Mengran Liu;Chao Liu

{"title":"Alleviated Asymmetry in Carrier Transport With V-Shaped Multiple Quantum Wells in AlGaN-Based DUV LEDs","authors":"Ying Qi;Hang Zhou;Mengran Liu;Chao Liu","doi":"10.1109/TED.2025.3552359","DOIUrl":"https://doi.org/10.1109/TED.2025.3552359","url":null,"abstract":"AlGaN-based deep-ultraviolet light-emitting diodes (DUV LEDs) still suffer from relatively low light output power (LOP) and poor external quantum efficiency (EQE) due to the severe electron leakage and hole-blocking effects. Electrons tend to accumulate in the last quantum well (LQW) and escape from the active region because of the weak confinement ability of the quantum barriers (QBs). Besides, the polarization-induced positive charges at the last QB (LQB)/p-type electron blocking layer (p-EBL) interface will attract electrons and consume holes for nonradiative recombination, leading to inadequate carrier concentration in the active region. In this article, we propose DUV LEDs with V-shaped multiple quantum wells (MQWs) to modulate the distribution of carriers in the active region. With the V-shaped MQWs, carriers are inclined to accumulate in the middle quantum well (QW) instead of the last one, and the polarization-induced electric field in the middle QW is also well alleviated, contributing to improved radiative recombination rates. Furthermore, the original positive sheet charges at the LQB/p-EBL interface are converted into negative ones, which is beneficial for suppressing electron overflow and increasing hole injection efficiency. Therefore, the EQE is remarkably improved by 48.1% at an injection current of 150 A/cm2. The V-shaped MQWs provide an effective solution to realize DUV LEDs with high performance.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 5","pages":"2431-2437"},"PeriodicalIF":2.9,"publicationDate":"2025-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144073222","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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Trench-Gate Bipolar Transistor With Partially Buried Carrier Storage Layer for Enhanced Blocking and Switching Characteristics 具有部分埋置载流子存储层的沟槽栅双极晶体管，用于增强阻塞和开关特性

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-03-28 DOI: 10.1109/TED.2025.3552365

Changhao Wang;Jianbin Guo;Jingjing Tan;Qingqing Sun;David Wei Zhang;Hao Zhu

{"title":"Trench-Gate Bipolar Transistor With Partially Buried Carrier Storage Layer for Enhanced Blocking and Switching Characteristics","authors":"Changhao Wang;Jianbin Guo;Jingjing Tan;Qingqing Sun;David Wei Zhang;Hao Zhu","doi":"10.1109/TED.2025.3552365","DOIUrl":"https://doi.org/10.1109/TED.2025.3552365","url":null,"abstract":"In this work, an insulated gate bipolar transistor (IGBT) with partially buried carrier storage (PBCS) layer is proposed and studied. By embedding the highly doped carrier storage (CS) layer into the base region, the electric field intensity near the CS layer is reduced, thus avoiding the breakdown voltage (BV) drop that occurs in conventional carrier stored trench-gate bipolar transistor (CSTBT) devices. The simulation results suggest that the doping concentration of the CS layer in the proposed PBCS device is increased to <inline-formula> <tex-math>$6 times 10^{{17}}$ </tex-math></inline-formula> cm<inline-formula> <tex-math>${}^{-{3}}$ </tex-math></inline-formula>, and the <sc>on</small>-state voltage (<inline-formula> <tex-math>${V}_{text {ON}}$ </tex-math></inline-formula>) is lowered by 0.1 V without degrading the BV. At the same time, the Miller capacitance is reduced by 39% due to the lower silicon doping concentration at the bottom of the trench gate. Besides, by combining the CS layer region with additional hole-extracting channels, the device switching characteristics are significantly improved with 15% and 13% reduction in turn-on and turn-off loss, respectively. The proposed PBCS device is fully compatible with the existing IGBT manufacturing process, which paves promising pathways for future high-performance power electronic device applications.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 5","pages":"2480-2485"},"PeriodicalIF":2.9,"publicationDate":"2025-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144072928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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Impact of the Endurance Measurement Methodology on Ferroelectric Field Effect Transistor Under the Capacitive Nondestructive Read 电容式无损读取下铁电场效应晶体管寿命测量方法的影响

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2025-03-26 DOI: 10.1109/TED.2025.3552545

Omkar Phadke;Prasanna Venkatesan Ravindran;Halid Mulaosmanovic;Stefan Dünkel;Sven Beyer;Asif Khan;Suman Datta;Shimeng Yu

{"title":"Impact of the Endurance Measurement Methodology on Ferroelectric Field Effect Transistor Under the Capacitive Nondestructive Read","authors":"Omkar Phadke;Prasanna Venkatesan Ravindran;Halid Mulaosmanovic;Stefan Dünkel;Sven Beyer;Asif Khan;Suman Datta;Shimeng Yu","doi":"10.1109/TED.2025.3552545","DOIUrl":"https://doi.org/10.1109/TED.2025.3552545","url":null,"abstract":"In this article, the impact of the measurement delay and connection to the body contact on the reliability of the ferroelectric field effect transistor (FeFET) under the capacitive nondestructive read mode is studied. Specifically, the endurance characteristics of the FeFET’s gate-to-source/drain capacitance are analyzed. The study is performed on 28-nm bulk Si FeFET technology, with body contact either grounded or floating. We find that the FeFET device exhibits an erase after program delay, where as the number of pulses during the bipolar stress increases, the ferroelectric switching of the FeFET reduces. During the memory window (MW) evaluation (after the bipolar stress), the system setup delays are longer than the erase after program delay in the actual operation. Hence, the ferroelectric switching is restored showing a full MW. The results indicate that the presence of this erase after program delay imposes a minimum stress frequency on the device, which in turn increases the measurement time. Furthermore, the result points toward the need to re-evaluate the standard endurance measurement practice.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 5","pages":"2312-2318"},"PeriodicalIF":2.9,"publicationDate":"2025-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144073024","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0