IEEE Transactions on Electron Devices最新文献

{"title":"Two-Dimensional Device Simulation for the Design Optimization of a Bidirectional Phase Control Thyristor","authors":"Vojtěch Brandštýl;Jan Vobecký","doi":"10.1109/TED.2025.3554134","DOIUrl":"https://doi.org/10.1109/TED.2025.3554134","url":null,"abstract":"The operation of 8.5-kV bidirectional phase control thyristor (BiPCT) is analyzed using calibrated device simulation (TCAD) with the goal of improving the tradeoff between the <sc>on</small>-state and turn-off losses. To cope with the specifics of the BiPCT in 2-D approximation, a special approach to turn the device from the forward blocking regime to the <sc>on</small>-state is introduced. The simulated characteristics of investigated design variants are compared with the ones measured on real devices produced on 100-mm silicon wafers. Both unirradiated and proton irradiated devices are discussed.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 5","pages":"2486-2491"},"PeriodicalIF":2.9,"publicationDate":"2025-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144073050","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Study of Laser-Induced Single Event Effects in SiC Power MOSFETs","authors":"Haoming Wang;Chao Peng;Zhifeng Lei;Zhangang Zhang;Teng Ma;Yujuan He;Hong Zhang;Xiangli Zhong;Hongjia Song;Zhao Fu;Jinbin Wang;Xiaoping Ouyang","doi":"10.1109/TED.2025.3552549","DOIUrl":"https://doi.org/10.1109/TED.2025.3552549","url":null,"abstract":"This article investigates the single event effects (SEEs) of SiC power MOSFETs by laser irradiation. The single event burnout (SEB) and leakage current increase phenomenon are observed under pulsed laser two-photon absorption (TPA) conditions. The energy threshold for SEE corresponding to different bias voltages is obtained. An improved equivalent linear energy transfer (ELET) model is proposed to correlate the laser-induced SEE and the heavy-ion-induced SEE in SiC MOSFETs. Experimental results show that when laser energy exceeds 42 nJ, the error between the ELET values from the improved model and linear energy transfer (LET) from heavy-ion experiments is as low as 5%, significantly enhancing the accuracy of laser evaluation.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 5","pages":"2474-2479"},"PeriodicalIF":2.9,"publicationDate":"2025-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144072857","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Post Work-Function Metal Annealing Induced Significant Reliability Improvement for DDDPMOS With Dual SiO₂ Layers and Metal Gate","authors":"Cheng-Hao Liang;Hang Li;Ran Bi;Han-Wen Ding;Yu-Long Jiang","doi":"10.1109/TED.2025.3554133","DOIUrl":"https://doi.org/10.1109/TED.2025.3554133","url":null,"abstract":"In this work, the effect of post work-function metal spike annealing (PWA) in N2 on the reliability of the high-voltage (HV) double-diffused drain PMOSFET (DDDPMOS) with dual SiO2 layers and metal gate (MG) is investigated. Compared to the usually employed post metal annealing (PMA), the proposed PWA is revealed to allow more nitrogen to diffuse into the in-situ steam generation (ISSG) oxide layer and eliminate oxygen vacancies. Hence, ~1500% negative bias thermal instability (NBTI) lifetime improvement for DDDPMOS is demonstrated. Slight NBTI characteristic improvement without <inline-formula> <tex-math>${I}_{scriptstylemathrm {ON}}$ </tex-math></inline-formula>/<inline-formula> <tex-math>${I}_{scriptstylemathrm {OFF}}$ </tex-math></inline-formula> performance degradation is also observed for the low-voltage (LV) pMOS integrated within the same die, which suggests that the PWA process can be used as a substitute for PMA and a novel solution to improve reliability for display driver chip fabrication using high-k/MG (HK/MG) technology with the effective integration of core devices with very small feature sizes and HV devices with large feature sizes and thick oxide in the same die.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 5","pages":"2173-2178"},"PeriodicalIF":2.9,"publicationDate":"2025-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143949170","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Space Charge Effects on Short-Pulse Electron Beam Dynamics in a Classical Vacuum Diode","authors":"Yves Heri;Peng Zhang","doi":"10.1109/TED.2025.3552061","DOIUrl":"https://doi.org/10.1109/TED.2025.3552061","url":null,"abstract":"Space charge effects pose significant challenges to the advancement of electron beam-based technologies. In this study, we investigate the influence of space charge effects on the evolution of short-pulse beam profiles in a vacuum diode using a 1-D multiple-sheet model and 2-D particle-in-cell (PIC) simulations. The effects of different initial profiles (square-top, trapezoidal, or Gaussian), charge densities, and pulse widths are analyzed. We examine the current density limit as the pulselength decreases and the resulting distortion of the beam as it traverses the gap. It is found that for the same total charge, square-top, trapezoidal, and Gaussian pulses undergo similar degree of distortion, where Gaussian pulses show slightly larger distortion (especially at longer pulselength and smaller charge density) due to its wider spread in shape. The distortion becomes more significant for shorter pulselength. For larger charges in the pulse, the tail of the pulse travels through the gap at a decelerated rate. A shorter pulse duration also leads to a larger beam energy spread for all three pulse profiles, with the peak electron densities found at low and high energy ends of the distribution. For longer pulses, the density peaks are at the center of the energy distribution. In addition, the maximum current density that can be transported across the diode follows the short-pulse Child-Langmuir (CL) law, regardless of the initial pulse shape. The results from the multiple-sheet model are in good agreement with PIC simulations.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 5","pages":"2591-2596"},"PeriodicalIF":2.9,"publicationDate":"2025-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144073260","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Microstructure Damage for Single-Event Leakage Current II in SiC MOSFETs Induced by Heavy Ion","authors":"Leshan Qiu;Yun Bai;Jieqin Ding;Zewei Dong;Chengyue Yang;Yidan Tang;Xiaoli Tian;Xinyu Liu","doi":"10.1109/TED.2025.3554159","DOIUrl":"https://doi.org/10.1109/TED.2025.3554159","url":null,"abstract":"This article investigates the electrical characteristics and microstructure damage associated with single-event leakage current II (SELC II) degradation in silicon carbide (SiC) MOSFETs subjected to 181Ta heavy-ion irradiation. For 1200-V SiC MOSFETs, SELC II degradation was observed at drain biases between 450 and 600 V. Postirradiation, two distinct leakage current paths were identified in SiC MOSFETs affected by SELC II degradation when a drain bias was applied. The drain-source leakage path, which operates independent of gate oxide damage, appeared only after a specific voltage threshold was surpassed. Similar electrical behavior observed in both irradiated and postirradiated SiC MOSFETs and p-i-n diodes indicates that the p-n junction plays a key role in the SELC II degradation of SiC MOSFETs. High-resolution TEM analysis also reveals that, for the first time, SELC II-induced microstructural damage, including cavities, dislocations, and misorientations, concentrated at the interface between the P-well region and the N-epilayer in SiC MOSFETs.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 5","pages":"2233-2239"},"PeriodicalIF":2.9,"publicationDate":"2025-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143949230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Fluorine-Treated Top-Gate InAlZnO TFT for 2T0C DRAM With Long Data Retention at Vhold = 0 V","authors":"Linlong Yang;Binbin Luo;Xi Chen;Wen Xiong;Ming Yang;Wei Meng;Jiahui Teng;Bao Zhu;Shi-Jin Ding;Xiaohan Wu","doi":"10.1109/TED.2025.3552362","DOIUrl":"https://doi.org/10.1109/TED.2025.3552362","url":null,"abstract":"Top-gate InAlZnO (IAZO) thin-film transistors (TFTs) fabricated with plasma-enhanced atomic layer deposition (PEALD) are investigated for 2T0C DRAM cells. By using Ar plasma to treat the source/drain (S/D) region, significant improvement in S/D contact properties is obtained and the on-state current (<inline-formula> <tex-math>${I}_{text {on}}text {)}$ </tex-math></inline-formula> is boosted by about three orders of magnitude. Furthermore, we employ a fluorine-treated method to modulate the threshold voltage (<inline-formula> <tex-math>${V}_{text {th}}text {)}$ </tex-math></inline-formula> and <inline-formula> <tex-math>${I}_{text {on}}$ </tex-math></inline-formula> of the top-gate IAZO TFT. By optimizing the fluorine-treatment parameters for the IAZO channel, the resultant TFT exhibits a positive <inline-formula> <tex-math>${V}_{text {th}}$ </tex-math></inline-formula> of 0.64 V, a small subthreshold swing (SS) of 74 mV/dec, a negligible clockwise hysteresis window of ~6 mV, an excellent uniformity (<inline-formula> <tex-math>${V}_{text {th}}$ </tex-math></inline-formula> variation <0.2> <tex-math>${I}_{text {on}}$ </tex-math></inline-formula> increase of more than 50% as compared with the untreated device. Negative bias stability (NBS) of the F-treated IAZO TFT is significantly improved, showing a negligible <inline-formula> <tex-math>${V}_{text {th}}$ </tex-math></inline-formula> shift of −0.005 V after 60 min stress at −3 MV cm−1. Moreover, 2T0C DRAM cells based on the F-treated top-gate IAZO TFTs are fabricated, demonstrating a long retention time of >1 ks at zero hold voltage (<inline-formula> <tex-math>${V}_{text {hold}}text {)}$ </tex-math></inline-formula>, and an excellent endurance property over <inline-formula> <tex-math>$10^{{10}}$ </tex-math></inline-formula> cycles. Finally, the top-gate IAZO TFTs and 2T0C DRAM cells with downscaled channel length are further investigated, demonstrating an <inline-formula> <tex-math>${I}_{text {on}}$ </tex-math></inline-formula> of <inline-formula> <tex-math>$3.2~mu $ </tex-math></inline-formula>A/<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>m and a retention time of 80 s at <inline-formula> <tex-math>${V}_{text {hold}} = 0$ </tex-math></inline-formula> V. These results indicate that the top-gate IAZO TFTs have great potential for memory applications with extremely low static power consumption.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 5","pages":"2305-2311"},"PeriodicalIF":2.9,"publicationDate":"2025-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144073022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Novel Ultraviolet Photodetector With High Responsivity and Low Operating Voltage Based on Hybrid Si/SiC Technology","authors":"W. Zhang;Y. X. Chen;J. Y. Yang;S. Y. Feng;B. Li;WE. Lu;F. Y. Liu;J. Wan","doi":"10.1109/TED.2025.3551721","DOIUrl":"https://doi.org/10.1109/TED.2025.3551721","url":null,"abstract":"In this letter, we demonstrate a novel ultraviolet (UV) photodetector with extremely high responsivity under low operating voltage of 1 V. A Silicon/silicon carbide (Si/SiC) hybrid substrate and fabrication process are developed to monolithically integrate a SiC photodetector with a Si MOSFET. The SiC photodetector provides excellent UV selectivity, and its output signal is further amplified through the integrated silicon MOSFET. The UV photodetector exhibits a responsivity up to <inline-formula> <tex-math>$4.63times 10^{{5}}$ </tex-math></inline-formula> A/W at a wavelength of 260 nm under a 1-V drain voltage, which is <inline-formula> <tex-math>$3.08times 10^{{7}}$ </tex-math></inline-formula> times enhanced compared to SiC metal-semiconductor–metal (MSM) photodetector. Additionally, the detector exhibits excellent response speed with rise and fall times of 29 and <inline-formula> <tex-math>$17~mu $ </tex-math></inline-formula> s, respectively, under a light intensity of <inline-formula> <tex-math>$4~mu $ </tex-math></inline-formula> W/cm2. Moreover, the detectivity is optimized by adjusting the gate voltage and a record high value of <inline-formula> <tex-math>$4.18times 10^{{16}}$ </tex-math></inline-formula> Jones is achieved.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 5","pages":"2411-2416"},"PeriodicalIF":2.9,"publicationDate":"2025-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144073227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"An Analytical Charge-Based Drain Current Model for Normally-off p-GaN/AlGaN/GaN HEMTs","authors":"Nadim Ahmed;Azwar Abdulsalam;Sudhiranjan Tripathy;Gourab Dutta","doi":"10.1109/TED.2025.3552360","DOIUrl":"https://doi.org/10.1109/TED.2025.3552360","url":null,"abstract":"This article presents a physics-based analytical model for the drain current of normally-<sc>off</small> p-GaN/AlGaN/GaN high electron mobility transistors (HEMTs). The core model, the first of its kind, is derived from a unified function of 2-D electron gas (2DEG), encompassing all operational regions of the device. The proposed drain current model is rigorously validated against our experimental data and with results from the existing literature covering a broad spectrum of device parameters and a wide range of gate and drain biases. Notably, the presented drain current model eliminates the necessity for numerical solutions, and its physical approach results in a reduced set of parameters. Moreover, this drain current model is in compliance with the standard Gummel symmetry test.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 5","pages":"2213-2219"},"PeriodicalIF":2.9,"publicationDate":"2025-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143949233","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Call for Papers for a Special Issue of IEEE Transactions on Electron Devices on Wide Band Gap Semiconductors for Automotive Applications","authors":"","doi":"10.1109/TED.2025.3547553","DOIUrl":"https://doi.org/10.1109/TED.2025.3547553","url":null,"abstract":"","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"2099-2100"},"PeriodicalIF":2.9,"publicationDate":"2025-03-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10945877","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740177","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Development of Fully ZnO-Based 16 × 16 1S1R RRAM Crossbar Array and Performance Investigations","authors":"Ting-Jui Wang;Cheng-Ying Li;Po-An Shih;Jai-Hao Wang;Kuan-Lin Yeh;Kai-Ling Hsu;Sheng-Yuan Chu","doi":"10.1109/TED.2025.3539650","DOIUrl":"https://doi.org/10.1109/TED.2025.3539650","url":null,"abstract":"This study investigates the effects of co-sputtering SiC into zinc oxide (ZnO):Li (3 mol%) thin films, resulting in the formation of lithium-doped zinc oxide: silicon carbide (LZO:SiC) oxide layers. These oxide layers have different work functions (WFs) due to their distinct chemical bonding. Subsequently, these layers are stacked together to form a form-free one-selector and one-resistor (1S1R) structure. This structure comprises Pt/V/LZO:SiC2 (buffer layer)/LZO:SiC1 (oxide layer)/TiN. Notably, this marks the first successful production of a ZnO-based 1S1R structure using this method. In our experiments, we observed that this novel structure significantly enhances I–V nonlinearity, increasing it from the initial value of 2.14–62. Furthermore, according to our calculations, the optimal array size has substantially increased from the original 4 bits to over 2500 bits, indicating the enormous potential of this technology for high-density memory applications. Building on these results, we further utilized photomask manufacturing technology to successfully create a <inline-formula> <tex-math>$16times 16~1$ </tex-math></inline-formula>S1R resistive random access memory (RRAM) crossbar array. To the best of our knowledge, this is the first report of applying a ZnO-based 1S1R structure to a crossbar array. This study not only demonstrates the feasibility of ZnO-based 1S1R structures but also opens new directions for future applications in high-performance memory technologies. Our findings showcase the potential advantages of this technology and provide a solid foundation for further technological development and practical applications.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1702-1708"},"PeriodicalIF":2.9,"publicationDate":"2025-03-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}