{"title":"Impact of Nondiffusive Phonon Transport on the Dynamic Electrothermal Behavior of CFET","authors":"Kunlong An;Pengcong Mu;Hao He;Xiaoning Ma;He Cao;Jianyun Liu;Zeyu Sun;Zhiqiang Li;Qinzhi Xu","doi":"10.1109/TED.2026.3711611","DOIUrl":"https://doi.org/10.1109/TED.2026.3711611","url":null,"abstract":"With the continued scaling and increasing switching speeds of advanced devices, microscopic quantum effects have become pronounced, rendering the Fourier heat transfer law and the drift-diffusion (DD) model inadequate for accurately capturing the electrothermal characteristics of nanoscale devices. In this study, a 3-D transient electrothermal model is proposed to investigate the impact of non-Fourier effects on complementary FET (CFET) by coupling the phonon hydrodynamic equation (PHE) with the density gradient (DG) model. To enhance computational efficiency, the parallel computing technique is integrated into the solution process. Compared to serial computation, the average computation speed perstep can increase by <inline-formula> <tex-math>$mathbf {{15}times }$ </tex-math></inline-formula> with 108 processes. Utilizing the proposed model, we simulated the alternating conduction states of N- and P-type FETs to characterize the dynamic electrothermal behavior of CFET. The simulation results exhibit a deeper thermal penetration depth and a lower hotspot temperature compared to the Fourier-based model, demonstrating the present model’s capability to capture phonon ballistic transport phenomena at the nanoscale. Notably, in the regime where the gate voltage variation period is comparable to the phonon relaxation time, the model predicts the emergence of localized hotspots, which are intrinsically absent in the Fourier-based model. This study highlights the critical role of nondiffusive phonon transport in the dynamic electrothermal behavior of CFET and provides vital insights for the thermal management of nanoscale devices.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5672-5679"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902993","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Mir Mohammad Shayoub;Umer Ali;Mohammad Sajid Nazir;Chunlei Wu;Patrick Fay;Yogesh Singh Chauhan
{"title":"An Analytical Modeling Framework for Ferroelectric-Gate GaN HEMTs With MFIS Gate-Stack","authors":"Mir Mohammad Shayoub;Umer Ali;Mohammad Sajid Nazir;Chunlei Wu;Patrick Fay;Yogesh Singh Chauhan","doi":"10.1109/TED.2026.3714747","DOIUrl":"https://doi.org/10.1109/TED.2026.3714747","url":null,"abstract":"In this work, we present an analytical SPICE-compatible modeling framework for ferroelectric (FE)-gated AlGaN/GaN high-electron-mobility transistors (HEMTs) featuring a metal–ferroelectric–insulator-semiconductor (MFIS) gate-stack. By utilizing Landau–Devonshire (L-D) formalism, a cubic formulation of the 2-D electron gas (2DEG) density is obtained, reflecting multiple physical solutions. To facilitate analytical modeling, a systematic approach is presented in order to arrive at a single generalized solution. By leveraging the Fermi-Dirac statistics, region-wise analytical expressions for the 2DEG charge are formulated, and unified to yield a continuous 2DEG charge model spanning the entire gate bias range. The surface potential formulation is then used to derive closed-form expressions for terminal currents and charges. Owing to its physics-based formulation, the model inherently captures the enhancement in total gate capacitance arising from the FE-induced negative capacitance effect. The model is benchmarked against in-house experimental data as well as data reported in the literature, including DC characteristics and measured S-parameters over the frequency range of 10 MHz–30 GHz, showing excellent agreement and establishing it as a reliable framework for efficient circuit-level simulations.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5420-5427"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148903084","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Development and Cold-Test Validation of a 326--356 GHz Backward-Wave Oscillator Based on a Sine Ridge Waveguide Slow-Wave Structure","authors":"Boning Gao;Lingna Yue;Jin Xu;Jian Zhang;Pengcheng Yin;Linqi Feng;Zixuan Su;Xinke Zhang;Wei Li;Wuyang Fan;Jiashuo Liu;Hairong Yin;Yong Xu;Jinchi Cai;Wenxiang Wang;Yinghui Liu;Yanyu Wei","doi":"10.1109/TED.2026.3716694","DOIUrl":"https://doi.org/10.1109/TED.2026.3716694","url":null,"abstract":"This article proposes a novel sine ridge waveguide (SRWG) slow-wave structure (SWS) for terahertz (THz) backward-wave oscillators (BWOs) and presents its design, fabrication, and testing. To address the common issues of low interaction impedance and high transmission loss in THz SWSs, the original electron beam tunnel of a conventional SRWG is compressed and reconstructed into a circular tunnel at the center of the SWS. While maintaining dispersion characteristics similar to those of the conventional counterpart, the proposed structure achieves a 22.9% increase in interaction impedance over the 326–356 GHz band. The novel SRWG SWS inherits the wide bandwidth and low loss of sinusoidal-type SWSs. In addition, a double-anode electron optical system (EOS) is designed to ensure that the electron beam passes through the electron beam tunnel without interception over the operating voltage range. Particle-in-cell (PIC) simulations are performed incorporating the results of the EOS simulation. The results show that with a tuning voltage range from 18 to 23 kV, the BWO delivers an output power of at least 5 W across the 326–356 GHz band. Nanocomputer numerical control (Nano-CNC) technology is employed to fabricate the novel SRWG SWS, and cold tests are performed on it. The periodic permanent magnet (PPM) focusing system is fabricated, and its magnetic field is measured. The measured S-parameters and magnetic field profiles agree well with the simulated design values within the operating frequency band, confirming the validity of the structural design and the feasibility of the fabrication process. This work lays a crucial foundation for the practical application of the proposed structure in THz BWOs.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5759-5765"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902661","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shuhui Zhang;Hang Chen;Xiaoping Meng;Yuchuan Ma;Tianpeng Yang;Tingting Mi;Xiaowen Wang;Chao Liu
{"title":"Ultralow-Leakage Vertical Al0.51Ga0.49N Trench MOS Barrier Schottky Diodes","authors":"Shuhui Zhang;Hang Chen;Xiaoping Meng;Yuchuan Ma;Tianpeng Yang;Tingting Mi;Xiaowen Wang;Chao Liu","doi":"10.1109/TED.2026.3712712","DOIUrl":"https://doi.org/10.1109/TED.2026.3712712","url":null,"abstract":"We report vertical Al0.51Ga0.49N trench metal-oxide-semiconductor (MOS) barrier Schottky (TMBS) diodes with ultralow reverse leakage current. With the trench MOS structure effectively shielding the Schottky interface from high electric fields and suppressing the image-force-induced Schottky barrier lowering (SBL) effect, the fabricated TMBS diodes maintain ultralow reverse leakage current density below <inline-formula> <tex-math>$10~mu $ </tex-math></inline-formula>A/cm2 up to 708 V. Furthermore, the vertical Al0.51Ga0.49N TMBS diodes feature excellent forward rectification characteristics, including a high <inline-formula> <tex-math>$I_{text {on}}$ </tex-math></inline-formula>/<inline-formula> <tex-math>$I_{text {off}}$ </tex-math></inline-formula> ratio of ~109, a low turn-on voltage of 2.3 V, and an ideality factor of 1.98. These results underscore the remarkable potential of vertical AlGaN power diodes for next-generation high-voltage and high-power applications.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5858-5861"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902820","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Extraction of Carrier Impact Ionization Rate in Poly-Si Films Based on TCAD Simulation of Thin-Film Transistors","authors":"Shun Liao;Wuyijia Ji;Wei Xiao;Mingxiang Wang;Dongli Zhang;Huaisheng Wang;Fa-Hsyang Chen","doi":"10.1109/TED.2026.3711056","DOIUrl":"https://doi.org/10.1109/TED.2026.3711056","url":null,"abstract":"In this study, we propose a methodology to extract the carrier impact ionization rates (<inline-formula> <tex-math>$alpha $ </tex-math></inline-formula>) of poly-Si films with different crystallinity based on TCAD simulation of thin-film transistors (TFTs). The dependence of <inline-formula> <tex-math>$alpha $ </tex-math></inline-formula> on the total trap density was also investigated. First, the TCAD simulation model of TFTs was calibrated by precisely fitting the measured transfer and output characteristic curves of poly-Si TFTs, and the trap density of states (DOSs) in such poly-Si films was determined. Subsequently, by including the impact ionization model in TCAD simulation, <inline-formula> <tex-math>$alpha $ </tex-math></inline-formula> was successfully extracted by precisely fitting the kink current observed in the output characteristics. It is shown that <inline-formula> <tex-math>$alpha $ </tex-math></inline-formula> of poly-Si films strongly depends on their crystallinity, and the preexponential factor significantly increases with the trap density following a power-law dependency with an exponent of ~3.2. This work presents, for the first time, a quantitative analysis of <inline-formula> <tex-math>$alpha $ </tex-math></inline-formula> for poly-Si films of different crystallinity, and explicitly gives the dependency of <inline-formula> <tex-math>$alpha $ </tex-math></inline-formula> on the trap density of poly-Si films.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5695-5700"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902878","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Toward Understanding Threshold Voltage Shift Induced by Gate-to-Sinker Spacing Scaling in 12 V n-LDMOSFET","authors":"Ching-Huei Tsai;Jian-Bin Shiu;Shuenn-Jeng Chen;Yi-Min Jen;Tian-Li Wu","doi":"10.1109/TED.2026.3716669","DOIUrl":"https://doi.org/10.1109/TED.2026.3716669","url":null,"abstract":"This work presents a systematic investigation of the impact of gate-to-sinker Lgsink scaling on threshold voltage Vth stability of n-type lateral double-diffused MOS (n-LDMOS). The effects of Lgsink were examined experimentally. A unique dependence of threshold voltage on gate-to-sinker spacing was identified, originating from boron diffusion of the P++ sinker into the channel and drain LDD regions during high-temperature drive-in. This mechanism was validated by secondary ion mass spectrometry (SIMS) profiling, which directly demonstrated boron penetration beneath the channel. The increased channel doping accounts for the observed rise in threshold voltage and reduction in drive current. These findings highlight the necessity of co-optimizing geometric scaling and diffusion control to achieve better control of Vth in advanced lateral double-diffused metal-oxide-semiconductor (LDMOS) technologies.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5502-5507"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902879","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Peicheng Jiao;Zhiyuan Luo;Zhengdong Jiang;Yutao Xiong;Zhihao He;Songsong Yang;Jianmin Zeng;Yanghui Liu;Gang Liu
{"title":"High-Temperature LiPON-Gated Synaptic Transistors for Reservoir Computing","authors":"Peicheng Jiao;Zhiyuan Luo;Zhengdong Jiang;Yutao Xiong;Zhihao He;Songsong Yang;Jianmin Zeng;Yanghui Liu;Gang Liu","doi":"10.1109/TED.2026.3709783","DOIUrl":"https://doi.org/10.1109/TED.2026.3709783","url":null,"abstract":"Conventional neuromorphic devices often suffer from thermal degradation and performance deterioration, limiting their operation in harsh, high-temperature environments. Here, we report a high-temperature synaptic transistor (HTST) based on a lithium phosphorus oxynitride (LiPON) solid-state electrolyte that enables reliable neuromorphic computing up to 423 K. The device exhibits a subthreshold swing (SS) of 240 mV/dec and maintains dynamically tunable hysteresis windows and temporal responses over a wide temperature range (298–423 K). Temperature-dependent low-frequency noise measurements show a 1/f-dominated power spectral density (PSD) across all conditions, with the noise intensity coefficient Kf (a measure of effective interfacial trap density) decreasing monotonically as temperature increases. Arrhenius analysis yields consistent activation energies of ~0.50 eV for both Kf and the synaptic relaxation time <inline-formula> <tex-math>$tau $ </tex-math></inline-formula>, suggesting that a thermally activated mechanism of Li+ trapping and detrapping at the LiPON/ITO interface may serve as a plausible microscopic link between low-frequency noise and synaptic plasticity. Exploiting this temperature-adaptive ion–electron coupling, a physical reservoir computing system is implemented using four transistors, integrating temperature-programmable nodes and virtual expansion to generate 160 reservoir states, achieving a normalized mean square error (NMSE) as low as 0.0246 in the NARMA2 time-series prediction task. These results highlight the potential of LiPON-based synaptic transistors for energy-efficient neuromorphic hardware and robust sensing in extreme environments.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5514-5519"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Zirui Zhang;Zixing Peng;Xiaoyu Xiao;Xianyue Liao;Xiaobang Shang;Cinzia Casiraghi;Zhirun Hu
{"title":"On the Study of Dynamic Power Dissipation and Switching Speed of Inkjet-Printed RF MoS2 Nonvolatile Switches for Wireless IoT Applications","authors":"Zirui Zhang;Zixing Peng;Xiaoyu Xiao;Xianyue Liao;Xiaobang Shang;Cinzia Casiraghi;Zhirun Hu","doi":"10.1109/TED.2026.3716695","DOIUrl":"https://doi.org/10.1109/TED.2026.3716695","url":null,"abstract":"The ever-growing deployment of the Internet of Things (IoT) requires the development of electric switches that combine rapid switching time with low power consumption to enhance device performance and energy efficiency. This work explores the use of inkjet-printed nonvolatile switches, made from a 2-D material ink based on molybdenum disulfide (MoS2), for radio frequency (RF) applications. Nonvolatile switches are notable for their zero-static power capability, enabling state retention without a continuous power supply. We have conducted real-time measurements of the inkjet-printed MoS2 nonvolatile switches during both switching-on and switching-off states and analyzed their dynamic behavior across various applied voltages. Our findings reveal that, at an <sc>on</small>/<sc>off</small> resistance ratio of <inline-formula> <tex-math>$10{^{{6}}}$ </tex-math></inline-formula>, switching on the devices can be less than 51 ns, and the energy dissipated can be as low as 1.11 nJ. In contrast, the fastest switching-off time is 147 ns, with the lowest energy expenditure of 61.2 nJ, highlighting the potential of MoS2 nonvolatile switches to significantly enhance energy efficiency. Furthermore, it is found that, unlike conventional semiconductor diodes and transistors, the switching-on and switching-off times depend on the applied voltages; the higher the voltage, the faster the switching process, underlining the dynamic property of inkjet-printed MoS2 switches.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5838-5845"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902894","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Enhancing the Optoelectronic Performance of InGaN-Based RGB Micro-LEDs via a DBR/Ag Composite Structure for Display Applications","authors":"Zhou Wang;Shiting Dou;Yan Gu;Siqi Yang;Yijing Lin;Yuhang Dai;Hao Zhong;Junyuan Chen;Yan Jiang;Huifang Ma;Honglin Chen;Jin Wang;Qiang Chen;Xiaoyan Liu","doi":"10.1109/TED.2026.3715461","DOIUrl":"https://doi.org/10.1109/TED.2026.3715461","url":null,"abstract":"InGaN-based microscale light-emitting diodes (micro-LEDs) are emerging as a pivotal technology for next-generation displays. Nevertheless, achieving high-quality displays requires overcoming critical challenges such as insufficient quantum efficiency and wavelength instability, particularly in InGaN red micro-LEDs. This study designed and fabricated composite structures comprising Si3N4/SiO2-based distributed Bragg reflector (DBR) and Ag film, which were integrated with red, green, and blue (RGB) micro-LEDs. For micro-LEDs with peak wavelengths of 623, 521, and 437 nm, the structures exhibit wide reflection bands of 384, 391, and 379 nm, respectively, each with a peak reflectance of 99%. The results demonstrated that the light extraction efficiency (LEE) was significantly enhanced, reaching 30.5%, 39.6%, and 27.4% at a current density of 10 A/cm2 for RGB micro-LEDs, respectively. Correspondingly, the external quantum efficiency (EQE) of the RGB micro-LEDs increased by 30.27%, 25.83%, and 18.48%. Notably, the full widths at half maximums (FWHMs) and peak wavelengths remained stable, indicating excellent spectral stability. Furthermore, integrating the DBR optimized for green micro-LED onto red micro-LED enabled stable emission beyond 630 nm, significantly enhancing the wavelength stability. As a result, the color gamut was expanded to 102% of the NTSC standard. These findings provide valuable insights and guidance for enhancing the optoelectronic performance of InGaN-based micro-LED displays in the future.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5626-5633"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902990","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Doping-Engineered Performance Tuning of Si-SPADs in a 40-nm BSI Technology","authors":"Tiancai Wang;Chunxu Song;Hongling Peng;Chuanwang Xu;Liang Wang;Man Hu;Peng Cao;Jiaqi Wei;Mingming Li;Wanhua Zheng","doi":"10.1109/TED.2026.3719266","DOIUrl":"https://doi.org/10.1109/TED.2026.3719266","url":null,"abstract":"We propose a novel single-photon avalanche diode (SPAD) fabricated in a 40-nm backside-illuminated (BSI) process. By employing deeply customized N-well and P-well structures through doping engineering, the device enables precise control of the breakdown voltage, energy-band profile, and depletion region, thereby achieving a low dark count rate (DCR) and negligible afterpulsing probability. In this work, three groups of N-well/high-voltage p-well (HVPW) with different doping profiles are designed to form the main p-n junction of the SPAD. Detailed simulations of the current–voltage <inline-formula> <tex-math>$I$ </tex-math></inline-formula>–<inline-formula> <tex-math>$V$ </tex-math></inline-formula> characteristics, electric-field distribution, and impact-ionization rate are carried out for the three SPAD structures. In addition, comprehensive measurements of the DCR, photon detection probability (PDP), timing jitter, and afterpulsing probability are performed. After optimization, the SPAD performance is significantly improved. The breakdown voltage is controlled at 23 V. At an excess bias of 2.5 V, the device exhibits a DCR of only 0.1 cps/<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>m2, negligible afterpulsing probability, and a timing jitter of approximately 189 ps at 940 nm. Moreover, it achieves a peak PDP of 38.5% and maintains a PDP of 21% at 905 nm, demonstrating its potential for near-infrared (NIR) detection. The proposed SPAD is particularly well suited for large-scale arrays in low-noise, long-range LiDAR imaging applications.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 9","pages":"5652-5658"},"PeriodicalIF":3.6,"publicationDate":"2026-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148902991","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}