IEEE Transactions on Electron Devices最新文献_第4页

C-Axis Oriented HZO on Flat Amorphous TiN Achieving High Uniformity, Breakdown Field, Final 2Pr, and Endurance 在平面非晶锡上的c轴定向HZO实现了高均匀性、击穿场、最终2Pr和耐久性

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2024-12-13 DOI: 10.1109/TED.2024.3502032

Zefu Zhao;Yu-Tsung Liao;Yu-Rui Chen;Yun-Wen Chen;Wan-Hsuan Hsieh;Jer-Fu Wang;Yu-An Chen;Hao-Yi Lu;Wei-Teng Hsu;Dai-Ying Lee;Ming-Hsiu Lee;C. W. Liu

{"title":"C-Axis Oriented HZO on Flat Amorphous TiN Achieving High Uniformity, Breakdown Field, Final 2Pr, and Endurance","authors":"Zefu Zhao;Yu-Tsung Liao;Yu-Rui Chen;Yun-Wen Chen;Wan-Hsuan Hsieh;Jer-Fu Wang;Yu-An Chen;Hao-Yi Lu;Wei-Teng Hsu;Dai-Ying Lee;Ming-Hsiu Lee;C. W. Liu","doi":"10.1109/TED.2024.3502032","DOIUrl":"https://doi.org/10.1109/TED.2024.3502032","url":null,"abstract":"Metal-ferroelectric-metal (MFM) capacitors with flat amorphous TiN are demonstrated to achieve the c-axis of orthorhombic phase (o-phase) well-aligned along the deposition direction, uniform electric field, negligible fatigue, and a high remanent polarization (2Pr) of \u0000<inline-formula> <tex-math>$62 ; mu $ </tex-math></inline-formula>\u0000C/cm2. The large lattice misfit between crystalline TiN and Hf0.5Zr0.5O2 (HZO) creates a larger barrier to form the o-phase HZO as compared to the amorphous TiN underlayer. Using chemical–mechanical polishing (CMP) can obtain a 0.3 nm roughness flat TiN, measured by atomic force microscopy (AFM). HZO on flat amorphous TiN exhibits a uniform and high breakdown field (EBD) of 4.8/−5.1 MV/cm for positive/negative voltage. A flat TiN mitigates the formation of oxygen vacancies (Vo) as compared to the rough TiN due to the weak and uniform electric field with few local extremes in HZO. After 4E12 endurance cycles, the HZO on the flat TiN exhibits a high final 2Pr of \u0000<inline-formula> <tex-math>$56 ; mu $ </tex-math></inline-formula>\u0000C/cm2 due to small dipole pinning by V\u0000<inline-formula> <tex-math>$_{text {o}}^{{2}+}$ </tex-math></inline-formula>\u0000. This work demonstrates the way to achieve uniformly high 2Pr, large EBD, and high endurance by the flat amorphous TiN.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 1","pages":"222-227"},"PeriodicalIF":2.9,"publicationDate":"2024-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142925362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Boltzmann-Statistics-Aware Non-Quasi-Static-Charge Model for IC Simulations 集成电路仿真的玻尔兹曼统计感知非准静态电荷模型

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2024-12-13 DOI: 10.1109/TED.2024.3513945

Chetan Kumar Dabhi;Girish Pahwa;Sayeef Salahuddin;Chenming Hu

{"title":"Boltzmann-Statistics-Aware Non-Quasi-Static-Charge Model for IC Simulations","authors":"Chetan Kumar Dabhi;Girish Pahwa;Sayeef Salahuddin;Chenming Hu","doi":"10.1109/TED.2024.3513945","DOIUrl":"https://doi.org/10.1109/TED.2024.3513945","url":null,"abstract":"In this article, Boltzmann statistics consideration is added to the charge-deficit large-signal non-quasi-static (NQS) model. The new model eliminates the nonphysical negative drain transport (as opposed to displacement) current at large drain voltage and under fast gate voltage (\u0000<inline-formula> <tex-math>$text {V}_{text {gs}}$ </tex-math></inline-formula>\u0000) turn-on. The new model agrees well with the technology computer-aided design (TCAD) simulation data for turn-on and turnoff transients and for all the drain voltage (\u0000<inline-formula> <tex-math>$text {V}_{text {ds}}$ </tex-math></inline-formula>\u0000) values, small or large. In addition, the model captures the temperature dependence of channel charge partition between source charge and drain charge in agreement with TCAD simulation results, thus reconfirming the importance of including Boltzmann statistics in NQS models. The new Boltzmann-aware NQS model is implemented in Verilog-A and tested using commercial circuit simulators. It is intended for the simulation of large-signal and small-signal NQS, and high-speed analog, logic and memory circuits.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 1","pages":"357-363"},"PeriodicalIF":2.9,"publicationDate":"2024-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142918510","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Improved Longevity and Reliability for Hundreds of Amps, Repetition Frequency Avalanche GaAs PCSS by High Thermal Conductivity Graphene Heat Sink

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2024-12-12 DOI: 10.1109/TED.2024.3512478

Xianghong Yang;Long Hu;Xin Li;Weihua Liu;Chuanyu Han

{"title":"Improved Longevity and Reliability for Hundreds of Amps, Repetition Frequency Avalanche GaAs PCSS by High Thermal Conductivity Graphene Heat Sink","authors":"Xianghong Yang;Long Hu;Xin Li;Weihua Liu;Chuanyu Han","doi":"10.1109/TED.2024.3512478","DOIUrl":"https://doi.org/10.1109/TED.2024.3512478","url":null,"abstract":"The avalanche multiplication effect of carriers in gallium arsenide photoconductive semiconductor switch (GaAs PCSS) can generate a robust current, thereby amplifying the impact ionization and recombination of carriers while yielding a filament current with high density. The movement of carriers and phonons intensifies the thermal effect within the device, thus establishing a pernicious cycle that leads to substantial heat accumulation and eventual breakdown of the switch. This is precisely the predicament that PCSS urgently needs to address. Herein, a novel longevity-enhancing technique for GaAs PCSS is proposed, which is based on the laminates of graphene heat sinks (GHSs) and aluminum nitride ceramic substrates (AlN-CSs). The GHS has dual functions of improved heat dissipation and dielectric packaging for the device. The experimental results show that the GHS has excellent photoelectrothermal stability, with the dielectric constant and thermal conductivity reaching 13.3 and 500 W/(m<inline-formula> <tex-math>$cdot $ </tex-math></inline-formula>K), respectively. At 40 kV, a wavelength of 915 nm with 5 Hz, and an energy of <inline-formula> <tex-math>$sim 70~mu $ </tex-math></inline-formula>J, a longevity of <inline-formula> <tex-math>$2.7times 10^{{4}}$ </tex-math></inline-formula> achieved with the presence of the GHS and AlN-CS, which is about 70% higher than that of a traditional device. Additionally, the photocurrent of hundreds of amps can be stably output simultaneously. Furthermore, our technique can also be employed for other high-power PCSSs and other power devices.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 2","pages":"791-795"},"PeriodicalIF":2.9,"publicationDate":"2024-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143107090","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Troubleshooting a High-Leakage Issue of an Overdrive FinFET ESD Power Clamp From Fabrication Perspective 从制造角度排除超速 FinFET ESD 电源钳的高泄漏问题

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2024-12-11 DOI: 10.1109/TED.2024.3509389

Guangyi Lu;Lihui Wang;Ling Wang;Xin Gao;Jiahao Wei;Haiming Wang

引用次数: 0

In Situ O₂ Plasma-Treated HfO₂–ZrO₂ Superlattice HZO FeRAMs Exhibiting Enhanced Remnant Polarization and Improved Endurance Performance 原位O₂等离子体处理的HfO₂-ZrO₂超晶格HZO feram显示出增强的残余极化和改进的续航性能

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2024-12-11 DOI: 10.1109/TED.2024.3509401

Dong-Ru Hsieh;Zi-Yang Hong;Wei-Ju Yeh;Jia-Chian Ni;Huai-En Luo;Yan-Kui Liang;Chun-Hsiung Lin;Tien-Sheng Chao

{"title":"In Situ O₂ Plasma-Treated HfO₂–ZrO₂ Superlattice HZO FeRAMs Exhibiting Enhanced Remnant Polarization and Improved Endurance Performance","authors":"Dong-Ru Hsieh;Zi-Yang Hong;Wei-Ju Yeh;Jia-Chian Ni;Huai-En Luo;Yan-Kui Liang;Chun-Hsiung Lin;Tien-Sheng Chao","doi":"10.1109/TED.2024.3509401","DOIUrl":"https://doi.org/10.1109/TED.2024.3509401","url":null,"abstract":"In this study, HfO2–ZrO2 superlattice (SL) HfZrO2 (HZO) ferroelectric random access memories (FeRAMs) with various HfO2/ZrO2 nanolamination (NL) thicknesses and a 1.5-nm ZrO2 seed layer were fabricated without and with in situ O2 plasma treatment to experimentally investigate and discuss their ferroelectricity and endurance performance. Compared with the conventional HZO FeRAMs, the HfO2–ZrO2 SL HZO FeRAMs with a HfO2 and ZrO2 NL thickness of 1 nm exhibited a higher two remnant polarization (\u0000<inline-formula> <tex-math>$2{P} _{text {r}}$ </tex-math></inline-formula>\u0000) of \u0000<inline-formula> <tex-math>$43.32~mu $ </tex-math></inline-formula>\u0000C/cm2, nearly wake-up free behavior, stronger fatigue effect immunity, and lower two coercive field (\u0000<inline-formula> <tex-math>$2{E} _{text {c}}$ </tex-math></inline-formula>\u0000) of 2.55 MV/cm. Furthermore, by using an in situ O2 plasma-treated SL HZO thin film for the FeRAMs to greatly suppress the oxygen vacancy generation during cycling, a further improved fatigue effect immunity and significantly reduced pulsed \u0000<inline-formula> <tex-math>$2{P} _{text {r}}$ </tex-math></inline-formula>\u0000 degradation rate (\u0000<inline-formula> <tex-math>$Delta 2{P} _{text {r}}$ </tex-math></inline-formula>\u0000/\u0000<inline-formula> <tex-math>$2{P} _{text {r,pristine}}$ </tex-math></inline-formula>\u0000) down to 36.48% after the endurance test of \u0000<inline-formula> <tex-math>$10^{{9}}$ </tex-math></inline-formula>\u0000 cycles can be achieved because the in situ O2 plasma-treated SL HZO FeRAMs possess a significantly enhanced HZO thin-film quality. Therefore, the in situ O2 plasma-treated SL HZO FeRAMs are very suitable candidates for embedded nonvolatile memory (eNVM) applications.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 1","pages":"259-265"},"PeriodicalIF":2.9,"publicationDate":"2024-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142925393","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

HEMT With Ultralow Contact Resistance by Room Temperature Process With One-Step EBL T-Shape Gates for Subterahertz Applications: Design, Fabrication, and Characterization 亚太赫兹应用的一步EBL t形栅极室温超低接触电阻HEMT：设计、制造和表征

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2024-12-11 DOI: 10.1109/TED.2024.3499935

Huihua Cheng;Jing Wang;James Kelly;Afesomeh Ofiare;Stephen Thoms;Chong Li

{"title":"HEMT With Ultralow Contact Resistance by Room Temperature Process With One-Step EBL T-Shape Gates for Subterahertz Applications: Design, Fabrication, and Characterization","authors":"Huihua Cheng;Jing Wang;James Kelly;Afesomeh Ofiare;Stephen Thoms;Chong Li","doi":"10.1109/TED.2024.3499935","DOIUrl":"https://doi.org/10.1109/TED.2024.3499935","url":null,"abstract":"We present the design, fabrication, and characterization of InGaAs channel high electron mobility transistors (HEMTs) with ultralow contact resistance for millimeter-wave and subterahertz applications. The HEMT has a composite InGaAs channel and a 50-nm T-shaped gate, which was realized through a single-step electron beam lithography (EBL) process. A room temperature ohmic contact fabrication process achieving the lowest contact resistance of 15 m\u0000<inline-formula> <tex-math>$Omega cdot $ </tex-math></inline-formula>\u0000 mm has been developed with all room temperature process. The I–V measurements of the HEMTs at room temperature revealed a peak drain current of 0.75 A/mm and a transconductance of 1.4 S/mm. In standard 50-\u0000<inline-formula> <tex-math>$Omega ~{S}$ </tex-math></inline-formula>\u0000-parameter measurements, the HEMTs exhibited a maximum gain of 10 dB at 170 GHz. However, utilizing an active load-pull measurement, the 50-nm HEMT shows a gain of 14.5 dB at 170 GHz and 2 dB at 270 GHz. The load-pull measurements also obtained power added efficiency (PAE) and 1-dB compression point of the HEMTs. The noise performance was characterized using a noise parameter system with source tuner between 2 and 50 GHz. A drift-diffusion model was used to benchmark the dc and RF performance of the devices, and good agreements have been achieved.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 1","pages":"142-146"},"PeriodicalIF":2.9,"publicationDate":"2024-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142918456","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Germanium Doped SnO₂: An Exploratory Channel Material for High On–Off Current Ratio and Low Subthreshold Slope in n-Type SnO₂:Ge Thin Film Transistor 掺锗SnO 2: n型SnO 2:Ge薄膜晶体管高通断电流比和低亚阈斜率的探索性通道材料

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2024-12-11 DOI: 10.1109/TED.2024.3510237

Jay Singh;Suman Gora;Mandeep Jangra;Arnab Datta

{"title":"Germanium Doped SnO₂: An Exploratory Channel Material for High On–Off Current Ratio and Low Subthreshold Slope in n-Type SnO₂:Ge Thin Film Transistor","authors":"Jay Singh;Suman Gora;Mandeep Jangra;Arnab Datta","doi":"10.1109/TED.2024.3510237","DOIUrl":"https://doi.org/10.1109/TED.2024.3510237","url":null,"abstract":"We report germanium (Ge) doping in tin oxide (SnO2), which led to achieving a record ON–OFF current ratio of ~109 and a subthreshold slope (SS) of 77 mV/decade in a bottom-gated n-type SnO2:Ge thin film transistor (TFT) with 40-\u0000<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>\u0000m channel length. Ge atomic percentage control to 12.2% during cosputtering of Ge and Sn in O2 plasma was shown to reduce oxygen vacancies (from 26.13% to 12.3%), which occurred due to Ge substitution in the Sn vacant sites of SnO2 lattice, leading to rearrangement of higher formation enthalpy Ge–O bonds. Low oxygen vacancies, therefore, impacted OFF current and SS of TFT with the Ge doped channel. Furthermore, for the same percent of atomic doping with Ge, field effect mobility was increased to 14.5 cm2/V-s, and barrier height of aluminum source–drain contacts with the SnO2:Ge channel was reduced from 0.69 to 0.47 eV, which were found suitable for enhancing drive current of SnO2:Ge TFT. Physical and electrical parameters of TFT fabricated with this exploratory channel material were characterized in detail.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 1","pages":"282-288"},"PeriodicalIF":2.9,"publicationDate":"2024-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142925397","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Interfacial Discharge Characteristics and Insulation Life Analysis of Package Insulation Under Square Voltage Coupled With High Frequency and Steep dv/dt 高频陡dv/dt耦合方形电压下封装绝缘界面放电特性及绝缘寿命分析

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2024-12-11 DOI: 10.1109/TED.2024.3503540

Wei Wang;Qingmin Li;Daocheng Lu;Yujie Tang;Jian Wang;Hanwen Ren;Ruoqing Hong

{"title":"Interfacial Discharge Characteristics and Insulation Life Analysis of Package Insulation Under Square Voltage Coupled With High Frequency and Steep dv/dt","authors":"Wei Wang;Qingmin Li;Daocheng Lu;Yujie Tang;Jian Wang;Hanwen Ren;Ruoqing Hong","doi":"10.1109/TED.2024.3503540","DOIUrl":"https://doi.org/10.1109/TED.2024.3503540","url":null,"abstract":"Square voltage coupled high frequency and steep dv/dt is the main cause of interfacial discharge (ID) at the direct bond copper (DBC) substrate of power electronic devices. In this article, a high-frequency partial discharge test system at the junction of ceramic, metal layer, and silicone gel on DBC substrate is built. A partial discharge measurement method capable of shielding from strong electromagnetic interference (EMI) is proposed. The research results show that the rising time is shortened from 500 to 100 ns, and the ID inceptive voltage (IDIV) increases by 13.8%, but it is almost frequency independent. Second, the initial discharge phase is gradually advanced with the shortening of the rising time. The average and maximum discharge amplitude gradually increases and the number of discharges decreases. When the frequency rises from 10 to 50 kHz, the discharge phase percentage increases significantly. While the average discharge amplitude tends to increase and then decrease, the number of discharges increases substantially. Finally, it is found that the frequency is more harmful to the package insulation life than the voltage steepness. The above findings can provide a reference for the high-frequency discharges detection and the package insulation optimization for electronic devices.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 1","pages":"350-356"},"PeriodicalIF":2.9,"publicationDate":"2024-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142918346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

InP/GaAsSb Double Heterojunction Bipolar Transistor Characterization and Compact Modeling up to 500 GHz 高达500 GHz的InP/GaAsSb双异质结双极晶体管特性和紧凑建模

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2024-12-11 DOI: 10.1109/TED.2024.3506505

Marina Deng;Chhandak Mukherjee;Lucas Réveil;Akshay M. Arabhavi;Sara Hamzeloui;Colombo R. Bolognesi;Magali De Matos;Cristell Maneux

{"title":"InP/GaAsSb Double Heterojunction Bipolar Transistor Characterization and Compact Modeling up to 500 GHz","authors":"Marina Deng;Chhandak Mukherjee;Lucas Réveil;Akshay M. Arabhavi;Sara Hamzeloui;Colombo R. Bolognesi;Magali De Matos;Cristell Maneux","doi":"10.1109/TED.2024.3506505","DOIUrl":"https://doi.org/10.1109/TED.2024.3506505","url":null,"abstract":"This article presents a new methodology to accurately characterize indium phosphide (InP) bipolar transistors up to 500 GHz. Following design optimization of RF test structures specifically developed for the on-wafer thru-reflect-line (TRL) calibration technique, InP/GaAsSb double heterojunction bipolar transistors have been successfully characterized up to 500 GHz. Moreover, the high current model (HICUM) compact model was validated against measurements for different operating conditions and various geometries for the first time up to 500 GHz. The physics-based compact model and the associated scalable parameter extraction flow allowed us to demonstrate the scalability of this terahertz (THz) InP double heterojunction transistor (DHBT) technology, offering possibilities for further design-level explorations. State-of-the-art cut-off frequencies of this THz transistor technology featuring \u0000<inline-formula> <tex-math>${f}_{text {MAX}}$ </tex-math></inline-formula>\u0000 reaching 1 THz for transistor geometries with 0.15-\u0000<inline-formula> <tex-math>$mu text {m}$ </tex-math></inline-formula>\u0000 emitter widths were experimentally verified and confirmed by the compact model predictions.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 1","pages":"175-180"},"PeriodicalIF":2.9,"publicationDate":"2024-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142925375","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Advanced Room-Temperature NIR Plasmonic Photodetection and Reconstructive Spectroscopy 先进的室温近红外等离子体光探测和重建光谱学

IF 2.9 2区工程技术

IEEE Transactions on Electron Devices Pub Date : 2024-12-09 DOI: 10.1109/TED.2024.3509385

Eslam Abubakr;Ashenafi Abadi;Masaaki Oshita;Shiro Saito;Hironori Suzuki;Tetsuo Kan

引用次数: 0