基于第一性原理玻尔兹曼输运方程的GAAFET多尺度热模拟

IF 3.2 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Yufei Sheng;Yonglin Xia;Jiaxuan Xu;Shuying Wang;Pengpeng Ren;Zhigang Ji;Hua Bao
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引用次数: 0

摘要

对于下一代先进的逻辑器件,特征尺寸达到10nm的栅极场效应晶体管(gaafet)需要充分考虑纳米尺度的热输运,以评估自加热对器件性能和可靠性的影响。然而,以往的研究主要依赖于简化或拟合模型来直接调整热扩散方程(HDE)或热阻网络中各器件组件的有效导热系数。这些方法不足以完全捕捉纳米尺度的热输运。本文通过将基于第一性原理的非灰色玻尔兹曼输运方程(BTE)与HDE相结合,对GAAFETs进行了多尺度热模拟。通过对比灰色声子热场和高阶声子热场计算得到的温度分布,证明了采用非灰色声子热场来精确模拟有源区的必要性。我们进一步发现,金属区域的大小相关的热导率应纳入使用电子-声子BTE。此外,基于堆叠纳米片GAAFET的综合热模拟,我们发现非晶被动层,不同层之间的界面热阻,以及STI/BDI层和互连的热阻是限制散热的关键因素。我们的方法完全结合了纳米级热输运,同时消除了对经验参数的依赖,并促进了从材料到结构到器件的多尺度模拟,具有潜在的电路级模拟适用性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Multiscale Thermal Simulation for GAAFET With First-Principles-Based Boltzmann Transport Equation
For next-generation advanced logic devices, gate-all-around field-effect transistors (GAAFETs) with characteristic size reaching the 10 nm scale, necessitate thorough consideration of nanoscale thermal transport to assess the impact of self-heating on device performance and reliability. However, previous studies predominantly relied on simplified or fitting models to directly adjust the effective thermal conductivities of various device components within the heat diffusion equation (HDE) or thermal resistance networks. These methods are inadequate for fully capturing nanoscale thermal transport. Here, we perform multiscale thermal simulations of GAAFETs by integrating first-principles-based nongray Boltzmann transport equation (BTE) with the HDE. By comparing the temperature distributions calculated using the gray BTE and HDE, we demonstrate the necessity of employing the nongray phonon BTE for accurate simulation of the active region. We further discover that the size-dependent thermal conductivity of metal regions should be incorporated using the electron–phonon BTE. Moreover, based on comprehensive thermal simulations of a stacked nanosheet GAAFET, we identify that the amorphous passive layer, interfacial thermal resistance between different layers, along with the thermal resistance of the STI/BDI layers and interconnections, are key factors limiting heat dissipation. Our approach fully incorporates nanoscale thermal transport while eliminating reliance on empirical parameters and facilitates multiscale simulations from materials to structures to devices, with potential applicability to circuit-level simulations.
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来源期刊
IEEE Transactions on Electron Devices
IEEE Transactions on Electron Devices 工程技术-工程:电子与电气
CiteScore
5.80
自引率
16.10%
发文量
937
审稿时长
3.8 months
期刊介绍: IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.
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