IEEE Transactions on Electron Devices最新文献

{"title":"Enhancing the Durability and Efficiency of Flexible Semi-Transparent Organic Solar Cells With Silver Mesh Electrode","authors":"Yingjie Liao;Keqin Xie;Jinlong Wu;Ning Zhao;Yang Lin;Wei Shi;Bin Wei;Weixia Lan;Yuanyuan Liu","doi":"10.1109/TED.2025.3559887","DOIUrl":"https://doi.org/10.1109/TED.2025.3559887","url":null,"abstract":"The performance of organic solar cells (OSCs), particularly flexible semi-transparent OSCs (ST-OSCs), is often limited by the use of indium tin oxide (ITO) electrodes, which are prone to cracking under bending and thus compromise device performance. This study introduces a novel silver mesh electrode (Ag-mesh) as a substitute for ITO in ST-OSCs. The Ag-mesh electrodes demonstrated optimal performance at a thermal imprinting temperature of 130 °C, with minimal line breakage and preserved optoelectronic properties. Compared to ITO electrodes, ST-OSCs with Ag-mesh electrodes showed superior mechanical stability, retaining over 90% of their initial performance after 1000 bending cycles, and an impressive retention of nearly 87% of their initial power conversion efficiency (PCE). The devices based on Ag-mesh electrodes also exhibited higher fill factor (FF) and better light response, aligning with higher conductivity and transmittance of the Ag-mesh electrodes. This research offers a significant contribution to the field by providing a durable and efficient alternative to ITO electrodes in flexible ST-OSCs. The Ag-mesh electrodes not only match but exceed the performance of ITO electrodes in terms of efficiency and stability, marking a substantial step forward in the development of flexible and semi-transparent solar cell technology.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 6","pages":"3099-3105"},"PeriodicalIF":2.9,"publicationDate":"2025-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144190604","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Highly Responsive MEMS Thermometer Based on TETF AlN-on-Si Resonator Pair","authors":"Cheng Tu;Wei-Hao Zhou;Yun-Fei Xie;Xiao-Sheng Zhang","doi":"10.1109/TED.2025.3561264","DOIUrl":"https://doi.org/10.1109/TED.2025.3561264","url":null,"abstract":"In this article, we report a MEMS thermometer comprised of two triple-ended-tuning-fork (TETF) AlN-on-Si resonators, which use the difference in their resonant frequencies (i.e., beat frequency) as the output metric for temperature sensing. To improve temperature responsivity, two TETF resonators are designed to have similar resonant frequencies yet distinctly different temperature coefficients of frequency (TCFs). The small difference in resonant frequencies is achieved by designing the two resonators with similar structures operating in the same vibration mode. The large difference in TCFs is realized by introducing a thermal-strain-amplifying beam to one resonator, while adding a thermal-strain-reducing beam to the other. Moreover, different electrode coverages are applied for the two resonators to further enlarge the difference in their TCFs. Theoretical analysis for the effects of thermal strain beam and electrode coverage on TCFs is provided, which shows good agreement with the simulated and measured results. The measured results show that the two TETF resonators exhibit small difference between their resonant frequencies (3.45 kHz), while having large difference in their TCFs (868 ppm/°C). These characteristics allow the thermometer achieving a high-temperature responsivity close to 10000 ppm/°C, which is considered among the best in the state-of-the-art resonant thermometers using beat frequency method.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 6","pages":"3133-3139"},"PeriodicalIF":2.9,"publicationDate":"2025-04-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144190606","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Low-Loss Flatted-Grating Folded Waveguide TWT Based on High-Phase Operating Strategy","authors":"Jingrui Duan;Zhigang Lu;Peng Gao;Zechuan Wang;Yuan Zheng;Ping Zhang;Zhanliang Wang;Shaomeng Wang;Huarong Gong;Yubin Gong","doi":"10.1109/TED.2025.3561263","DOIUrl":"https://doi.org/10.1109/TED.2025.3561263","url":null,"abstract":"A low-loss flatted-grating folded waveguide (FGFW) slow wave structure (SWS) for terahertz (THz) traveling wave tubes (TWTs) based on a novel high-phase (HP) operating strategy is proposed in this article. Compared to the conventional low-phase (LP) operation of the fundamental mode, the HP strategy significantly enlarges structural dimensions while leveraging the advantages of FGFW. High-frequency analysis demonstrates that the HP-FGFW achieves weaker dispersion characteristics, improved beam-wave synchronization, and lower ohmic loss compared to LP-FGFW. The transmission characteristics verify the effectiveness of the low-loss characteristic of HP-FGFW for the TWT. Particle-in-cell (PIC) simulations predict improvements in the amplification performance and an increase in the 3-dB bandwidth of the HP-FGFW TWT. Meanwhile, the fabrication feasibility has been verified by the nano-CNC technique. A good agreement between simulated and measured transmission characteristics was achieved, with a conductivity of 2.0 S/m. Fabrication quality evaluation showed high-dimensional accuracy with deviations within <inline-formula> <tex-math>$pm 2~mu $ </tex-math></inline-formula>m and low local surface roughness with a value of 0.105 nm. Overall, HP-FGFW provides a promising solution for high-power, broadband TWTs, effectively addressing the issues of fabrication complexity and ohmic losses.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 6","pages":"3206-3212"},"PeriodicalIF":2.9,"publicationDate":"2025-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144190540","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"S-Parameter-Measurement-Based Broadband Characterization for Frequency-Variant Aperiodic SAW Devices","authors":"Hansoo Yoo;Yungseon Eo","doi":"10.1109/TED.2025.3562837","DOIUrl":"https://doi.org/10.1109/TED.2025.3562837","url":null,"abstract":"The physical characteristics of surface acoustic wave interdigital transducers (SAW IDTs) with aperiodic and irregular grating structures are investigated. S-parameters for various test SAW IDT devices fabricated on 42°YX-LiTaO3 (piezoelectric substrate) are measured using a wafer-level de-embedding technique over a broad frequency band. Acoustic wave propagation model parameters for the physical behavior of aperiodic or asymmetric SAW IDT devices are determined in terms of frequency-variant and grating-layout-dependent parameters but are not constant. It is shown that numerical calculations based on the proposed technique have excellent agreement with experimental data.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 6","pages":"3140-3147"},"PeriodicalIF":2.9,"publicationDate":"2025-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144190578","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Recent Advances in Device-Level Thermal Management Technologies for Wide Bandgap Semiconductor: A Review","authors":"Jiajun Zhou;Linhai Zhong;Xin Feng;Weihang Zhang;Xianhe Liu;Hong Zhou;Zhihong Liu;Yue Hao;Jincheng Zhang","doi":"10.1109/TED.2025.3562506","DOIUrl":"https://doi.org/10.1109/TED.2025.3562506","url":null,"abstract":"Wide bandgap (WBG) and ultra-WBG (UWBG) semiconductor devices exhibit superior performance with higher breakdown voltage and lower <sc>on</small>-resistance compared to Si-based devices, rendering them highly competitive in the field of electric energy conversion and communication. Especially, GaN, as one of the representative materials in WBG semiconductors, has progressed to the stage of industrial realization, and the new generation of UWBG semiconductors such as Ga2O3 has become a popular research focus in the last decade for power electronics applications. However, the primary challenge faced by these advanced semiconductor devices is thermal management, particularly in high-power application, which leads to a serious degradation in electrical performance and long-term reliability. Therefore, there is an urgent need for effective thermal management technologies. This review comprehensively summarizes recent advances in device-level thermal management techniques for WBG and UWBG semiconductors, ranging from internal device structure optimization to a series of external strategies for enhancing thermal diffusion. These strategies include enhancing the internal thermal dissipation through device architecture optimization, substrate thinning, high thermal conductivity substrate bonding and coverage, flip chip package, active method of microchannel cooling, and transient thermal management techniques. Finally, we discuss the existing technical challenges, potential solutions, and further development opportunities in thermal management techniques, with the aim of addressing the critical thermal dissipation issue to facilitate the further industrialization of WBG and UWBG semiconductors.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 6","pages":"2769-2782"},"PeriodicalIF":2.9,"publicationDate":"2025-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144196942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Investigating the Performance of Sub-10-nm WSi2N4 MOSFETs With Native Dielectric Through a Machine Learning Tight-Binding Framework","authors":"Michael Spinazze;Youngki Yoon","doi":"10.1109/TED.2025.3561757","DOIUrl":"https://doi.org/10.1109/TED.2025.3561757","url":null,"abstract":"Monolayer WSi2N4 has emerged as a promising 2-D semiconductor for high-performance ultrascaled MOSFETs. In this work, we use machine learning techniques to generate a sparse tight-binding (TB) Hamiltonian and evaluate the performance of sub-10-nm n-type and p-type WSi2N4 MOSFETs with native Si3N4 as the gate dielectric. To validate our approach, we compare the I–V characteristics generated by our machine learning TB (MLTB) model with those obtained from a TB model using the maximally localized Wannier function (MLWF) approach for a monolayer HfS2 MOSFET, demonstrating excellent agreement. Our results show that both n-type and p-type WSi2N4 MOSFETs meet the International Roadmap for Devices and Systems (IRDS) 2022 <sc>on</small>-current (<inline-formula> <tex-math>${I}_{text {on}}$ </tex-math></inline-formula>) target for high-performance (HP) applications at channel lengths (<inline-formula> <tex-math>${L}_{text {ch}}$ </tex-math></inline-formula>) of 5–10 nm. For high-density (HD) applications, n-type and p-type devices can be scaled down to 7 and 8 nm, respectively, while maintaining IRDS compliance. At a 10-nm channel length, n-type devices achieve a higher <inline-formula> <tex-math>${I}_{text {on}}$ </tex-math></inline-formula> than p-type devices, while both exhibit comparable subthreshold swing (SS) close to the 60-mV/dec limit at room temperature. However, as <inline-formula> <tex-math>${L}_{text {ch}}$ </tex-math></inline-formula> decreases, n-type devices experience greater SS degradation than p-type devices due to enhanced source-to-drain tunneling, allowing p-type devices to outperform at shorter channel lengths. In addition, transport simulations reveal directionally isotropic carrier behaviors in WSi2N4. These findings underline the potential of WSi2N4 for next-generation ultrascaled transistors and showcase the utility of machine-learning-based approaches in modeling devices constructed with novel 2-D materials.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 6","pages":"3287-3294"},"PeriodicalIF":2.9,"publicationDate":"2025-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144170850","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Comprehensive Study of Low-Frequency Noise Origins in Scaled Atomic-Layer-Deposited IGZO TFTs","authors":"Sumi Lee;Chang Niu;Chun-An Shih;Jian-Yu Lin;Zhuocheng Zhang;Yizhi Zhang;Linjia Long;Haiyan Wang;Muhammad A. Alam;Peide D. Ye","doi":"10.1109/TED.2025.3562509","DOIUrl":"https://doi.org/10.1109/TED.2025.3562509","url":null,"abstract":"In this work, we investigate the 1/f noise, i.e., low-frequency noise (LFN), characteristics of scaled atomic-layer-deposited indium-gallium–zinc oxide (IGZO) thin-film transistors (TFTs) focusing on key factors such as: 1) varying indium (In) concentrations; 2) post-thermal annealing; and 3) channel length (<inline-formula> <tex-math>${L}_{text {ch}}text {)}$ </tex-math></inline-formula> scaling. Increasing the In ratio from 2:1:1 to 7:1:1 enhances field-effect mobility (<inline-formula> <tex-math>$mu _{text {FE}}text {)}$ </tex-math></inline-formula> from 11.2 to 36.6 cm2/V and reduces LFN by up to 85%, demonstrating the role of In content in improving both electrical performance and noise characteristics. Post-annealing further mitigates LFN, achieving reductions of up to 68%, depending on the IGZO compositions. As <inline-formula> <tex-math>${L}_{text {ch}}$ </tex-math></inline-formula> scales down, the dominant LFN mechanism shows a tendency to shift from mobility fluctuations (<inline-formula> <tex-math>$Delta $ </tex-math></inline-formula><inline-formula> <tex-math>$mu $ </tex-math></inline-formula>) in long-channel devices (<inline-formula> <tex-math>${L}_{text {ch}} = 1~mu $ </tex-math></inline-formula>m) to carrier number fluctuations (<inline-formula> <tex-math>$Delta $ </tex-math></inline-formula>n) in short-channel devices (<inline-formula> <tex-math>${L}_{text {ch}} =50$ </tex-math></inline-formula> nm), as indicated by the distinct dependence of normalized drain-current power spectral density (<inline-formula> <tex-math>${S}_{text {ID}}$ </tex-math></inline-formula>/<inline-formula> <tex-math>${I}_{text {D}}^{{2}}text {)}$ </tex-math></inline-formula> on gate overdrive voltage. This behavior, supported by LFN measurements at elevated temperatures (<inline-formula> <tex-math>$sim 125~^{circ }$ </tex-math></inline-formula>C) and bias temperature instability (BTI) analyses, highlights the increasing influence of near-interface traps in scaled devices.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 6","pages":"2993-2999"},"PeriodicalIF":2.9,"publicationDate":"2025-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144185817","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Design and Fabrication of a Novel 1200 V 4H-SiC Trench MOSFET With Periodically Grounded Trench Bottom Shielding","authors":"Jun Yuan;Wei Chen;Fei Guo;Kuan Wang;Zhijie Cheng;Yangyang Wu;Shaodong Xu;Rong Zhang;Guoqing Xin;Zhiqiang Wang","doi":"10.1109/TED.2025.3559888","DOIUrl":"https://doi.org/10.1109/TED.2025.3559888","url":null,"abstract":"In this article, a silicon carbide (SiC) trench MOSFET with periodically grounded p-type shielding region (P+SLD) at the trench bottom (PGP-TMOS) is designed and experimentally demonstrated. There exist deep-implanted P+ (DP) regions on both sides of the trench and the P+SLD is grounded by connecting to the DP region periodically. Therefore, the PGP-TMOS owns two different schematic cross section views. The P+SLD and DP region together improve the robustness of the gate oxide. A current spreading layer (CSL) by epitaxy is introduced to improve the device performance. Numerical 2D-simulation results show that compared with the trench MOSFET with floating P+SLD (FP-TMOS), the peak electric field in the gate oxide (<inline-formula> <tex-math>${E}_{text {ox,peak}}text {)}$ </tex-math></inline-formula> is decreased by 50.77% while the breakdown voltage (BV) and specific <sc>on</small>-resistance (<inline-formula> <tex-math>${R}_{text {on,sp}}text {)}$ </tex-math></inline-formula> keep almost the same. In addition, the PGP-TMOS demonstrates superior switching characteristics. The PGP-TMOS has been manufactured on different wafers. When single epitaxial wafers are used, BV of the samples is only 1300 V and the conduction characteristic is poor due to the junction field-effect transistor (JFET) effect and ion implantation scattering. BV and <inline-formula> <tex-math>${R}_{text {on,sp}}$ </tex-math></inline-formula> are improved to 1570 V and 5.96 m<inline-formula> <tex-math>$Omega cdot $ </tex-math></inline-formula>cm2, respectively, when the PGP-TMOS is manufactured on wafers with a CSL layer introduced by epitaxy. BV and <inline-formula> <tex-math>${R}_{text {on,sp}}$ </tex-math></inline-formula> are improved by 20.77% and 91.85%, respectively, compared with the former ones. Moreover, the influence of the key parameters on the PGP-TMOS is discussed, which provides guidance for subsequent optimization.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 6","pages":"3063-3067"},"PeriodicalIF":2.9,"publicationDate":"2025-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144185806","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Stack Optimization of TiOx-Based Resistive Switching Devices Through Interface Engineering","authors":"Yu Shi;Manoj Sachdev;Guo-Xing Miao","doi":"10.1109/TED.2025.3561703","DOIUrl":"https://doi.org/10.1109/TED.2025.3561703","url":null,"abstract":"Metal-oxide-based resistive switching random access memory (RRAM) is a promising candidate for next-generation embedded memory due to its simple structure, fast switching speed, and compatibility with CMOS fabrication processes. To enhance its compute density and reduce power consumption, integrating RRAM devices into advanced technology nodes is crucial, necessitating the scaling down of device area and operational voltage. This study explores the influence of bottom TiN electrodes with varying growth conditions, revealing a strong correlation between forming voltage and nitrogen concentration in TiN. In addition, the relationship between forming voltage and high-resistance state (HRS) resistance is examined, showing that lower forming voltages result in higher HRS resistance. Nitrogen plasma treatment of both bottom and top electrode interfaces effectively reduces forming voltage without compromising HRS resistance. These findings provide guidelines for optimizing TiOx-based RRAM devices for compute-in-memory (CIM) applications and can be generalized to similar metal-oxide-based RRAM devices.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 6","pages":"2964-2969"},"PeriodicalIF":2.9,"publicationDate":"2025-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144185807","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Spectrum Continuously Tunable White LED Based on Bilayer Thickness-Graded Quantum Dots","authors":"Hua Xiao;Qiannan Jiang;Haiyun Chen;Qiaoyang Zhang;Mingxin Liu;Wensong Wang","doi":"10.1109/TED.2025.3561249","DOIUrl":"https://doi.org/10.1109/TED.2025.3561249","url":null,"abstract":"Regulating the emission spectrum of white light-emitting diode (WLED) is crucial for enhancing lighting quality and advancing smart lighting technology. This study proposes a device to achieve continuous tunability of the multicolor emission spectrum by designing a bilayer cadmium selenide (CdSe)-based quantum-dot (QD) light-conversion structure and the corresponding illuminating control system. Spectral modulation is achieved by a three-pronged approach: 1) the fabrication of the thickness-graded QD film; 2) preassembly monochromatic spectra characterization and spectral optimization; and 3) postassembly mechanical control of a push rod connected to the blue LED chip. Compared to others, the proposed approach provides precise control over continuous spectra modulation in both simulation and experimental settings using just two parameters: driving voltage and blue LED chip position. This device offers a wide range of options for correlated color temperature (CCT) ranging from approximately 2000–60 000 K and illuminance from approximately 0–200 lx. Furthermore, the detailed study of light modulation offers viable approaches for realizing tunable WLEDs in smart lighting and Internet of Things (IoT) systems.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 6","pages":"3035-3042"},"PeriodicalIF":2.9,"publicationDate":"2025-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144185818","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}