IEEE Transactions on Electron Devices最新文献

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Verification of E-Shaped Double Busbar for Q-Improvement in 42°YX-LT/SiO₂/α-Si/4H-SiC TF-SAW Resonators 42°YX-LT/ sio2 /α-Si/4H-SiC TF-SAW谐振器调q的e型双母线验证
IF 3.2 2区 工程技术
IEEE Transactions on Electron Devices Pub Date : 2026-04-01 Epub Date: 2026-03-03 DOI: 10.1109/TED.2026.3665679
Yang Feng;Zonglin Wu;Hangyu Qian;Feihong Bao;Shijia Li;Shuxian Wu;Qiaozhen Zhang;Jie Zou;Xiongchuan Huang
{"title":"Verification of E-Shaped Double Busbar for Q-Improvement in 42°YX-LT/SiO₂/α-Si/4H-SiC TF-SAW Resonators","authors":"Yang Feng;Zonglin Wu;Hangyu Qian;Feihong Bao;Shijia Li;Shuxian Wu;Qiaozhen Zhang;Jie Zou;Xiongchuan Huang","doi":"10.1109/TED.2026.3665679","DOIUrl":"https://doi.org/10.1109/TED.2026.3665679","url":null,"abstract":"This work systematically investigates the effectiveness of double-busbar electrode designs for enhancing the quality factor (<inline-formula> <tex-math>$Q$ </tex-math></inline-formula>) of thin-film surface acoustic wave (TF-SAW) resonators. In particular, two configurations—normal double busbar (NDB) and E-shaped double busbar (EDB)—are examined through combined theoretical analysis and experimental validation. The secondary busbar of NDB structure enhances energy confinement along with the aperture, thereby improving <inline-formula> <tex-math>$Q$ </tex-math></inline-formula>. Building on NDB structure, the EDB structure suppresses scattering losses by the dummy electrode, further improving <inline-formula> <tex-math>$Q$ </tex-math></inline-formula>. The proposed resonators were fabricated on a <inline-formula> <tex-math>$42^{circ } textit {YX}$ </tex-math></inline-formula>-LiTaO<sub>3</sub>/SiO<sub>2</sub>/<inline-formula> <tex-math>$alpha $ </tex-math></inline-formula>-Si/4H-SiC heterogeneous substrate. Measured results show that the NDB resonator increases the Bode-<inline-formula> <tex-math>${Q}_{max }$ </tex-math></inline-formula> from 1271 to 2439 (92% improvement), compared with the dummy single busbar (DSB) counterpart. The EDB resonator demonstrates a further 27% increase in Bode-<inline-formula> <tex-math>${Q}_{max }$ </tex-math></inline-formula> (from 2439 to 3110). Temperature stability was also evaluated, with the EDB resonator exhibiting near-zero temperature coefficient of frequency (TCF) at parallel resonant frequency (+0.16 ppm/°C). These results confirm the strong potential of the proposed structures for low-loss RF front-end modules in next-generation wireless communication systems.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 4","pages":"2468-2473"},"PeriodicalIF":3.2,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147571066","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Trap-Induced Instability in β-Ga2O3 Solar-Blind Phototransistors Under Electro-Optical Stress 电光应力下β-Ga2O3太阳盲光电晶体管的阱致不稳定性
IF 3.2 2区 工程技术
IEEE Transactions on Electron Devices Pub Date : 2026-04-01 Epub Date: 2026-03-03 DOI: 10.1109/TED.2026.3664283
Shuqi Huang;Xiaoxi Li;Haoji Qian;Yang Zhou;Yu Wang;Peimin Gu;Jiajia Chen;Chengji Jin;Cizhe Fang;Xiangyu Zeng;Yan Liu;Yue Hao;Genquan Han
{"title":"Trap-Induced Instability in β-Ga2O3 Solar-Blind Phototransistors Under Electro-Optical Stress","authors":"Shuqi Huang;Xiaoxi Li;Haoji Qian;Yang Zhou;Yu Wang;Peimin Gu;Jiajia Chen;Chengji Jin;Cizhe Fang;Xiangyu Zeng;Yan Liu;Yue Hao;Genquan Han","doi":"10.1109/TED.2026.3664283","DOIUrl":"https://doi.org/10.1109/TED.2026.3664283","url":null,"abstract":"The trap-assisted instability in <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga<sub>2</sub>O<sub>3</sub> solar-blind phototransistors under long-term electro-optical stress is systematically investigated. Under the negative bias stress (NBS) in the dark, threshold voltage (<inline-formula> <tex-math>${V}_{text {th}}text {)}$ </tex-math></inline-formula> first shifts slightly negative at −3 V and then positive to 0.05 V at −5 V, accompanied by a reduced hysteresis (<inline-formula> <tex-math>$Delta {V}_{text {hysteresis}}$ </tex-math></inline-formula>). This transition is attributed to a crossover from border-trap-dominated detrapping to field-assisted capture by bulk traps in the <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga<sub>2</sub>O<sub>3</sub> buffer layer. Although the responsivity (<inline-formula> <tex-math>${R}text {)}$ </tex-math></inline-formula> remains nearly constant, detectivity (<inline-formula> <tex-math>${D}^{ast }text {)}$ </tex-math></inline-formula> decreases by almost one order of magnitude due to leakage-induced enhancement of the pinch-off current (<inline-formula> <tex-math>${I}_{text {pinch}-text {off}}$ </tex-math></inline-formula>). Under simultaneous ultraviolet (UV) illumination, the <inline-formula> <tex-math>${V}_{text {th}}$ </tex-math></inline-formula> shift enlarges to 0.3 V, and the <inline-formula> <tex-math>${I}_{text {pinch}-text {off}}$ </tex-math></inline-formula> degradation ratio increases from 136% to 298%, indicating strong photo-assisted charge buildup in the buffer. In this regime, both <inline-formula> <tex-math>$R$ </tex-math></inline-formula> and <inline-formula> <tex-math>${D}^{ast }$ </tex-math></inline-formula> degrade by nearly an order of magnitude as photo-generated carriers activate abundant deep traps and accelerate electron capture. A trap-assisted physical model incorporating border and buffer traps reproduces the observed parameter shifts and current degradation. These results reveal that photo-induced activation of buffer-layer traps is the primary origin of electro-optical instability, highlighting buffer-layer defect engineering as a key route to enhance the long-term reliability of <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga<sub>2</sub>O<sub>3</sub> solar-blind phototransistors.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 4","pages":"2486-2490"},"PeriodicalIF":3.2,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147570563","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Bias-Dependent Trap Characterization in Hydrogen-Terminated Diamond MOSFETs Using Transient Current Analysis 基于瞬态电流分析的端氢金刚石mosfet偏置相关陷阱表征
IF 3.2 2区 工程技术
IEEE Transactions on Electron Devices Pub Date : 2026-04-01 Epub Date: 2026-03-10 DOI: 10.1109/TED.2026.3669480
Shijie Pan;Chuangjie Zhou;Shiwei Feng;Xiaozhuang Lu;Zezhao He;Haibing Li;Hao Yu;Mengyu Ma;Xinyu Zhang;Cui Yu;Zhihong Feng
{"title":"Bias-Dependent Trap Characterization in Hydrogen-Terminated Diamond MOSFETs Using Transient Current Analysis","authors":"Shijie Pan;Chuangjie Zhou;Shiwei Feng;Xiaozhuang Lu;Zezhao He;Haibing Li;Hao Yu;Mengyu Ma;Xinyu Zhang;Cui Yu;Zhihong Feng","doi":"10.1109/TED.2026.3669480","DOIUrl":"https://doi.org/10.1109/TED.2026.3669480","url":null,"abstract":"In this study, we investigate the charge trapping in hydrogen-terminated diamond (HD) MOSFETs based on the transient drain current. The hole detrapping is reflected by monitoring the transient current after applying the filling voltages, and three distinct trap peaks are clearly identified using the Bayesian deconvolution. The energy levels are determined from temperature-dependent measurements to be approximately 0.47, 0.35, and 0.15 eV. Besides, the contribution of each trap to the transient current variation can be quantified using the differential amplitude spectra. Three kinds of bias conditions are designed to analyze the dependence of trap amplitudes on filling voltages, which reveals the strong correlation with threshold voltage shift and drain current reduction. By correlating these trap properties with electrical measurements, the physical locations of traps are identified at the interface, in the gate oxide, and in the diamond layer. Notably, the trap within the diamond is found to dominate the current collapse. This work provides profound insights into the trapping mechanisms limiting HD MOSFET performance, establishing a foundation for developing more reliable high-power diamond devices.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 4","pages":"2461-2467"},"PeriodicalIF":3.2,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147570561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Cryogenic Temperature Electrical Characterization of Enhancement-Mode Thin Barrier AlGaN/GaN HEMT With Hybrid Ferroelectric Charge Trap Gate-Stack 具有杂化铁电电荷阱栅极堆的增强模式薄势垒AlGaN/GaN HEMT的低温电特性
IF 3.2 2区 工程技术
IEEE Transactions on Electron Devices Pub Date : 2026-04-01 Epub Date: 2026-02-24 DOI: 10.1109/TED.2026.3663344
Rahul Rai;Khanh Quoc Nguyen;Viet Quoc Ho;Hung Duy Tran;Baquer Mazhari;Edward Yi Chang
{"title":"Cryogenic Temperature Electrical Characterization of Enhancement-Mode Thin Barrier AlGaN/GaN HEMT With Hybrid Ferroelectric Charge Trap Gate-Stack","authors":"Rahul Rai;Khanh Quoc Nguyen;Viet Quoc Ho;Hung Duy Tran;Baquer Mazhari;Edward Yi Chang","doi":"10.1109/TED.2026.3663344","DOIUrl":"https://doi.org/10.1109/TED.2026.3663344","url":null,"abstract":"This work reports on the fabrication and cryogenic temperature characterization of a high-electron-mobility transistor (HEMT) featuring a 6 nm AlGaN thin barrier and a hybrid ferroelectric gate-stack to achieve E-mode operation. DC and transmission line method (TLM) measurements were performed down to 4 K to investigate the device performance and contact resistance behavior at cryogenic temperatures. We achieved a subthreshold slope (SS) of ~47.5 mV/dec at 4 K, along with a high maximum drain current of 1.055 A/mm at V<inline-formula> <tex-math>${}_{text {DS}}= {14}$ </tex-math></inline-formula> V (at 20 K) and a remarkably high current <sc>on/off</small> ratio (I<sub>on</sub>/I<sub>off</sub>) of <inline-formula> <tex-math>$6.6times 10^{{10}}$ </tex-math></inline-formula> at 4 K. The hybrid gate architecture demonstrated stable operation with preserved ferroelectric functionality. Temperature-dependent analysis revealed insights into carrier transport, mobility degradation, sheet, and contact resistivity. These results demonstrate the potential of ferroelectric-gated HEMTs for cryogenic applications.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 4","pages":"2478-2485"},"PeriodicalIF":3.2,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147571071","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Bias-Polarity-Dependent Electrical Characteristics of 1x nm DRAM Capacitors for Robust Cryogenic Memory Applications 用于稳健低温存储器应用的1x nm DRAM电容器的偏置极性相关电特性
IF 3.2 2区 工程技术
IEEE Transactions on Electron Devices Pub Date : 2026-04-01 Epub Date: 2026-02-23 DOI: 10.1109/TED.2026.3663144
Soohong Eo;Jingyu Park;Sangwon Lee;Changwook Kim;Seonhaeng Lee;Namhyun Lee;Yoon Kim;Myounggon Kang;Rock-Hyun Baek;Changhyun Kim;Jiyong Woo;Dae Hwan Kim
{"title":"Bias-Polarity-Dependent Electrical Characteristics of 1x nm DRAM Capacitors for Robust Cryogenic Memory Applications","authors":"Soohong Eo;Jingyu Park;Sangwon Lee;Changwook Kim;Seonhaeng Lee;Namhyun Lee;Yoon Kim;Myounggon Kang;Rock-Hyun Baek;Changhyun Kim;Jiyong Woo;Dae Hwan Kim","doi":"10.1109/TED.2026.3663144","DOIUrl":"https://doi.org/10.1109/TED.2026.3663144","url":null,"abstract":"This study explores the electrical behavior of capacitors with symmetric trilayer dielectrics in 1x nm dynamic random access memories (DRAMs) for cryogenic computing. Depositing a lower dielectric layer on top of the bottom electrode (BE) triggers oxygen vacancy defect generation via a chemical reaction. Electrical measurements over a wide temperature range (370–77 K) elucidated the impact of these defects on the conduction. Applying a positive voltage to the top electrode (TE) induces more charges due to electrons trapped near the BE, leading to a faster capacitance increase. The bias-polarity-dependent transport properties of the trilayer exhibit trap-assisted tunneling (TAT) in the low-voltage regime, transitioning to Poole–Frenkel (PF) emission, and ultimately Fowler–Nordheim (FN) tunneling in the high-voltage regime. We observed weakening of abundant traps near the BE interfacial barrier, allowing PF conduction to dominate over TAT. Under constant voltage stress (CVS), the substantial accumulation of trapped electrons near the BE interface accelerates toward the opposite plate because of the electric field. This resulted in increased current due to defect generation near the TE, thereby making the capacitor vulnerable to stress. Overall, the data retention of DRAM is expected to improve because of the lower current at 77 K. However, careful design of the BE interface is critical for leakage current and stress susceptibility.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 4","pages":"2506-2510"},"PeriodicalIF":3.2,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147571040","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A NiO/β-Ga2O3 Heterojunction Diode With Ultralow Turn-On Voltage via O2 Plasma Treatment O2等离子体处理的NiO/β-Ga2O3超低通压异质结二极管
IF 3.2 2区 工程技术
IEEE Transactions on Electron Devices Pub Date : 2026-04-01 Epub Date: 2026-03-10 DOI: 10.1109/TED.2026.3669479
Hao Zhang;Yinchi Liu;Jining Yang;Yeye Guo;Yiwen Yu;Yongjie He;Hao Zhu;Wenjun Liu
{"title":"A NiO/β-Ga2O3 Heterojunction Diode With Ultralow Turn-On Voltage via O2 Plasma Treatment","authors":"Hao Zhang;Yinchi Liu;Jining Yang;Yeye Guo;Yiwen Yu;Yongjie He;Hao Zhu;Wenjun Liu","doi":"10.1109/TED.2026.3669479","DOIUrl":"https://doi.org/10.1109/TED.2026.3669479","url":null,"abstract":"In this work, high-performance NiO/<inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga<sub>2</sub>O<sub>3</sub> heterojunction diodes (HJDs) have been developed through optimized O<sub>2</sub> plasma treatment at the NiO/<inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga<sub>2</sub>O<sub>3</sub> interface. The O<sub>2</sub> plasma process effectively modified the interface between <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga<sub>2</sub>O<sub>3</sub> and p-type NiO, which facilitated the carrier transport across the junction. As a result, the HJDs exhibited a significant reduction in turn-on voltage of 0.81 V and a specific on-resistance (<inline-formula> <tex-math>${R}_{textit {on},textit {sp}}$ </tex-math></inline-formula>) of 6.0 m<inline-formula> <tex-math>$Omega cdot $ </tex-math></inline-formula>cm<sup>2</sup> while maintaining a high breakdown voltage exceeding 2.0 kV. The resulting power figure of merit has reached 0.67 GW/cm<sup>2</sup>, outperforming the most state-of-the-art <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga<sub>2</sub>O<sub>3</sub> HJDs and Schottky barrier diodes (SBDs) without any terminal structures. In addition, the O<sub>2</sub> plasma treatment significantly enhanced device uniformity. These findings demonstrate the O<sub>2</sub> plasma surface modification as an effective interface engineering strategy for achieving low-loss, high-reliability NiO/<inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga<sub>2</sub>O<sub>3</sub> power diodes, offering a promising prospect for next-generation ultrawide bandgap electronic devices.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 4","pages":"2501-2505"},"PeriodicalIF":3.2,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147571050","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Cryogenic Characterization of Ferroelectric Nonvolatile Capacitors 铁电非易失性电容器的低温特性
IF 3.2 2区 工程技术
IEEE Transactions on Electron Devices Pub Date : 2026-04-01 Epub Date: 2026-03-09 DOI: 10.1109/TED.2026.3669147
Madhav Vadlamani;Dyutimoy Chakraborty;Jianwei Jia;Halid Mulaosmanovic;Stefan Duenkel;Sven Beyer;Suman Datta;Shimeng Yu
{"title":"Cryogenic Characterization of Ferroelectric Nonvolatile Capacitors","authors":"Madhav Vadlamani;Dyutimoy Chakraborty;Jianwei Jia;Halid Mulaosmanovic;Stefan Duenkel;Sven Beyer;Suman Datta;Shimeng Yu","doi":"10.1109/TED.2026.3669147","DOIUrl":"https://doi.org/10.1109/TED.2026.3669147","url":null,"abstract":"Ferroelectric-based capacitive crossbar arrays have been proposed for energy-efficient in-memory computing in the charge domain. They combat the challenges like sneak paths and high static power faced by resistive crossbar arrays but are susceptible to thermal noise limiting the effective number of bits (ENOBs) for the weighted sum. A direct way to reduce this thermal noise is by lowering the temperature, as thermal noise is proportional to temperature. In this work, we first characterize the nonvolatile capacitors (nvCAPs) on a foundry 28-nm platform at cryogenic temperatures to evaluate the memory window (MW), on state retention as a function of temperature down to 77 K, and then use the calibrated device models to simulate the capacitive crossbar arrays in SPICE at lower temperatures to demonstrate higher ENOB (~5 bits) for <inline-formula> <tex-math>$128times 128$ </tex-math></inline-formula> multiply-and-accumulate (MAC) operations.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 4","pages":"2511-2514"},"PeriodicalIF":3.2,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147571055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Front-Side Microfabricated Tiny-Size Thermopile-Based Gas Flow Sensor With Integrated Pressure–Temperature Sensing on a Non-SOI (111) Silicon Wafer 在非soi(111)硅片上集成压力-温度传感的前侧微型热电堆气体流量传感器
IF 3.2 2区 工程技术
IEEE Transactions on Electron Devices Pub Date : 2026-04-01 Epub Date: 2026-02-18 DOI: 10.1109/TED.2026.3662661
Jinxia Li;Ke Sun;Fang Song;Haifei Bao;Jiachou Wang;Xinxin Li
{"title":"Front-Side Microfabricated Tiny-Size Thermopile-Based Gas Flow Sensor With Integrated Pressure–Temperature Sensing on a Non-SOI (111) Silicon Wafer","authors":"Jinxia Li;Ke Sun;Fang Song;Haifei Bao;Jiachou Wang;Xinxin Li","doi":"10.1109/TED.2026.3662661","DOIUrl":"https://doi.org/10.1109/TED.2026.3662661","url":null,"abstract":"In this brief, a monolithic gas mass flow, pressure, and temperature multifunctional composite sensor, fabricated on a non-SOI (111) silicon using a single-sided bulk micromachining technique, is first proposed and developed. Unlike traditional counterparts, the gas flow sensor utilizes a single-crystal silicon thermopile, which offers a higher Seebeck coefficient and lower noise compared to traditional polysilicon, thereby achieving higher sensitivity within a more compact footprint. For ambient temperature detection and compensation, a platinum thin-film temperature sensor is positioned adjacent to the flow sensor and is driven by a constant-temperature-difference circuit. In addition, an absolute pressure sensor with an embedded reference cavity in the silicon substrate is integrated on the opposite side of the flow sensor. The entire fabrication process is conducted solely from the front side, eliminating the need for double-sided alignment exposure, cavity-SOI, wafer bonding, and double-sided-polished wafer. This simplified approach results in a tiny chip size of <inline-formula> <tex-math>$0.9times 0.9$ </tex-math></inline-formula> mm, enabling low-cost, high-yield batch production in standard IC foundries. The experimental results show that the 200-sccm-ranged gas flow sensor achieves a high normalized sensitivity of 0.56 mV/sccm/W without any amplification, and a response time of 3.8 ms. The 700-kPa-ranged pressure sensor exhibits a sensitivity of 0.10 mV/kPa with a nonlinearity of 0.06% FS. The temperature sensor shows a highly linear response over the temperature range of <inline-formula> <tex-math>$- 30~^{circ }$ </tex-math></inline-formula>C to <inline-formula> <tex-math>$60~^{circ }$ </tex-math></inline-formula>C, with a temperature coefficient of resistance (TCR) of 0.0023/°C.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 4","pages":"2491-2495"},"PeriodicalIF":3.2,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147571064","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Physical Insight Into Frequency-Dependent Nonlinearities in AlGaN/GaN HEMTs AlGaN/GaN hemt中频率相关非线性的物理洞察
IF 3.2 2区 工程技术
IEEE Transactions on Electron Devices Pub Date : 2026-04-01 Epub Date: 2026-02-24 DOI: 10.1109/TED.2026.3662300
Sergio García-Sánchez;Ignacio Íñiguez-de-la-Torre;Gaudencio Paz-Martínez;Philippe Artillán;Tomás González;Javier Mateos
{"title":"Physical Insight Into Frequency-Dependent Nonlinearities in AlGaN/GaN HEMTs","authors":"Sergio García-Sánchez;Ignacio Íñiguez-de-la-Torre;Gaudencio Paz-Martínez;Philippe Artillán;Tomás González;Javier Mateos","doi":"10.1109/TED.2026.3662300","DOIUrl":"https://doi.org/10.1109/TED.2026.3662300","url":null,"abstract":"We investigate the frequency-dependent nonlinearities of an AlGaN/GaN high electron mobility transistor (HEMT) involved in terahertz (THz) detection by means of 2-D Monte Carlo (MC) simulations. The analysis shows that, below 1 THz, the responsivity roll-off is mainly governed by the passive microwave behavior of the device rather than by any limitation of the intrinsic detection mechanism. At higher frequencies, an inverse extraction method able to provide the intrinsic nonlinearity coefficients of the device reveals just a marginal broad enhancement around 1 THz, followed by a steep roll-off.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 4","pages":"2474-2477"},"PeriodicalIF":3.2,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11408640","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147606273","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Insight Into the Performance Degradation of p-NiO/n-Ga2O3 Heterojunction Barrier Schottky Diode Under Forward Bias Stress 正偏应力下p-NiO/n-Ga2O3异质结势垒肖特基二极管性能退化的研究
IF 3.2 2区 工程技术
IEEE Transactions on Electron Devices Pub Date : 2026-04-01 Epub Date: 2026-03-10 DOI: 10.1109/TED.2026.3670091
Xue-Qiang Ji;Yi-Fei Wang;Ying-Xu Wang;Jun Liu;Shan Li;Li-Li Yang;Jin-Jin Wang;Mao-Lin Zhang;Zeng Liu;Nan He;Pei-Gang Li;Yu-Feng Guo;Wei-Hua Tang
{"title":"Insight Into the Performance Degradation of p-NiO/n-Ga2O3 Heterojunction Barrier Schottky Diode Under Forward Bias Stress","authors":"Xue-Qiang Ji;Yi-Fei Wang;Ying-Xu Wang;Jun Liu;Shan Li;Li-Li Yang;Jin-Jin Wang;Mao-Lin Zhang;Zeng Liu;Nan He;Pei-Gang Li;Yu-Feng Guo;Wei-Hua Tang","doi":"10.1109/TED.2026.3670091","DOIUrl":"https://doi.org/10.1109/TED.2026.3670091","url":null,"abstract":"In this work, we systematically investigated the degradation and recovery behaviors of p-NiO/n-Ga<sub>2</sub>O<sub>3</sub> heterojunction barrier Schottky diodes (HJBS) under high-temperature forward bias (HTFB) stress. Furthermore, based on the observed degradation trends in the device’s DC characteristics, a comprehensive analysis was conducted to elucidate the underlying degradation mechanisms. The as-fabricated HJBS structure, based on a p-NiO/n-Ga<sub>2</sub>O<sub>3</sub> heterojunction, exhibited excellent electrical performance with a breakdown voltage exceeding 1 kV and an on-resistance of 9.23 m<inline-formula> <tex-math>$Omega cdot $ </tex-math></inline-formula>cm<sup>2</sup>. However, during actual circuit operation, devices are inevitably subjected to high-temperature and high-current stress conditions, leading to significant degradation in turn-on voltage and on-resistance. These challenges impose stricter requirements on the reliability of HJBS devices. The device underwent forward bias stress followed by recovery evaluation. After the forward bias stress (2.5 V at <inline-formula> <tex-math>$25~^{circ }$ </tex-math></inline-formula>C) for 15 ks, only a 5.2% degradation in the turn-on voltage increase (<inline-formula> <tex-math>$Delta {V}_{text {on}}$ </tex-math></inline-formula>) was observed. This degradation is attributed to the electron capture associated with donor traps. During the subsequent recovery phase, a nonrecoverable degradation of 2.7% in <inline-formula> <tex-math>$Delta {V}_{text {on}}$ </tex-math></inline-formula> was recorded, which is believed to be caused by the presence of defects compensation or passivation within the bulk material that impeded the release of trapped electrons. These findings provide important insights for improving the reliability of Ga<sub>2</sub>O<sub>3</sub> power devices.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"73 4","pages":"2455-2460"},"PeriodicalIF":3.2,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147571058","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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