IEEE Transactions on Electron Devices最新文献

{"title":"Electrostatic Gating in Ge-Based Reconfigurable Field-Effect Transistors","authors":"A. Fuchsberger;A. Verdianu;L. Wind;D. Nazzari;Enrique Prado Navarrete;C. Wilfingseder;J. Aberl;M. Brehm;J-M. Hartmann;M. Sistani;W. M. Weber","doi":"10.1109/TED.2025.3545802","DOIUrl":"https://doi.org/10.1109/TED.2025.3545802","url":null,"abstract":"Nanoscale Ge has been identified as a promising channel material to enable a reduction of power consumption and an enhancement of the switching speed of reconfigurable field-effect transistors (RFETs). Such multigate transistors allow the run-time switching between n- and p-type operation in a single device. In this work, the specific characteristics and benefits of dual- and triple-independent-gate Ge-based RFETs are discussed by a systematic temperature-dependent investigation of the electrical-gating-related charge carrier transport. While the dual-gate configuration features both a unipolar and ambipolar operation mode, the triple-gate configuration offers bias-independent unipolarity with a symmetric behavior regarding its gating capabilities and <sc>on</small>-state currents with an enhanced <sc>on</small>-to-<sc>off</small>-state ratio by one order of magnitude.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1631-1636"},"PeriodicalIF":2.9,"publicationDate":"2025-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10925403","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740212","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Investigation of InAlN/GaN Circular Transistors for Venus and Other High-Temperature Applications","authors":"Savannah R. Eisner;Yi-Chen Liu;Jared Naphy;Ruiqi Chen;Mina Rais-Zadeh;Debbie G. Senesky","doi":"10.1109/TED.2025.3544181","DOIUrl":"https://doi.org/10.1109/TED.2025.3544181","url":null,"abstract":"This study examines the performance and long-term reliability of depletion-mode In0.18Al0.82/GaN-on-Si circular high electron mobility transistors (C-HEMTs) in high-temperature environments. Transistors were operated at 472 °C in air and 465 °C under simulated Venus conditions (supercritical CO2, 1348 psi) over 5 days. During heating, a reduction in maximum drain current (I<inline-formula> <tex-math>$_{textit {D}text {,max}}$ </tex-math></inline-formula>) and a positive threshold voltage (VTH) shift are observed in both air and Venus surface conditions. The <sc>ON</small>/<sc>OFF</small> current ratio (I<inline-formula> <tex-math>$_{text {ON} }$ </tex-math></inline-formula>/I<inline-formula> <tex-math>$_{text {OFF} }$ </tex-math></inline-formula>) and <sc>OFF</small>-state gate leakage current (I<inline-formula> <tex-math>$_{textit {G} {, text {OFF}}}$ </tex-math></inline-formula>) exhibit unique trends during heating depending on the ambient, yet values upon reaching nominal 468 °C are similar. During the 5-day operation at high-temperature in air, the Mo/Au gate contact demonstrated robust performance with 9% I<inline-formula> <tex-math>$_{textit {D}text {,max}}$ </tex-math></inline-formula> reduction and 3% VTH shift. I<inline-formula> <tex-math>$_{text {ON} }$ </tex-math></inline-formula>/I<inline-formula> <tex-math>$_{text {OFF} }$ </tex-math></inline-formula> improved by 8%, and I<inline-formula> <tex-math>$_{textit {G} {, text {OFF}}}$ </tex-math></inline-formula> decreased by 38%. In comparison, device degradation was more significant in supercritical CO2, where the increased permeability affected the <sc>OFF</small>-state current. The C-HEMT operated in situ Venus surface conditions exhibited 11% reduction in I<inline-formula> <tex-math>$_{textit {D}text {,max}}$ </tex-math></inline-formula>, 7% VTH shift, 30% reduction in I<inline-formula> <tex-math>$_{text {ON} }$ </tex-math></inline-formula>/I<inline-formula> <tex-math>$_{text {OFF} }$ </tex-math></inline-formula>, and 23% reduction in I<inline-formula> <tex-math>$_{textit {G} {, text {OFF}}}$ </tex-math></inline-formula>. Correlation between electrical performance shifts and surface morphology changes, as observed through scanning electron microscopy (SEM) and atomic force microscopy (AFM), provides deeper insights into degradation mechanisms. Despite this, the transistors showed remarkable resilience, and their wide range of available bias points ensures versatile operation for circuit-level implementations in extreme conditions. These findings underscore the suitability of InAlN/GaN HEMTs for uncooled, high-temperature applications without hermetic sealing.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1674-1681"},"PeriodicalIF":2.9,"publicationDate":"2025-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740176","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Multiwindow Implantation Method in Vertical Hall Devices for High Sensitivity","authors":"Guiqiang Zheng;Nannan Cheng;Yichen Li;Jiawei Dou;Qingyin Zhong;Jie Ma;Lanlan Yang;Xiaofeng Sun;Dejin Wang;Sen Zhang;Yongjia Li;Long Zhang;Siyang Liu;Weifeng Sun","doi":"10.1109/TED.2025.3546187","DOIUrl":"https://doi.org/10.1109/TED.2025.3546187","url":null,"abstract":"A novel vertical Hall device (VHD), featuring a waved boundary magnetic-sensitive well, is proposed for the first time in this article. By applying multiwindow implantation (MWI) method in 0.15-<inline-formula> <tex-math>$mu $ </tex-math></inline-formula> m bipolar-CMOS–DMOS (BCD) platform, nonuniform doping profile in lateral and vertical directions is realized and the path of bias current is changed subsequently. The current path with long route and low resistance in the proposed VHD increases the ratio of longitudinal current and a current related sensitivity (<inline-formula> <tex-math>${S} _{I}$ </tex-math></inline-formula>) of 178 V/AT is achieved, which is 49.6% improved compared with the standard VHD. The proposed VHD provides a new solution for the design of high-sensitivity Hall device.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"2020-2024"},"PeriodicalIF":2.9,"publicationDate":"2025-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740295","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A New Silicon Accumulation-Mode Trench Bidirectional Switch","authors":"H. Abnavi;C. Steenge;J. W. Berenschot;N. R. Tas;R. J. E. Hueting","doi":"10.1109/TED.2025.3546582","DOIUrl":"https://doi.org/10.1109/TED.2025.3546582","url":null,"abstract":"The bidirectional switch, or bidiswitch, is a key component widely used for battery protection. During charging and discharging of the battery, the bidiswitch should be able to handle sufficient current and to block high voltages all in both the directions. In this work, we propose a new type of silicon bidiswitch: the accumulation-mode trench bidiswitch (AM bidiswitch). Due to aggressive cell dimensions (<inline-formula> <tex-math>$leq 0.6 ; mu $ </tex-math></inline-formula>m), both the accumulation-mode field effect and the reduced surface field (RESURF) effect can be adopted, so that no separate p-body connection is required, and consequently, minimal specific <sc>on</small>-resistances (<inline-formula> <tex-math>${R}_{text {on,sp}}$ </tex-math></inline-formula>) and even minimal leakage currents (<inline-formula> <tex-math>${I}_{text {rev}}$ </tex-math></inline-formula>) can be obtained. Based on a theoretical framework, an optimization guideline is presented using TCAD simulations. The results show <inline-formula> <tex-math>${R}_{text {on,sp}}$ </tex-math></inline-formula> values ranging from 3.5 to 10.8 m<inline-formula> <tex-math>$Omega cdot $ </tex-math></inline-formula>mm2 for stripe (or 2-D) structures and 6.5 to 45.6 m<inline-formula> <tex-math>$Omega cdot $ </tex-math></inline-formula>mm2 for gate-all-around (GAA) structures, with breakdown voltages (BVs) ranging from 25 to 75 V. For high temperatures (<inline-formula> <tex-math>${T} = {425} ; text {K}$ </tex-math></inline-formula>), the obtained minimal <inline-formula> <tex-math>${I}_{text {rev}}$ </tex-math></inline-formula> ranges from 0.75 to over 5 mA for the stripe structures and from 0.1 to 0.4 mA for the GAA structures both for an active device area of <inline-formula> <tex-math>$1 ; text {mm}^{{2}}$ </tex-math></inline-formula>.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1900-1906"},"PeriodicalIF":2.9,"publicationDate":"2025-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740355","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Unveiling Ferroelectric HZO Cryogenic Performance (4–300 K): Kinetic Barrier Engineering and Underlying Mechanism","authors":"Dong Zhang;Yang Feng;Zijie Zheng;Chen Sun;Qiwen Kong;Yue Chen;Xiaolin Wang;Yuye Kang;Kaizhen Han;Gan Liu;Zuopu Zhou;Zhilun Zhang;Gengchiau Liang;Kai Ni;Jixuan Wu;Jiezhi Chen;Xiao Gong","doi":"10.1109/TED.2025.3546871","DOIUrl":"https://doi.org/10.1109/TED.2025.3546871","url":null,"abstract":"In this work, we perform comprehensive and in-depth investigation of the cryogenic characteristics of ferroelectric (FE) hafnium zirconium oxide (HZO) thin films with varying thicknesses (3/5/7/10 nm) across a broad temperature range (<inline-formula> <tex-math>$4sim 300$ </tex-math></inline-formula> K), assisted by the extensive material and electrical characterizations. We discover: 1) 3 and 5 nm HZO films exhibit distinct temperature dependence in remnant polarization (<inline-formula> <tex-math>${P} _{text {r}}$ </tex-math></inline-formula>) and coercive field (<inline-formula> <tex-math>${E} _{text {c}}$ </tex-math></inline-formula>) as compared with 7 and 10 nm ones owing to different phase transition mechanisms and 2) the concentration and location of oxygen vacancies act as pivotal factors influencing the pinning effect as well as the trap-assisted-tunneling process, thereby affecting the temperature-dependent behaviors of <inline-formula> <tex-math>${P} _{text {r}}$ </tex-math></inline-formula> and <inline-formula> <tex-math>${E} _{text {c}}$ </tex-math></inline-formula>. Building upon these insights, we propose and experimentally demonstrate an innovative cryogenic barrier engineering approach for <inline-formula> <tex-math>${P}_{text {r}}$ </tex-math></inline-formula> enhancement, particularly valuable for ultra-thin HZO films.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1788-1794"},"PeriodicalIF":2.9,"publicationDate":"2025-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740271","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Modulating Self-Heating Effects in GaN HEMTs Using Slant Field Plate","authors":"Zheng-Lai Tang;Yang Shen;Bing-Yang Cao","doi":"10.1109/TED.2025.3546594","DOIUrl":"https://doi.org/10.1109/TED.2025.3546594","url":null,"abstract":"The self-heating effect in electronic devices can lead to localized hotspots, adversely affecting their performance and reliability, particularly in high-power-density devices like gallium nitride (GaN) high-electron-mobility transistors (HEMTs). In addition to enhancing heat dissipation, reducing heat generation through structural design can effectively modulate self-heating effects. This study investigates the modulation effect of an asymmetric slant field plate (FP) on self-heating in GaN HEMTs, using electro-thermal simulations based on the drift-diffusion model. Additionally, Monte Carlo (MC) simulations are employed to examine the influence of the slant FP on phonon ballistic transport under non-Fourier heat conduction. Results show that the slant FP smooths the potential distribution and reduces the maximum electric field intensity in the channel, thereby decreasing the maximum heat generation density. With a slant angle of 6° and an FP length of 1200 nm, the maximum heat generation density is reduced by 50%, and the hotspot temperature rise is lowered by 16%. By adjusting the characteristic size of the heat source, the slant FP further reduces near-junction thermal resistance, achieving the hotspot temperature reduction of over 30% under non-Fourier heat conduction. This work aims to deepen the understanding of self-heating effects in HEMT devices and explore a potential thermal management strategy.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1907-1911"},"PeriodicalIF":2.9,"publicationDate":"2025-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740393","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Growth of High-Hole Mobility Stable ST12-Ge Thin Film on Si Substrate for Developing Metal-Oxide–Semiconductor (MOS) Devices","authors":"Subrata Mandal;Sanatan Chattopadhyay;Nabakumar Rana;Aritra Banerjee;Anupam Karmakar","doi":"10.1109/TED.2025.3546933","DOIUrl":"https://doi.org/10.1109/TED.2025.3546933","url":null,"abstract":"The current work investigates the growth of high-hole mobility ST12-Ge thin film (5.85 nm) on Si substrate for its applications in MOS devices. Micro-Raman study indicates the generation of 3.73 GPa induced compressive stress in such ST12-Ge films and the absorption spectroscopy results confirm a direct bandgap of 0.69 eV and indirect bandgaps of 0.582, 0.634, 0.636, and 0.638 eV. The p-type carrier concentration and room temperature Hall mobility of the film are measured to be <inline-formula> <tex-math>$4.49times 10^{{18}}$ </tex-math></inline-formula> cm<inline-formula> <tex-math>$^{-{3}}$ </tex-math></inline-formula> and <inline-formula> <tex-math>$1.33times 10^{{4}}$ </tex-math></inline-formula> cm2V<inline-formula> <tex-math>$^{-{1}}$ </tex-math></inline-formula>s<inline-formula> <tex-math>$^{-{1}}$ </tex-math></inline-formula>, respectively. C–V measurements of the fabricated Pt/ZrO2/ST12-Ge/n-Si MOS devices indicate a highly effective dielectric constant of 16.4 for ZrO2 with an effective oxide thickness (EOT) of ~4.09 nm along with the formation of a good ZrO<inline-formula> <tex-math>$_{{2}}{}$ </tex-math></inline-formula>/ST12-Ge interface of trap density <inline-formula> <tex-math>$2.76times 10^{{11}}$ </tex-math></inline-formula> cm<inline-formula> <tex-math>$^{-{2}}$ </tex-math></inline-formula>eV<inline-formula> <tex-math>$^{-{1}}$ </tex-math></inline-formula>. The I–V characteristics exhibit a low leakage current density of <inline-formula> <tex-math>$1.57times 10^{-{2}}$ </tex-math></inline-formula> A/cm2 at +2 V and an insignificant stress-induced leakage current (SILC) at −5 V for <inline-formula> <tex-math>$10^{{4}}$ </tex-math></inline-formula> s. Therefore, the overall study confirms the formation of a robust ST12-Ge film and ZrO2/ST12-Ge interface, which is suitable for developing CMOS devices with high channel mobility.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1695-1701"},"PeriodicalIF":2.9,"publicationDate":"2025-03-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740181","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Drain Current Modeling of Antiambipolar TFTs in Subthreshold and Above-Threshold Regimes","authors":"Hongyu He;Xinnan Lin;Shengdong Zhang","doi":"10.1109/TED.2025.3546179","DOIUrl":"https://doi.org/10.1109/TED.2025.3546179","url":null,"abstract":"The drain current modeling of antiambipolar thin film transistors (TFTs) in subthreshold and above-threshold regimes is presented. The drain current expressions of the n-type and p-type unipolar TFTs are extended to describe the electron current and hole current for antiambipolar TFTs, respectively. Applying the rule “smaller than the smallest” with the drain-source voltage-dependent empirical parameter, the drain current model for the antiambipolar TFTs is developed. The model is implemented in the circuit simulator using the Verilog-A programming language. A ternary inverter, which consists of antiambipolar TFT, p-type unipolar TFT, and n-type unipolar TFTs, is demonstrated.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1822-1827"},"PeriodicalIF":2.9,"publicationDate":"2025-03-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740225","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Theoretical Investigation of Self-Heating Effect on AC Quantum Transport in p-Type FinFET in THz Frequency by AC Non-Equilibrium Green’s Function Method With Phonon Scattering","authors":"Liang Tian;Erping Li;Yizhang Liu;Yinshui Xia;Wenchao Chen","doi":"10.1109/TED.2025.3546180","DOIUrl":"https://doi.org/10.1109/TED.2025.3546180","url":null,"abstract":"In this article, a multiphysics simulation is performed to investigate the self-heating effect (SHE) on p-type FinFET ac quantum transport by introducing the temperature distribution obtained from dc quantum transport and heat conduction simulation into the ac non-equilibrium Green’s function with consideration of phonon scattering. The complicated valence band and hole-phonon scattering are captured by employing three-band <inline-formula> <tex-math>$boldsymbol {k}cdot boldsymbol {p}$ </tex-math></inline-formula> Hamiltonian and self-consistent Born approximation approach, respectively. The displacement current is considered in ac current density in addition to the conduction current by solving the Poisson equation and the ac non-equilibrium Green’s function (NEGF) equations self-consistently. The impact of the SHE on Y parameters, small-signal current gains, and cutoff frequency is investigated, and the corresponding underlying physical mechanism is also investigated by analyzing the ac current density spectrum and hole-density spectrum. The simulation results show that the SHE can affect the small-signal current gain and cutoff frequency by affecting <inline-formula> <tex-math>${Y}_{text {DG}}$ </tex-math></inline-formula> rather than <inline-formula> <tex-math>${Y}_{text {GG}}$ </tex-math></inline-formula>. For the device operated with gate voltage magnitude less than 0.4 V, the cutoff frequency and small-signal current gain can be increased because the hole energy is enhanced by the SHE, which means they can more easily cross or tunnel through the barrier, thereby increasing the amplitude of <inline-formula> <tex-math>${Y}_{text {DG}}$ </tex-math></inline-formula>. In contrast, for the device operated with gate voltage magnitude greater than 0.5 V, the small-signal current gain and the cutoff frequency are decreased because the amplitude of <inline-formula> <tex-math>${Y}_{text {DG}}$ </tex-math></inline-formula> is decreased by the enhanced hole-phonon scattering.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1624-1630"},"PeriodicalIF":2.9,"publicationDate":"2025-03-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740216","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"An Improved Compact Model of T-Gate HEMT Based on Effective Gate Length","authors":"Kaiyuan Zhao;Hao Lu;Xiaoyu Cheng;Meng Zhang;Luqiao Yin;Bingjun Li;Aiying Guo;Jingjing Liu;Jianhua Zhang;Kailin Ren","doi":"10.1109/TED.2025.3544999","DOIUrl":"https://doi.org/10.1109/TED.2025.3544999","url":null,"abstract":"Advanced SPICE Model for high electron mobility transistor (ASM-HEMT) is one of the industry standard models for GaN-based high electron mobility transistors (HEMTs), in which there still lack analytical models for the distribution of the physical properties inside the device, especially a model for the distribution of the transverse electric field (<inline-formula> <tex-math>${E}_{text {X}}$ </tex-math></inline-formula>) and carrier concentration (<inline-formula> <tex-math>${n}_{text {S}}$ </tex-math></inline-formula>) that can be linked to the drain current (<inline-formula> <tex-math>${I}_{text {DS}}$ </tex-math></inline-formula>) and gate charge (<inline-formula> <tex-math>${Q}_{text {G}}$ </tex-math></inline-formula>). Besides, the modeling of operations in the saturation region in ASM-HEMT is dependent on empirical parameters without physical significance. In this work: 1) effective gate length (<inline-formula> <tex-math>${L}_{text {G,eff}}$ </tex-math></inline-formula>) as a core parameter for saturation region modeling is calculated to capture the velocity saturation occurring in HEMTs; 2) distribution of <inline-formula> <tex-math>${E}_{text {X}}$ </tex-math></inline-formula> and <inline-formula> <tex-math>${n}_{text {S}}$ </tex-math></inline-formula> varying with gate and drain biases in the linear and saturation regions is modeled; 3) a field plate (FP) aware T-gate HEMT model is developed to capture the reduction of the peak electric field and the additional parasitic effect caused by the FP. The model is verified by characterizing the <inline-formula> <tex-math>${I}_{text {DS}}$ </tex-math></inline-formula> and Miller capacitance (<inline-formula> <tex-math>${C}_{text {GD}}$ </tex-math></inline-formula>) of the fabricated T-gate HEMTs, with RMSE lower than 7.5%, indicating a high degree of agreement.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 4","pages":"1682-1688"},"PeriodicalIF":2.9,"publicationDate":"2025-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143740180","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}