Hyeon Seo Yun;Seul Ki Hong;Seung Jae Baik;Jaeduk Lee;Jong Kyung Park
{"title":"基于catboost的z干涉建模精确预测缩放三维NAND闪存阈值电压分布","authors":"Hyeon Seo Yun;Seul Ki Hong;Seung Jae Baik;Jaeduk Lee;Jong Kyung Park","doi":"10.1109/TED.2025.3589196","DOIUrl":null,"url":null,"abstract":"This article presents a machine learning approach using CatBoost regression to model Z-interference (Z-INF) effects in scaled 3-D <sc>nand</small> flash memory. As vertical integration of word-lines (WLs) increases bit density, pitch scaling intensifies cell-to-cell interference, widening threshold voltage (<inline-formula> <tex-math>${V}_{\\text {th}}\\text {)}$ </tex-math></inline-formula> distributions, and reducing sensing margins. Conventional TCAD simulations and exponential function fitting can handle two-parameter relationships but cannot adequately model multiple variables affecting Z-INF. Our proposed three-parameter model incorporates both initial and final states of attack cells with victim cell characteristics, while maintaining extensibility for additional factors at smaller cell dimensions. Experimental results confirm that the model accurately predicts <inline-formula> <tex-math>${V}_{\\text {th}}$ </tex-math></inline-formula> distribution changes across various WL geometries with improved computational efficiency. Analysis shows Z-INF increases 4–5 times when oxide/nitride (ON) pitch decreases from 50 to 40 nm, with critical degradation below 45 nm. The model successfully accounts for process variations and identifies scaling thresholds, providing insights for reliability improvement and error correction in advanced 3-D <sc>nand</small> architectures.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 9","pages":"4851-4855"},"PeriodicalIF":3.2000,"publicationDate":"2025-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"CatBoost-Based Z-Interference Modeling for Accurate Prediction of Threshold Voltage Distribution in Scaled 3-D NAND Flash\",\"authors\":\"Hyeon Seo Yun;Seul Ki Hong;Seung Jae Baik;Jaeduk Lee;Jong Kyung Park\",\"doi\":\"10.1109/TED.2025.3589196\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This article presents a machine learning approach using CatBoost regression to model Z-interference (Z-INF) effects in scaled 3-D <sc>nand</small> flash memory. As vertical integration of word-lines (WLs) increases bit density, pitch scaling intensifies cell-to-cell interference, widening threshold voltage (<inline-formula> <tex-math>${V}_{\\\\text {th}}\\\\text {)}$ </tex-math></inline-formula> distributions, and reducing sensing margins. Conventional TCAD simulations and exponential function fitting can handle two-parameter relationships but cannot adequately model multiple variables affecting Z-INF. Our proposed three-parameter model incorporates both initial and final states of attack cells with victim cell characteristics, while maintaining extensibility for additional factors at smaller cell dimensions. Experimental results confirm that the model accurately predicts <inline-formula> <tex-math>${V}_{\\\\text {th}}$ </tex-math></inline-formula> distribution changes across various WL geometries with improved computational efficiency. Analysis shows Z-INF increases 4–5 times when oxide/nitride (ON) pitch decreases from 50 to 40 nm, with critical degradation below 45 nm. The model successfully accounts for process variations and identifies scaling thresholds, providing insights for reliability improvement and error correction in advanced 3-D <sc>nand</small> architectures.\",\"PeriodicalId\":13092,\"journal\":{\"name\":\"IEEE Transactions on Electron Devices\",\"volume\":\"72 9\",\"pages\":\"4851-4855\"},\"PeriodicalIF\":3.2000,\"publicationDate\":\"2025-07-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Electron Devices\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/11099092/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electron Devices","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11099092/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
CatBoost-Based Z-Interference Modeling for Accurate Prediction of Threshold Voltage Distribution in Scaled 3-D NAND Flash
This article presents a machine learning approach using CatBoost regression to model Z-interference (Z-INF) effects in scaled 3-D nand flash memory. As vertical integration of word-lines (WLs) increases bit density, pitch scaling intensifies cell-to-cell interference, widening threshold voltage (${V}_{\text {th}}\text {)}$ distributions, and reducing sensing margins. Conventional TCAD simulations and exponential function fitting can handle two-parameter relationships but cannot adequately model multiple variables affecting Z-INF. Our proposed three-parameter model incorporates both initial and final states of attack cells with victim cell characteristics, while maintaining extensibility for additional factors at smaller cell dimensions. Experimental results confirm that the model accurately predicts ${V}_{\text {th}}$ distribution changes across various WL geometries with improved computational efficiency. Analysis shows Z-INF increases 4–5 times when oxide/nitride (ON) pitch decreases from 50 to 40 nm, with critical degradation below 45 nm. The model successfully accounts for process variations and identifies scaling thresholds, providing insights for reliability improvement and error correction in advanced 3-D nand architectures.
期刊介绍:
IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.