{"title":"双SOI nmosfet中后门偏压对总电离剂量和热载流子注入效应的影响","authors":"Yuan Gao;Zihan Wang;Yongwei Chang;Zhongying Xue;Xing Wei","doi":"10.1109/TED.2025.3552744","DOIUrl":null,"url":null,"abstract":"Double silicon-on-insulator (DSOI) device exhibits high tolerance to total ionizing dose (TID) effect due to back gate bias (<inline-formula> <tex-math>${V}_{\\text {bg}}$ </tex-math></inline-formula>) modulation. Negative <inline-formula> <tex-math>${V}_{\\text {bg}}$ </tex-math></inline-formula> is required to compensate for the performance degradation caused by the TID effect, while positive <inline-formula> <tex-math>${V}_{\\text {bg}}$ </tex-math></inline-formula> is required to compensate for the degradation caused by hot carrier injection (HCI) effect. This article focuses on the synergistic effect between TID and HCI under different back-gate voltage and modulation effect of <inline-formula> <tex-math>${V}_{\\text {bg}}$ </tex-math></inline-formula>. The HCI effect is exacerbated by TID effect owing to the trapped charges in the oxide, which enhance the impact of ionizing in channel region. <inline-formula> <tex-math>${\\Delta } {V}_{\\text {th}}$ </tex-math></inline-formula> [<inline-formula> <tex-math>${V}_{\\text {th}}$ </tex-math></inline-formula> at 3 Mrad(Si) <inline-formula> <tex-math>$- {V}_{\\text {th}}$ </tex-math></inline-formula> at 0 Mrad(Si)] of DSOI MOSFET without stress is approximately −0.215 V, larger than that of stressed device. Additionally, applying a back-gate bias to mid-Si is an effective method to suppress the degradation in synergistic experiments.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 5","pages":"2159-2164"},"PeriodicalIF":2.9000,"publicationDate":"2025-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Impact of Back-Gate Bias on the Total Ionizing Dose and Hot Carrier Injection Effects in Double SOI nMOSFETs\",\"authors\":\"Yuan Gao;Zihan Wang;Yongwei Chang;Zhongying Xue;Xing Wei\",\"doi\":\"10.1109/TED.2025.3552744\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Double silicon-on-insulator (DSOI) device exhibits high tolerance to total ionizing dose (TID) effect due to back gate bias (<inline-formula> <tex-math>${V}_{\\\\text {bg}}$ </tex-math></inline-formula>) modulation. Negative <inline-formula> <tex-math>${V}_{\\\\text {bg}}$ </tex-math></inline-formula> is required to compensate for the performance degradation caused by the TID effect, while positive <inline-formula> <tex-math>${V}_{\\\\text {bg}}$ </tex-math></inline-formula> is required to compensate for the degradation caused by hot carrier injection (HCI) effect. This article focuses on the synergistic effect between TID and HCI under different back-gate voltage and modulation effect of <inline-formula> <tex-math>${V}_{\\\\text {bg}}$ </tex-math></inline-formula>. The HCI effect is exacerbated by TID effect owing to the trapped charges in the oxide, which enhance the impact of ionizing in channel region. <inline-formula> <tex-math>${\\\\Delta } {V}_{\\\\text {th}}$ </tex-math></inline-formula> [<inline-formula> <tex-math>${V}_{\\\\text {th}}$ </tex-math></inline-formula> at 3 Mrad(Si) <inline-formula> <tex-math>$- {V}_{\\\\text {th}}$ </tex-math></inline-formula> at 0 Mrad(Si)] of DSOI MOSFET without stress is approximately −0.215 V, larger than that of stressed device. Additionally, applying a back-gate bias to mid-Si is an effective method to suppress the degradation in synergistic experiments.\",\"PeriodicalId\":13092,\"journal\":{\"name\":\"IEEE Transactions on Electron Devices\",\"volume\":\"72 5\",\"pages\":\"2159-2164\"},\"PeriodicalIF\":2.9000,\"publicationDate\":\"2025-04-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Electron Devices\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10965592/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electron Devices","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10965592/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Impact of Back-Gate Bias on the Total Ionizing Dose and Hot Carrier Injection Effects in Double SOI nMOSFETs
Double silicon-on-insulator (DSOI) device exhibits high tolerance to total ionizing dose (TID) effect due to back gate bias (${V}_{\text {bg}}$ ) modulation. Negative ${V}_{\text {bg}}$ is required to compensate for the performance degradation caused by the TID effect, while positive ${V}_{\text {bg}}$ is required to compensate for the degradation caused by hot carrier injection (HCI) effect. This article focuses on the synergistic effect between TID and HCI under different back-gate voltage and modulation effect of ${V}_{\text {bg}}$ . The HCI effect is exacerbated by TID effect owing to the trapped charges in the oxide, which enhance the impact of ionizing in channel region. ${\Delta } {V}_{\text {th}}$ [${V}_{\text {th}}$ at 3 Mrad(Si) $- {V}_{\text {th}}$ at 0 Mrad(Si)] of DSOI MOSFET without stress is approximately −0.215 V, larger than that of stressed device. Additionally, applying a back-gate bias to mid-Si is an effective method to suppress the degradation in synergistic experiments.
期刊介绍:
IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.