Meta-Optimized LDMOS Process–Device Co-Optimization: Extrapolation-Enhanced Modeling With Wafer-Level Validation

Accurate and efficient modeling of lateral double-diffused MOS (LDMOS) devices is critical for process optimization and reliability analysis, especially under limited simulation budgets. However, data-driven modeling for semiconductor devices faces three key challenges: limited training data due to the high cost of technology computer-aided design (TCAD) and silicon measurements; poor generalization to extrapolated or extreme configurations; and a gap between simulation and measured data, which undermines predictive reliability in practical use cases. To address these issues, this work presents a model-agnostic meta-learning (MAML) framework that improves the prediction accuracy and adaptability of deep neural networks and convolutional neural networks (CNNs) for TCAD-based process–device modeling. To further evaluate generalization to extrapolated scenarios, we introduce an additional dataset of samples whose input parameters lie within the design space but whose electrical outputs are near or beyond the original training range. This setup mimics real-world edge cases where accurate prediction is essential for safe operating area (SOA) design. Subsequently, k-means clustering is used to define distinct tasks, enabling task-specific fine-tuning. MAML-based models show significant performance improvements under this configuration, approaching in-distribution accuracy. Moreover, wafer-level experiments further validate the model’s guidance, confirming improvements in breakdown voltage without compromising on-resistance. Taken together, these results demonstrate that the proposed MAML framework effectively enhances model generalization and sample efficiency in semiconductor device modeling, supporting scalable and robust prediction under data-limited and distribution-shifted conditions.