Modeling the Parasitic Capacitance of Nanosheet FETs With Backside Power Delivery Network

IF 3.2 2区工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Transactions on Electron Devices Pub Date : 2025-07-17 DOI:10.1109/TED.2025.3585478

Hengyi Liu;Sihao Chen;Baokang Peng;Heng Wu;Runsheng Wang;Lining Zhang

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引用次数: 0

Abstract

This article presents a parasitic capacitance model for gate-all-around (GAA) nanosheet FETs (NsFETs) with backside power delivery network (BSPDN) including three types of techniques buried power rail (BPR), through Silicon Via in MOL (TSVM), and backside contact (BSC). Based on the electrical field analysis and elliptical integral method, the different parasitic capacitance components are extracted and accurately modeled. In addition, the variation in parasitic capacitance components with the structural parameters is also investigated for design optimization of NsFETs with BSPDN. The extra parasitic capacitance induced by the TSVM, BPR, and BSC accounts for about 19.4%, 14.1%, and 7.4% in the

${C}_{\textit {gs}\_{\textit {para}}}$

(or

${C}_{\textit {gd}\_{\textit {para}}}\text {)}$

, respectively. Furthermore, the proposed models were integrated into a calibrated NsFET model, enabling an analysis of the parasitic capacitance induced by the BSPDN in the MEOL at the prelayout stage. The dynamic performance of the circuits, such as ring oscillators, is evaluated under various geometric parameters. This work provides insight into the design technology co-optimization of BSPDN technology in advanced nodes.

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基于反向供电网络的纳米片场效应管寄生电容建模

本文提出了具有背面供电网络（BSPDN）的GAA纳米片场效应管（nsfet）的寄生电容模型，包括埋地电源轨（BPR）、通过硅孔摩尔（TSVM）和背面触点（BSC）三种技术。基于电场分析和椭圆积分法，提取了不同寄生电容分量，并进行了精确建模。此外，还研究了寄生电容分量随结构参数的变化规律，以优化带有BSPDN的非甾体场效应管的设计。在${C}_{\textit {gs}\_{\textit {para}} $（或${C}_{\textit {gd}\_{\textit {para}}}\text{）}$中，TSVM、BPR和BSC诱导的额外寄生电容分别约占19.4%、14.1%和7.4%。此外，将所提出的模型集成到校准的NsFET模型中，从而能够在预布局阶段分析由BSPDN在MEOL中引起的寄生电容。对环形振荡器等电路在不同几何参数下的动态性能进行了评价。这项工作为BSPDN技术在高级节点上的设计技术协同优化提供了见解。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Electron Devices 工程技术-工程：电子与电气

CiteScore

5.80

自引率

16.10%

发文量

937

审稿时长

3.8 months

期刊介绍： IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.