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Technical digest. International Electron Devices Meeting最新文献

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0.1 /spl mu/m RFCMOS on high resistivity substrates for system on chip (SOC) applications 用于片上系统(SOC)应用的高电阻率基板上的0.1 /spl mu/m RFCMOS
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175927
Jau-Yuann Yang, Kamel Benaissa, D. Crenshaw, B. Williams, S. Sridhar, J. Ai, G. Boselli, Song Zhao, Shaoping Tang, N. Mahalingam, S. Ashburn, P. Madhani, T. Blythe, Hisashi Shichijo
{"title":"0.1 /spl mu/m RFCMOS on high resistivity substrates for system on chip (SOC) applications","authors":"Jau-Yuann Yang, Kamel Benaissa, D. Crenshaw, B. Williams, S. Sridhar, J. Ai, G. Boselli, Song Zhao, Shaoping Tang, N. Mahalingam, S. Ashburn, P. Madhani, T. Blythe, Hisashi Shichijo","doi":"10.1109/IEDM.2002.1175927","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175927","url":null,"abstract":"This paper describes the impact of substrate resistivity on the key components of the radio frequency (RF) CMOS for the system on chip (SOC) applications. The comparison includes the transistor, inductor, capacitor, noise isolation, latch-up as well as the well-to-well isolation in a 0.1 /spl mu/m (physical gate length) CMOS technology.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"2 1","pages":"667-670"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74510508","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 24
Charge trapping in high k gate dielectric stacks 高k栅电介质堆中的电荷捕获
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175893
S. Zafar, A. Callegari, E. Gusev, M. Fischetti
{"title":"Charge trapping in high k gate dielectric stacks","authors":"S. Zafar, A. Callegari, E. Gusev, M. Fischetti","doi":"10.1109/IEDM.2002.1175893","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175893","url":null,"abstract":"Charge trapping in Al/sub 2/O/sub 3/ and HfO/sub 2/ nFETs is studied. The dependence of threshold voltage, subthreshold slope and gate leakage currents are investigated as a function of stressing time, voltage and temperature. Based on the experimental data, a model is developed for predicting threshold voltage shifts as a function stressing time. The model is compatible with both Al/sub 2/O/sub 3/ and HfO/sub 2/ data. Using the model, threshold voltage shifts after 10 years of stressing is predicted and trapping capture cross sections are estimated. A comparison between Al/sub 2/O/sub 3/ and HfO/sub 2/ is also made.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"78 1","pages":"517-520"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74589890","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 91
Ultra-high-speed scaled-down self-aligned SEG SiGe HBTs 超高速按比例缩小自对准SEG SiGe hbt
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175951
K. Washio, E. Ohue, R. Hayami, A. Kodama, H. Shimamoto, M. Miura, K. Oda, I. Suzumura, T. Tominari, T. Hashimoto
{"title":"Ultra-high-speed scaled-down self-aligned SEG SiGe HBTs","authors":"K. Washio, E. Ohue, R. Hayami, A. Kodama, H. Shimamoto, M. Miura, K. Oda, I. Suzumura, T. Tominari, T. Hashimoto","doi":"10.1109/IEDM.2002.1175951","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175951","url":null,"abstract":"A self-aligned selective-epitaxial-growth (SEG) SiGe HBT with a funnel-shape emitter electrode, which is structurally optimized for an emitter being scaled-down towards 100 nm, was developed. This SiGe HBT has an ECL gate delay of 4.9 ps, and implemented in an ultra-high-speed static frequency divider, produces a maximum operating frequency of 81 GHz.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"45 1","pages":"767-770"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79093997","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Examination of hole mobility in ultra-thin body SOI MOSFETs 超薄体SOI mosfet中空穴迁移率的研究
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175777
Z. Ren, P. Solomon, T. Kanarsky, B. Doris, O. Dokumaci, P. Oldiges, R. Roy, E. Jones, M. Ieong, R.J. Miller, W. Haensch, H.-S.P. Wong
{"title":"Examination of hole mobility in ultra-thin body SOI MOSFETs","authors":"Z. Ren, P. Solomon, T. Kanarsky, B. Doris, O. Dokumaci, P. Oldiges, R. Roy, E. Jones, M. Ieong, R.J. Miller, W. Haensch, H.-S.P. Wong","doi":"10.1109/IEDM.2002.1175777","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175777","url":null,"abstract":"This paper presents an experimental examination of hole mobility in ultra-thin body (UTB) SOI MOSFETs, covering wide ranges of T/sub SOI/ (between /spl sim/3.7 nm and /spl sim/50 nm), and temperature (between /spl sim/79 K and /spl sim/320 K). This paper addresses the observed strong degradation of hole mobility at extremely thin T/sub SOI/, proposing an additional surface roughness scattering mechanism for the thinnest samples due to the perturbation of the conducting band potential stemming from spatial confinement.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"27 1","pages":"51-54"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79300738","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
Highly reliable MONOS devices with optimized silicon nitride film having deuterium terminated charge traps 高度可靠的MONOS器件与优化的氮化硅薄膜具有氘终止电荷阱
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175821
M. Tanaka, S. Saida, Y. Mitani, I. Mizushima, Y. Tsunashima
{"title":"Highly reliable MONOS devices with optimized silicon nitride film having deuterium terminated charge traps","authors":"M. Tanaka, S. Saida, Y. Mitani, I. Mizushima, Y. Tsunashima","doi":"10.1109/IEDM.2002.1175821","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175821","url":null,"abstract":"For highly reliable MONOS devices, an optimized silicon nitride film has been designed from a detailed investigation of relationships between electrically wide ranging films and device performance, and a large improvement has been realized by the powerful technique of deuterium annealing, yielding highly durable devices against endurance stress of write/erase operations.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"50 1","pages":"237-240"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75754214","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
10 W GaInP/GaAs power HBTs for base station applications 用于基站应用的10w GaInP/GaAs功率hbt
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175930
P. Kurpas, A. Maaßdorf, W. Doser, P. Heymann, B. Janke, F. Schnieder, H. Blanck, P. Auxemery, D. Pons, W. Heinrich, J. Wurfl
{"title":"10 W GaInP/GaAs power HBTs for base station applications","authors":"P. Kurpas, A. Maaßdorf, W. Doser, P. Heymann, B. Janke, F. Schnieder, H. Blanck, P. Auxemery, D. Pons, W. Heinrich, J. Wurfl","doi":"10.1109/IEDM.2002.1175930","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175930","url":null,"abstract":"Reports on GaInP/GaAs HBTs suitable for high voltage operation as required for base station amplifiers. The high breakdown voltages are achieved by adjusting thickness and doping level of the collector layer. Record BV/sub cbo/ and BV/sub ceo/ values of 80 V and 47 V, respectively, are obtained for a 3.5 /spl mu/m thick collector doped to 4 /spl times/ 10/sup 15/ cm/sup -3/. In order to realize the very high transistor mesa of more than 5 /spl mu/m reliably, the standard HBT process was modified. HBT operation at 2 GHz for high supply voltages up to 32V is demonstrated. Good RF performance is confirmed by f/sub T/ values higher than 20 GHz and usable current densities in excess of 1 /spl times/ 10/sup 4/ A/cm/sup 2/. Power HBTs with an emitter area of up to 5000 /spl mu/m/sup 2/ deliver 10 W of output power at 2 GHz with high efficiencies (PAE=50-79%) and 8-13 dB gain. Compared to LDMOS devices, these power HBTs exhibit a much larger output impedance (e.g., 20 /spl Omega/ for a 4000 /spl mu/m/sup 2/ device), which facilitates combining to very large power amplifiers. Heat-sinking strategies for high power HBTs are discussed based on power results and thermal simulations.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"99 1","pages":"681-684"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78810910","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Single photons and entangled photons from a quantum dot 来自量子点的单光子和纠缠光子
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175785
J. Vučković, C. Santori, D. Fattal, M. Pelton, G. Solomon, Bingyan Zhang, J. Plant, Y. Yamamoto
{"title":"Single photons and entangled photons from a quantum dot","authors":"J. Vučković, C. Santori, D. Fattal, M. Pelton, G. Solomon, Bingyan Zhang, J. Plant, Y. Yamamoto","doi":"10.1109/IEDM.2002.1175785","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175785","url":null,"abstract":"We present an efficient source of indistinguishable single photons based on a pulsed excitation of a self-assembled InAs/GaAs quantum dot embedded in a three-dimensional micropost microcavity. The probability of generating two photons for the same pulse is reduced to 2%, compared to a Poisson-distributed source of the same intensity. An extension of this technique can be used to generate entangled photons. This photon source is crucial for practical implementations of quantum key distribution, as well as for quantum computation and networking based on photonic qubits.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"19 1","pages":"87-90"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74774664","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Scattering matrix based compact MOSFET model 基于散射矩阵的紧凑MOSFET模型
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175794
H. Wang, G. Gildenblat
{"title":"Scattering matrix based compact MOSFET model","authors":"H. Wang, G. Gildenblat","doi":"10.1109/IEDM.2002.1175794","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175794","url":null,"abstract":"This work introduces a compact MOSFET model including quasi-ballistic effects. The proposed model is based on a combination of the one-flux scattering matrix approach with an advanced surface-potential-based model. The ballistic limit and traditional charge-sheet models are recovered as special cases. Circuit simulations demonstrate the practicality of the new approach to compact modeling.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"8 1","pages":"125-128"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74958834","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Advancement of MEMS into RF-filter applications MEMS在射频滤波器应用中的进展
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175981
R. Aigner, J. Ella, Hans-Joerg Timme, L. Elbrecht, W. Nessler, Stefan Marksteiner
{"title":"Advancement of MEMS into RF-filter applications","authors":"R. Aigner, J. Ella, Hans-Joerg Timme, L. Elbrecht, W. Nessler, Stefan Marksteiner","doi":"10.1109/IEDM.2002.1175981","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175981","url":null,"abstract":"RF-MEMS filters will substitute conventional filters in mobile communication under certain technical and commercial conditions. Key performance parameters and requirements are discussed in detail. Two different approaches for RF-MEMS filters are reviewed and compared: Electric field driven MEMS-resonators and piezoelectric MEMS resonators. State-of-the-art RF-MEMS filters based on bulk-acoustic-wave (BAW) resonators are presented.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"116 1","pages":"897-900"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77234535","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 88
High performance cell technology featuring sub-100nm DRAM with multi-gigabit density 高性能单元技术，采用低于100nm的DRAM，具有多千兆密度
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175967
B. Lee, Jong-ryeol Yoo, Deok-Hyung Lee, Cheol Kim, I.S. Jung, Siyoung Choi, U. Chung, J. Moon
{"title":"High performance cell technology featuring sub-100nm DRAM with multi-gigabit density","authors":"B. Lee, Jong-ryeol Yoo, Deok-Hyung Lee, Cheol Kim, I.S. Jung, Siyoung Choi, U. Chung, J. Moon","doi":"10.1109/IEDM.2002.1175967","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175967","url":null,"abstract":"Fully metal embedded cell technologies, including poly-Si/W/sub x/N/W gate, Co salicide with elevated source/drain using UHV-selective epitaxial growth and CVD-W cell pad has been integrated successfully for the first time for 100 nm design rule DRAM devices. Each key technology exhibits excellent performance.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"411 1","pages":"835-838"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74122817","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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