Jau-Yuann Yang, Kamel Benaissa, D. Crenshaw, B. Williams, S. Sridhar, J. Ai, G. Boselli, Song Zhao, Shaoping Tang, N. Mahalingam, S. Ashburn, P. Madhani, T. Blythe, Hisashi Shichijo
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0.1 /spl mu/m RFCMOS on high resistivity substrates for system on chip (SOC) applications
This paper describes the impact of substrate resistivity on the key components of the radio frequency (RF) CMOS for the system on chip (SOC) applications. The comparison includes the transistor, inductor, capacitor, noise isolation, latch-up as well as the well-to-well isolation in a 0.1 /spl mu/m (physical gate length) CMOS technology.