Iet Circuits Devices & Systems最新文献_第6页

Partition Border Tuning and Chattering Mitigation for DC–DC Series Resonant Converters: A Stability-Oriented Approach DC-DC串联谐振变换器的分割边界调谐和颤振抑制：一种面向稳定性的方法

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2026-01-31 DOI: 10.1049/cds2/9961947

Mahdi Vakilfard, Asghar Taheri, Amir Ghasemian

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IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2026-01-29

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Dynamic Equivalent Model of Two-Staged Distributed Photovoltaic Cluster Based on Multiple Clustering Algorithms 基于多聚类算法的两阶段分布式光伏集群动态等效模型

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2026-01-29 DOI: 10.1049/cds2/8895067

Tianyu Zhang

{"title":"Dynamic Equivalent Model of Two-Staged Distributed Photovoltaic Cluster Based on Multiple Clustering Algorithms","authors":"Tianyu Zhang","doi":"10.1049/cds2/8895067","DOIUrl":"10.1049/cds2/8895067","url":null,"abstract":"Aiming at the modeling problem of bipolar distributed photovoltaic (DPV) cluster, this paper proposes a clustering equivalent modeling method based on clustering algorithm. First, by analyzing the detailed model of bipolar DPV, it is found that the indexes that can reflect its steady-state and dynamic characteristics mainly include energy storage element parameters such as inductance and capacitance and PI control parameters. Then, combined with the five commonly used clustering algorithms, the clusters composed of ten DPVs are clustered and grouped. Finally, the dynamic simplified model of DPV cluster is obtained by parameter aggregation and model equivalence of DPV in the same group. The above analysis is simulated and verified on the IEEE33 node system containing 10 DPVs, and the traditional single-machine equivalent model and double-machine equivalent model and clustering model are added for comparative analysis. The simulation results show that the clustering equivalent model can correctly reflect the dynamic response characteristics of DPV clusters under different working conditions. The error between each clustering model and the detailed model is not more than 10%. Among them, the fuzzy C-mean (FCM) clustering model has the best effect, the minimum error is 0.11%, and the maximum error of the single machine equivalent model is 9.3%.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"2026 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2026-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cds2/8895067","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146148245","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2026-01-29

引用次数: 0

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2025-12-22

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Temperature-Driven Performance and Reliability Trade-Offs in 7 nm FinFET-Based Dynamic Comparators 基于7纳米finfet的动态比较器的温度驱动性能和可靠性权衡

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2025-12-22 DOI: 10.1049/cds2/6950438

MD Badhesha, J. Ajayan, Asisa Kumar Panigrahy, Amit Krishna Dwivedi

{"title":"Temperature-Driven Performance and Reliability Trade-Offs in 7 nm FinFET-Based Dynamic Comparators","authors":"MD Badhesha, J. Ajayan, Asisa Kumar Panigrahy, Amit Krishna Dwivedi","doi":"10.1049/cds2/6950438","DOIUrl":"10.1049/cds2/6950438","url":null,"abstract":"Both circuit performance and long-term reliability are significantly impacted by the combined effects of temperature-induced drive current fluctuations and self-heating in FinFET devices. The performance of a three-stage rail-to-rail dynamic comparator based on a 7 nm FinFET is examined in this work, taking into account the effects of thermal changes caused by supply voltage and input voltage (ΔVin) as well as bias temperature instability (BTI) stress. When compared to traditional bulk CMOS comparators, FinFET-based three-stage rail-to-rail dynamic comparators show essentially different delay–temperature characteristics, according to extensive HSPICE simulations. Even in the super-threshold supply voltage domain, the 7 nm FinFET-based design shows decreased delay but increased power consumption as temperature rises, in contrast to CMOS comparators, where delay usually increases with temperature. However, at high temperatures, leakage power dissipation increases dramatically, resulting in a loss of performance. With immediate applications in ultralow-power Internet of Things (IoT) nodes, sophisticated memory sense amplifiers, high-frequency communication systems, and portable biomedical equipment, these insights are especially helpful in directing the design of next-generation high-speed and energy-efficient mixed-signal circuits.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"2025 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2025-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cds2/6950438","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145824731","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Universal Active Coupler Design With Arbitrary and Continuous Phase Adjustment 具有任意和连续相位调整的通用有源耦合器设计

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2025-12-18 DOI: 10.1049/cds2/5566516

Samaneh Sadi, Abdolreza Nabavi, Massoud Dousti

{"title":"Universal Active Coupler Design With Arbitrary and Continuous Phase Adjustment","authors":"Samaneh Sadi, Abdolreza Nabavi, Massoud Dousti","doi":"10.1049/cds2/5566516","DOIUrl":"10.1049/cds2/5566516","url":null,"abstract":"This paper presents the design of an integrated wideband active coupler, using a universal structure designed for 45° and 180°, to realize arbitrary phase shifts below 90° and above 90°, respectively, by adjusting a pair of capacitors in the coupler. Furthermore, continuous phase shifts within the ranges of 180°–135° and 40°–90° are achieved. The variable capacitor in the passive network (PN) is implemented using variable capacitance, implemented by a transistor and by adjusting dimensions and gate-source biasing. Each PN in the coupler is configured as a fifth-order low-pass filter, designed by transfer matrix analysis. A systematic design procedure based on this analysis is introduced, illustrating the combination of staggering technique, lumped-element compensation, and multisection impedance transformation to provide low output phase error and improved directivity. Measurements conducted on fabricated chips in GaAs technology for the 180° (45°) coupler within the frequency range of 10–20 GHz reveal an output phase of 180° ± 1.5° (45° ± 1°), return loss better than 15 dB (15 dB), directivity greater than 30 dB (35 dB), and a coupling gain at the center frequency equal to 6 dB (5.2 dB). Continuously tunable output phase couplers for the phase ranges of 40°–90° and 180°–135° are achieved, based on the proposed universal structure, for each 2 GHz bandwidth in 12–14 GHz band. Within this frequency range, impedance matching around –10 dB and phase error of ± 1° are obtained. Comparable performance is observed in each 1 GHz sub-band within the 14–20 GHz range. Additionally, simulation of the above couplers in 180 nm CMOS technology domonstrates similar performance.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"2025 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2025-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cds2/5566516","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145824855","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2025-12-18

引用次数: 0

Position Calibration and Pixel Correction for Uneven Brightness Micro LED Display 亮度不均匀微型LED显示屏的位置标定与像素校正

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2025-12-16 DOI: 10.1049/cds2/4243080

Shih-Chang Hsia, Szu-Hong Wang, Ning-Hsiang Yang

{"title":"Position Calibration and Pixel Correction for Uneven Brightness Micro LED Display","authors":"Shih-Chang Hsia, Szu-Hong Wang, Ning-Hsiang Yang","doi":"10.1049/cds2/4243080","DOIUrl":"10.1049/cds2/4243080","url":null,"abstract":"Due to process deviations (Devs) in Micro LEDs, the luminous efficiency of each individual Micro LED can differ. Consequently, this leads to uneven luminance across the Micro LED matrix panel. In this study, a correction algorithm is proposed with the aim of improving luminance inhomogeneity on the panel. The brightness value of each pixel point on the LED panel is measured using a camera. Since the panel’s position may shift during detection, our approach incorporates self-detection and position correction to handle such misalignments. This eliminates the need for manually aligning the LED module to a fixed position on mechanical fixtures in our calibration system. The embedded system uses a camera to detect panel brightness and then generates correction coefficients for individual LED. Afterward, the coefficients are loaded into the FPGA control board and stored in memory as a Look-Up Table (LUT). Pixel correction on the Micro LED panel is achieved by selecting the corresponding coefficient from the LUT for each pixel position. The same procedures are iteratively performed ~3–4 times, using recursive processing to achieve superior uniformity across the Micro LED panel.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"2025 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2025-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cds2/4243080","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145845752","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2025-12-16

引用次数: 0