Iet Circuits Devices & Systems最新文献_第5页

An FSM-Enabled Reconfigurable Debugging Approach for Area-Optimized FIR Filters on FPGA Platforms FPGA平台上区域优化FIR滤波器的fsm可重构调试方法

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2026-02-17 DOI: 10.1049/cds2/5545245

Murali Anumothu, G. M. Anitha Priyadarshini, Ch. Hima Bindu, Rajanikanth Aluvalu, Sai Prashanth Mallellu, Pankaj Kumar, Ghanshyam G. Tejani, Seyed Jalaleddin Mousavirad

{"title":"An FSM-Enabled Reconfigurable Debugging Approach for Area-Optimized FIR Filters on FPGA Platforms","authors":"Murali Anumothu, G. M. Anitha Priyadarshini, Ch. Hima Bindu, Rajanikanth Aluvalu, Sai Prashanth Mallellu, Pankaj Kumar, Ghanshyam G. Tejani, Seyed Jalaleddin Mousavirad","doi":"10.1049/cds2/5545245","DOIUrl":"https://doi.org/10.1049/cds2/5545245","url":null,"abstract":"This work introduces a novel method to improve hardware debugging efficiency and decrease computing time by employing a finite state machine (FSM)-based reconfigurable buffer insertion strategy for optimizing field-programmable gate array (FPGA) performance. The proposed strategy greatly enhances the debugging process by offering a systematic approach for error discovery, so ensuring that the FPGA functions with diminished complexity and increased dependability. Additionally, a reconfigurable decision tree generation (DTG)-finite impulse response (FIR) filter design is shown to optimize circuit area, resulting in a decrease in the quantity of stored memory look-up tables (LUTs). The substantial enhancement in power efficiency and area attained by using 4 LUTs in place of 6 LUTs. This work executes and verifies the register-transfer level (RTL) functionality by operating with 16 taps. This idea depends on the usage of an FSM controller for the utilization of a common buffer. This buffer eliminates the usage of 16 distinct buffers by sharing all 16 taps in order to identify errors. With this approach, the simplified design and overall efficiency are improved. This approach achieves improved debug capabilities with a single common buffer by eliminating usage of multiple buffers. The hardware complexity of the circuit is decreased substantially by using this proposed model. This model proves that the suggested FSM-based buffer insertion and reconfigurable FIR filter design improve computational efficiency and FPGA area optimization, positioning it as a viable alternative for forthcoming FPGA-based designs.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"2026 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2026-02-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cds2/5545245","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147315457","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2026-02-17

引用次数: 0

An FSM-Enabled Reconfigurable Debugging Approach for Area-Optimized FIR Filters on FPGA Platforms FPGA平台上区域优化FIR滤波器的fsm可重构调试方法

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2026-02-17 DOI: 10.1049/cds2/5545245

Murali Anumothu, G. M. Anitha Priyadarshini, Ch. Hima Bindu, Rajanikanth Aluvalu, Sai Prashanth Mallellu, Pankaj Kumar, Ghanshyam G. Tejani, Seyed Jalaleddin Mousavirad

{"title":"An FSM-Enabled Reconfigurable Debugging Approach for Area-Optimized FIR Filters on FPGA Platforms","authors":"Murali Anumothu, G. M. Anitha Priyadarshini, Ch. Hima Bindu, Rajanikanth Aluvalu, Sai Prashanth Mallellu, Pankaj Kumar, Ghanshyam G. Tejani, Seyed Jalaleddin Mousavirad","doi":"10.1049/cds2/5545245","DOIUrl":"10.1049/cds2/5545245","url":null,"abstract":"This work introduces a novel method to improve hardware debugging efficiency and decrease computing time by employing a finite state machine (FSM)-based reconfigurable buffer insertion strategy for optimizing field-programmable gate array (FPGA) performance. The proposed strategy greatly enhances the debugging process by offering a systematic approach for error discovery, so ensuring that the FPGA functions with diminished complexity and increased dependability. Additionally, a reconfigurable decision tree generation (DTG)-finite impulse response (FIR) filter design is shown to optimize circuit area, resulting in a decrease in the quantity of stored memory look-up tables (LUTs). The substantial enhancement in power efficiency and area attained by using 4 LUTs in place of 6 LUTs. This work executes and verifies the register-transfer level (RTL) functionality by operating with 16 taps. This idea depends on the usage of an FSM controller for the utilization of a common buffer. This buffer eliminates the usage of 16 distinct buffers by sharing all 16 taps in order to identify errors. With this approach, the simplified design and overall efficiency are improved. This approach achieves improved debug capabilities with a single common buffer by eliminating usage of multiple buffers. The hardware complexity of the circuit is decreased substantially by using this proposed model. This model proves that the suggested FSM-based buffer insertion and reconfigurable FIR filter design improve computational efficiency and FPGA area optimization, positioning it as a viable alternative for forthcoming FPGA-based designs.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"2026 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2026-02-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cds2/5545245","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"147315456","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2026-02-17

引用次数: 0

Smart City Lighting for All Ages: Age-Adaptive Fuzzy Systems for Real-Time Energy Management 适合所有年龄的智慧城市照明：用于实时能源管理的年龄自适应模糊系统

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2026-02-07 DOI: 10.1049/cds2/9991771

Mohammad Javad Kalani, Mahdi Kalani

{"title":"Smart City Lighting for All Ages: Age-Adaptive Fuzzy Systems for Real-Time Energy Management","authors":"Mohammad Javad Kalani, Mahdi Kalani","doi":"10.1049/cds2/9991771","DOIUrl":"https://doi.org/10.1049/cds2/9991771","url":null,"abstract":"Taking advantage of cutting-edge technologies to efficiently control energy consumption while prioritizing public well-being is a wise choice for the sustainable development of cities and societies. From this perspective, the proposed approach in this study, which employs real-time electricity pricing, user age, and user preferences as input parameters for a fuzzy inference system (FIS), aims to balance energy consumption along with people’s lighting requirements. FISs based on linguistic patterns are ideal for establishing communication between individuals and artificial intelligence, especially in smart cities. FIS allows complicated parameters to be defined in a flexible framework that is easily understandable to humans. While this study specifically evaluated the performance of the proposed system for lighting demands, it may also be applied to other purposes and requirements. Results from the system simulations for a commercial setting validate the suggested system’s accuracy. According to the findings, developing appropriate control strategies derived from the established method enables meeting users’ lighting requirements for individuals of different ages. At the same time, this method regulates energy consumption and associated costs. The introduced method is advocated as an innovative solution for developing smarter and more sustainable cities and societies.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"2026 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2026-02-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cds2/9991771","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146256310","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2026-02-07

引用次数: 0

Smart City Lighting for All Ages: Age-Adaptive Fuzzy Systems for Real-Time Energy Management 适合所有年龄的智慧城市照明：用于实时能源管理的年龄自适应模糊系统

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2026-02-07 DOI: 10.1049/cds2/9991771

Mohammad Javad Kalani, Mahdi Kalani

{"title":"Smart City Lighting for All Ages: Age-Adaptive Fuzzy Systems for Real-Time Energy Management","authors":"Mohammad Javad Kalani, Mahdi Kalani","doi":"10.1049/cds2/9991771","DOIUrl":"10.1049/cds2/9991771","url":null,"abstract":"Taking advantage of cutting-edge technologies to efficiently control energy consumption while prioritizing public well-being is a wise choice for the sustainable development of cities and societies. From this perspective, the proposed approach in this study, which employs real-time electricity pricing, user age, and user preferences as input parameters for a fuzzy inference system (FIS), aims to balance energy consumption along with people’s lighting requirements. FISs based on linguistic patterns are ideal for establishing communication between individuals and artificial intelligence, especially in smart cities. FIS allows complicated parameters to be defined in a flexible framework that is easily understandable to humans. While this study specifically evaluated the performance of the proposed system for lighting demands, it may also be applied to other purposes and requirements. Results from the system simulations for a commercial setting validate the suggested system’s accuracy. According to the findings, developing appropriate control strategies derived from the established method enables meeting users’ lighting requirements for individuals of different ages. At the same time, this method regulates energy consumption and associated costs. The introduced method is advocated as an innovative solution for developing smarter and more sustainable cities and societies.","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"2026 1","pages":""},"PeriodicalIF":1.2,"publicationDate":"2026-02-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cds2/9991771","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146256309","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2026-02-07

引用次数: 0

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2026-01-31

引用次数: 0

IF 1.2 4区工程技术

Iet Circuits Devices & Systems Pub Date : 2026-01-31

引用次数: 0