基于表面声波的纱线张力传感器带内波纹的求解和带外抑制方法

IF 1 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC
Yang Feng, Jun Li, Ru Bai, Zhenghong Qian
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引用次数: 2

摘要

提出了SAW纱线张力传感器设计中存在的带内波纹和带外波纹抑制两个关键问题,并给出了减小带内波纹和带外波纹的方法。设计了不平衡分裂电极数字间换能器(IDT),使再生反射波和质量负载反馈的总相位接近180°,从而有效地降低了以传感器频率响应为特征的带内波纹效应。基板背面刻蚀的双向槽可以在一定程度上阻挡体声波(BAW)的传播路径,降低了BAW传播的影响,抑制了频率响应的带外抑制。实验结果表明,采用非平衡分裂电极IDT的SAW纱线张力传感器可以将带内波纹从23.34减小到0.93 dB,双向刻痕槽可以抑制带外波纹从28.03减小到7.71 dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。

Methods of solving in-band ripples and out-of-band suppression for yarn tension sensor based on surface acoustic wave

Methods of solving in-band ripples and out-of-band suppression for yarn tension sensor based on surface acoustic wave

The two key problems of the in-band ripples and out-of-band suppression are proposed in the design of the SAW yarn tension sensor and the methods of decreasing them are achieved. The unbalanced split-electrode interdigital transducers (IDT) are designed so that the total phase of the regenerated reflection wave and mass load feedback is close to 180°, leading to an effective reduction of the in-band ripples effect characterised by the sensor frequency response. The engraved bi-directional slots on the back of the substrate can block the propagation path of the bulk acoustic wave (BAW) to a certain extent, reducing the influence of BAW propagation and suppressing the out-of-band suppression of the frequency response. The experimental results show that the SAW yarn tension sensor with the unbalanced split-electrode IDT can reduce the in-band ripples from 23.34 to 0.93 dB, and the engraved bi-directional slots can suppress the out-of-band suppression from 28.03 to 7.71 dB.

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来源期刊
Iet Circuits Devices & Systems
Iet Circuits Devices & Systems 工程技术-工程:电子与电气
CiteScore
3.80
自引率
7.70%
发文量
32
审稿时长
3 months
期刊介绍: IET Circuits, Devices & Systems covers the following topics: Circuit theory and design, circuit analysis and simulation, computer aided design Filters (analogue and switched capacitor) Circuit implementations, cells and architectures for integration including VLSI Testability, fault tolerant design, minimisation of circuits and CAD for VLSI Novel or improved electronic devices for both traditional and emerging technologies including nanoelectronics and MEMs Device and process characterisation, device parameter extraction schemes Mathematics of circuits and systems theory Test and measurement techniques involving electronic circuits, circuits for industrial applications, sensors and transducers
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