IEEE Transactions on Semiconductor Manufacturing最新文献

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Geometry-Based Curvilinear Mask Process Correction for Enhanced Pattern Fidelity, Contrast, and Manufacturability
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2024-12-23 DOI: 10.1109/TSM.2024.3521368
Chun-Hung Liu;Ze-An Ding
{"title":"Geometry-Based Curvilinear Mask Process Correction for Enhanced Pattern Fidelity, Contrast, and Manufacturability","authors":"Chun-Hung Liu;Ze-An Ding","doi":"10.1109/TSM.2024.3521368","DOIUrl":"https://doi.org/10.1109/TSM.2024.3521368","url":null,"abstract":"Curvilinear (CL) mask patterns, essential for extreme ultraviolet lithography in advanced semiconductor manufacturing, suffer from degraded fidelity and contrast due to complex pattern environments and severe proximity effects, necessitating CL mask process correction (CL-MPC). However, conventional shape-based CL-MPC methods cannot enhance image contrast because of their inability to adjust dose levels, while dose-based methods require extensive computational time and are incompatible with electron beam writers lacking dose adjustment capabilities. Therefore, this study proposes a two-layer geometry-based CL-MPC method integrating pattern fidelity and image contrast co-optimization with pattern manufacturability enhancement. It employs two overlapping patterns, each of which adjusts the geometry without modifying the dose. A skeleton-based approach creates CL pattern fragments, and dual proportional-integral–derivative controllers improve the pattern fidelity more effectively by classifying the energy slope of target points. For image contrast improvement, a feedback mechanism replaces unsatisfactory parameters with optimized values by minimizing the reciprocal of the energy slope of target points. The pattern manufacturability enhancement further improves mask fabrication by smoothing edge corners and optimizing pattern angles. The proposed method significantly improves pattern fidelity, image contrast, correction runtime efficiency, and manufacturability, making corrected patterns compatible with all electron-beam writers and presenting a promising solution for CL-MPC limitations.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 1","pages":"36-47"},"PeriodicalIF":2.3,"publicationDate":"2024-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143489097","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Comprehensive Study of the Impact of LWR on Device Performance in VLSI Technology
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2024-12-09 DOI: 10.1109/TSM.2024.3511918
Yaoting Wang;Yongyu Wu;Dawei Gao;Kai Xu
{"title":"Comprehensive Study of the Impact of LWR on Device Performance in VLSI Technology","authors":"Yaoting Wang;Yongyu Wu;Dawei Gao;Kai Xu","doi":"10.1109/TSM.2024.3511918","DOIUrl":"https://doi.org/10.1109/TSM.2024.3511918","url":null,"abstract":"Line Width Roughness (LWR) has emerged as a pivotal challenge that the semiconductor manufacturing industry must confront. This study provides experimental data to elucidate the mechanism by which LWR affects device performance in different processing layers. First, Hard Mask (HM) technology was used to reduce LWR of Active Area (AA) and polysilicon gate by 0.97 nm and 0.62 nm, respectively, resulting in a 21.79% and 55.82% decrease in threshold voltage variability. With the application of HM technology in AA layer processing, the device performance of NMOS and PMOS was also improved by 19.58% and 12.54%, respectively. This improvement can be attributed to the mitigation of carrier scattering induced by LWR. Moreover, HM technology was also conducted in polysilicon gate process which can reduce LWR effectively, thereby enhancing device stability, decreasing the drain-induced barrier lowering factor by approximately 10%, and suppressing gate-induced drain leakage current and overlap capacitance. Consequently, this process contributes to the alleviation of short channel effects. Our research provides experimental groundwork for diminishing LWR, supplies guidelines for understanding the distinct mechanisms of LWR, and offers effective route toward enhancing device performance, and controlling fluctuations.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 1","pages":"12-18"},"PeriodicalIF":2.3,"publicationDate":"2024-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143489050","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Defect Detection of Photovoltaic Panels to Suppress Endogenous Shift Phenomenon
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2024-12-02 DOI: 10.1109/TSM.2024.3510358
Haiyong Chen;Yaxiu Zhang;Yan Zhang;Xingwei Yan;Xin Zhang;Kunlin Zou
{"title":"Defect Detection of Photovoltaic Panels to Suppress Endogenous Shift Phenomenon","authors":"Haiyong Chen;Yaxiu Zhang;Yan Zhang;Xingwei Yan;Xin Zhang;Kunlin Zou","doi":"10.1109/TSM.2024.3510358","DOIUrl":"https://doi.org/10.1109/TSM.2024.3510358","url":null,"abstract":"Efficient and intelligent surface defect detection of photovoltaic modules is crucial for improving the quality of photovoltaic modules and ensuring the reliable operation of large-scale infrastructure. However, the scenario characteristics of data distribution deviation make the construction of defect detection models for open world scenarios such as photovoltaic manufacturing and power plant inspections a challenge. Therefore, we propose the Gather and Distribute Domain shift Suppression Network. It adopts a single domain generalized method that is completely independent of the test samples to address the problem of distribution shift. Using a one-stage network as the baseline network breaks through the limitations of traditional domain generalization methods that typically use two-stage networks. It not only balances detection accuracy and speed but also simplifies the model deployment and application process. The network first employs the DeepSpine module to capture a wider range of contextual information. By concatenating and aligning multi-scale channel features, it effectively suppresses background style shifts. Building upon this, the Gather and Distribute Module performs cross layer interactive learning on multi-scale channel features. The multi-level features and semantic dependencies learned enhance the localization and recognition ability of target defects, thereby achieving the suppression of defect instance shift. Furthermore, we utilizes normalized Wasserstein distance for similarity measurement, reducing measurement errors caused by bounding box position deviations. We conducted a comprehensive evaluation of our network on the Electroluminescence Endogenous Shift Dataset and Photovoltaic Inspection Infrared Dataset. In scenarios with three production lines and four heights on two datasets, the detection accuracy of GDDS reached 91.2%, 82.3%, 79.9%, and 92.8%, 82.7%, 77.2%, and 69.2%, respectively. The experimental results showed that our method can adapt to defect detection in open world scenarios faster and better than other state-of-the-art methods.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 1","pages":"83-95"},"PeriodicalIF":2.3,"publicationDate":"2024-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143489082","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
HotspotFusion: A Generative AI Approach to Predicting CMP Hotspot in Semiconductor Manufacturing
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2024-12-02 DOI: 10.1109/TSM.2024.3510376
Hsiu-Hui Hsiao;Kung-Jeng Wang
{"title":"HotspotFusion: A Generative AI Approach to Predicting CMP Hotspot in Semiconductor Manufacturing","authors":"Hsiu-Hui Hsiao;Kung-Jeng Wang","doi":"10.1109/TSM.2024.3510376","DOIUrl":"https://doi.org/10.1109/TSM.2024.3510376","url":null,"abstract":"The semiconductor industry thrives on rapid technological advancements, crucial for superior product performance and cost efficiency. Chip design houses and consumer electronics companies must continuously pursue New Tape Out (NTO) to maintain technological leadership. Timely NTO completion expedites product launches, crucial in the competitive semiconductor market. This paper addresses Chemical Mechanical Polishing (CMP) hotspot, critical in NTO quality and cycle time, affecting wafer surface topology. Hotspot defects can degrade wafer performance, demanding swift detection and resolution. Traditional methods can only identify CMP hotspot after manufacturing, necessitating repeated adjustments to IC design. We propose HotspotFusion, leveraging pattern density data from Graphic Design System (GDS) to predict CMP hotspot early in the design phase. Utilizing a generative AI model, HotspotFusion significantly reduces NTO cycle time by enabling proactive hotspot detection and process optimization, fostering efficiency and competitiveness in semiconductor manufacturing.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 1","pages":"73-82"},"PeriodicalIF":2.3,"publicationDate":"2024-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143489220","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
2024 Index IEEE Transactions on Semiconductor Manufacturing Vol. 37 2024 Index IEEE Transactions on Semiconductor Manufacturing Vol.
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2024-11-26 DOI: 10.1109/TSM.2024.3506312
{"title":"2024 Index IEEE Transactions on Semiconductor Manufacturing Vol. 37","authors":"","doi":"10.1109/TSM.2024.3506312","DOIUrl":"https://doi.org/10.1109/TSM.2024.3506312","url":null,"abstract":"","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"37 4","pages":"649-667"},"PeriodicalIF":2.3,"publicationDate":"2024-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10768858","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142713825","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Call for Nominations for Editor-in-Chief: IEEE Transactions on Semiconductor Manufacturing 征集主编提名:IEEE 半导体制造学报
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2024-11-22 DOI: 10.1109/TSM.2024.3490742
{"title":"Call for Nominations for Editor-in-Chief: IEEE Transactions on Semiconductor Manufacturing","authors":"","doi":"10.1109/TSM.2024.3490742","DOIUrl":"https://doi.org/10.1109/TSM.2024.3490742","url":null,"abstract":"","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"37 4","pages":"647-647"},"PeriodicalIF":2.3,"publicationDate":"2024-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10766045","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142694657","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Special Section Call for Papers: Bridging the Data Gap in Photovoltaics with Synthetic Data Generation 特别章节征稿:通过合成数据生成弥补光伏领域的数据差距
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2024-11-22 DOI: 10.1109/TSM.2024.3455875
{"title":"Special Section Call for Papers: Bridging the Data Gap in Photovoltaics with Synthetic Data Generation","authors":"","doi":"10.1109/TSM.2024.3455875","DOIUrl":"https://doi.org/10.1109/TSM.2024.3455875","url":null,"abstract":"","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"37 4","pages":"645-646"},"PeriodicalIF":2.3,"publicationDate":"2024-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10765976","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142694678","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Call for Papers: Special Issue on Intelligent Sensor Systems for the IEEE Journal of Electron Devices 征稿:电气和电子工程师学会电子器件学报》智能传感器系统特刊
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2024-11-22 DOI: 10.1109/TSM.2024.3455873
{"title":"Call for Papers: Special Issue on Intelligent Sensor Systems for the IEEE Journal of Electron Devices","authors":"","doi":"10.1109/TSM.2024.3455873","DOIUrl":"https://doi.org/10.1109/TSM.2024.3455873","url":null,"abstract":"","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"37 4","pages":"643-644"},"PeriodicalIF":2.3,"publicationDate":"2024-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10766043","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142694680","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Guest Editorial Special Section on Sustainability 可持续发展特刊特约编辑
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2024-11-22 DOI: 10.1109/TSM.2024.3485049
Oliver D. Patterson;Tomasz Brozek;Kaushik Balamukundhan;David M. Fried;Bill Nehrer;Suresh Ramarajan
{"title":"Guest Editorial Special Section on Sustainability","authors":"Oliver D. Patterson;Tomasz Brozek;Kaushik Balamukundhan;David M. Fried;Bill Nehrer;Suresh Ramarajan","doi":"10.1109/TSM.2024.3485049","DOIUrl":"https://doi.org/10.1109/TSM.2024.3485049","url":null,"abstract":"","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"37 4","pages":"418-421"},"PeriodicalIF":2.3,"publicationDate":"2024-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10766050","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142691709","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
IEEE Transactions on Semiconductor Manufacturing Information for Authors IEEE Transactions on Semiconductor Manufacturing 为作者提供的信息
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2024-11-22 DOI: 10.1109/TSM.2024.3455877
{"title":"IEEE Transactions on Semiconductor Manufacturing Information for Authors","authors":"","doi":"10.1109/TSM.2024.3455877","DOIUrl":"https://doi.org/10.1109/TSM.2024.3455877","url":null,"abstract":"","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"37 4","pages":"C3-C3"},"PeriodicalIF":2.3,"publicationDate":"2024-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10765978","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142694662","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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