IEEE Transactions on Semiconductor Manufacturing最新文献

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BDSD-Net: An Efficient and High-Precision Anomaly Detector for Real-Time Semiconductor Wafer Vision Inspection BDSD-Net:用于半导体晶圆视觉实时检测的高效高精度异常检测器
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-07-03 DOI: 10.1109/TSM.2025.3585570
Shuang Mei;Zhaolei Diao;Xingyue Liu;Guojun Wen
{"title":"BDSD-Net: An Efficient and High-Precision Anomaly Detector for Real-Time Semiconductor Wafer Vision Inspection","authors":"Shuang Mei;Zhaolei Diao;Xingyue Liu;Guojun Wen","doi":"10.1109/TSM.2025.3585570","DOIUrl":"https://doi.org/10.1109/TSM.2025.3585570","url":null,"abstract":"The advancement of integrated circuit fabrication processes has resulted in a concomitant increase in the complexity and frequency of surface defects on semiconductor wafers. This underscores the necessity for precise, real-time quality monitoring and control to enhance yield, cost-efficiency, and performance. Traditional automatic optical inspection (AOI) methods based on die-to-golden sample, die-to-die, or general deep learning-based semantic segmentation models often fail to meet these requirements due to insufficient detection accuracy, high false alarm rates, or inadequate throughput. To address these challenges, this paper proposes BDSD-Net, an efficient real-time detector that achieves state-of-the-art (SoTA) performance in wafer surface defect detection. Initially, a novel lightweight MVHNet backbone is developed, which seamlessly integrates the synergistic strengths of convolutional neural networks (CNNs) and Transformers within a ResNet-inspired architecture. Subsequently, an adaptive hybrid encoder is engineered to reduce the interference caused by intricate background patterns, thereby enhancing the accuracy of defect segmentation. This encoder includes an adaptive intra-scale feature interaction (ADFI) module that extracts more detailed high-level semantic information, and an adaptive multi-scale feature fusion (AMFF) module that effectively merges defect features across various scales. Moving away from high-complexity encoder structures, an efficient multi-scale residual fusion (EMRF) module is developed to narrow down the hypothesis space, thereby accelerating convergence. Finally, a knowledge distillation training strategy is also implemented to equip the lightweight model with the learning capabilities of more complex network models, thus enhancing its mean average precision (mAP) and frames per second (FPS) in inspection tasks. Extensive experimental results demonstrate the effectiveness of our method with data volume robustness, which achieves 88.2% and 88.9% mAP@0.5 on the semiconductor wafer and chip datasets. Moreover, compared to SoTA methods, our framework shows superior performance, achieving a compact model size of only 27 MB and a detection speed of 108.4 FPS. The demo code of this work is publicly available at <uri>https://github.com/Adiao2001/BDSD-Net/</uri>.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"675-686"},"PeriodicalIF":2.3,"publicationDate":"2025-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887650","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Evaluation of Thick Silicon Nitride Film Properties at 300 mm Scale for High-Q Photonic Devices 高q光子器件中厚氮化硅薄膜在300 mm尺度下的性能评价
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-06-27 DOI: 10.1109/TSM.2025.3583925
Soumen Kar;Nicholas W. Gangi;Katrina A. Morgan;Lewis G. Carpenter;Nicholas M. Fahrenkopf;Yukta Timalsina;Christopher V. Baiocco;David Harame
{"title":"Evaluation of Thick Silicon Nitride Film Properties at 300 mm Scale for High-Q Photonic Devices","authors":"Soumen Kar;Nicholas W. Gangi;Katrina A. Morgan;Lewis G. Carpenter;Nicholas M. Fahrenkopf;Yukta Timalsina;Christopher V. Baiocco;David Harame","doi":"10.1109/TSM.2025.3583925","DOIUrl":"https://doi.org/10.1109/TSM.2025.3583925","url":null,"abstract":"This work evaluates thick silicon nitride (SiN) film properties using various inline and offline advanced metrology data analysis. The thick SiN films for photonic applications are typically prepared by plasma-enhanced chemical vapor deposition (PECVD) and low-pressure chemical vapor deposition (LPCVD) techniques. Our present study combines high-volume inline and high-accuracy offline metrology to best characterize our thick SiN films. The developed SiN film compositional analysis has been carried out using inline X-ray photoelectron spectroscopy (XPS) to get fast feedback on the composition and contamination of the film surface. Finally, we present a refractive index (n) comparison for annealed and unannealed PECVD/LPCVD wafers.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"420-427"},"PeriodicalIF":2.3,"publicationDate":"2025-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887878","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Process-Aware Digital Twins by Deep Learning for DUV Photolithography and Plasma Etch 基于深度学习的DUV光刻和等离子蚀刻工艺感知数字孪生
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-06-23 DOI: 10.1109/TSM.2025.3582194
Christina L. Lau;Shuhan Ding;Yutong Xie;Edwin R. Law;Bahar Kor;Benyamin Davaji;Amit Lal;Peter C. Doerschuk
{"title":"Process-Aware Digital Twins by Deep Learning for DUV Photolithography and Plasma Etch","authors":"Christina L. Lau;Shuhan Ding;Yutong Xie;Edwin R. Law;Bahar Kor;Benyamin Davaji;Amit Lal;Peter C. Doerschuk","doi":"10.1109/TSM.2025.3582194","DOIUrl":"https://doi.org/10.1109/TSM.2025.3582194","url":null,"abstract":"Computer representations of the structure, context, and behavior of physical systems are critical components of computational system optimization. Traditionally, such optimization is done by iterative physical experiments, which can be expensive both in time and resources. In this paper, these computer representations, called digital twins, are developed primarily using SEM images and equipment process parameters. HyperPix2Pix, the proposed methodology of the digital twins, is a deep neural network that uses SEM images of the input structure together with equipment process parameters to predict the output SEM images. We demonstrate HyperPix2Pix on a DUV photolithography stepper and plasma etcher. HyperPix2Pix predicts output images that closely match the experimental output images and have very similar critical dimensions. Compared to previous work, HyperPix2Pix includes the effects of process parameters through multimodal learning, elucidating the role of different parameters in nanofabrication processes and their effects on critical dimensions of the resulting structures.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"634-641"},"PeriodicalIF":2.3,"publicationDate":"2025-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887766","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Automated Construction of Semi-Physical CMP Models via Embedded Neural Networks 基于嵌入式神经网络的半物理CMP模型自动构建
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-06-23 DOI: 10.1109/TSM.2025.3581909
Qian Yue;Chen Lan
{"title":"Automated Construction of Semi-Physical CMP Models via Embedded Neural Networks","authors":"Qian Yue;Chen Lan","doi":"10.1109/TSM.2025.3581909","DOIUrl":"https://doi.org/10.1109/TSM.2025.3581909","url":null,"abstract":"The planarization of chip surfaces after chemical mechanical planarization (CMP) is becoming increasingly crucial as it can lead to problems such as depth of focus (DOF), voltage drop (IR drop), timing closure and electromigration (EM) problems. To enhance production yield, the industry requires an accurate CMP model to detect, localize, and control topography nonuniformity caused by layout dependent effects (LDE) prior to fabrication. However, existing semi-physical models heavily rely on manually specified empirical relationships during the calibration process, limiting their ability to meet the demands of advanced process nodes in terms of automated model construction and prediction accuracy. To address this limitation, we propose to construct empirical relationships in semi-physical models using embedded neural networks. Building upon this concept, we have developed a deep-learning-assisted semi-physical CMP model that eliminates the need for manual specification of empirical relationships. Experimentation conducted on silicon data from test chips across the process nodes of 28/32/40 nm highlights the advantages of our model, including rapid training (requiring fewer than 400 epochs), automated deployment and competitive prediction accuracy compared to data-driven models (RMSE reduction for dishing (18%/79%/55%) and erosion (25%/58%/61%) over traditional semi-physical models).","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"533-542"},"PeriodicalIF":2.3,"publicationDate":"2025-06-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887880","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The Modeling of Post-Annealing and Etching Processes of ALD SiO₂ Using Intermediate Variables Considering Digital Twin Model Reusability 考虑数字孪生模型可重用性的ALD sio2后退火和蚀刻过程中间变量建模
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-06-13 DOI: 10.1109/TSM.2025.3579474
Ryosuke Okachi;Masanori Usui;Tomohiko Mori;Junya Muramatsu;Makoto Kuwahara;Daigo Kikuta
{"title":"The Modeling of Post-Annealing and Etching Processes of ALD SiO₂ Using Intermediate Variables Considering Digital Twin Model Reusability","authors":"Ryosuke Okachi;Masanori Usui;Tomohiko Mori;Junya Muramatsu;Makoto Kuwahara;Daigo Kikuta","doi":"10.1109/TSM.2025.3579474","DOIUrl":"https://doi.org/10.1109/TSM.2025.3579474","url":null,"abstract":"In this study, we examined a digital twin model that has multiple processes. Generally, previous processes affect subsequent processes in the semiconductor manufacturing process. Therefore, to construct reusable modular models, the mutual influences between processes should be defined and concisely represented. We built a digital twin model involving the post-annealing and wet etching of an oxide film formed by atomic layer deposition (ALD), as a case study. We developed a modular model that separated processes based on intermediate variables extracted through physical analysis. The high coefficient of determination obtained from the prediction results suggests that these intermediate variables sufficiently captured the effect of the preceding processes. Further, we explored concepts for improving model reusability using class structure analysis within an object-oriented programming (OOP) framework. We observed the need for encapsulating physics-based intermediate variables within appropriate classes to separate process- and device-specific descriptions. The encapsulated intermediate variables indirectly represented process influence and enabled the modularization of class-internal models. These findings help in reducing dependencies between models, thereby contributing to improved model reusability.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"487-491"},"PeriodicalIF":2.3,"publicationDate":"2025-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887714","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Process Sensitivity of 355 nm-Laser-Induced High-Concentration Aluminum Doping for P-Type Layer in Semi-Insulating 4H-SiC 355 nm激光诱导高浓度铝掺杂半绝缘4H-SiC p型层的工艺灵敏度
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-06-09 DOI: 10.1109/TSM.2025.3577624
Chang-Shan Shen;Wei-Chi Aeneas Hsu;Ming-Chun Hsu;Hong-Yi Guo;Yu-Xian Liu;Hua-Yan Chen;Guan-Jie Liu;Duong Minh Hoang;Tsun-Hsu Chang
{"title":"Process Sensitivity of 355 nm-Laser-Induced High-Concentration Aluminum Doping for P-Type Layer in Semi-Insulating 4H-SiC","authors":"Chang-Shan Shen;Wei-Chi Aeneas Hsu;Ming-Chun Hsu;Hong-Yi Guo;Yu-Xian Liu;Hua-Yan Chen;Guan-Jie Liu;Duong Minh Hoang;Tsun-Hsu Chang","doi":"10.1109/TSM.2025.3577624","DOIUrl":"https://doi.org/10.1109/TSM.2025.3577624","url":null,"abstract":"The advancement of high-power 4H-SiC devices demands innovative solutions to address doping challenges. This study introduces a 355 nm DPSS Nd:YAG laser scanning doping as a method for aluminum doping and surface modification in semi-insulating 4H-SiC, addressing the limitations of conventional ion-implantation techniques. Through a systematic investigation of laser fluence, we identify process windows that balance carrier activation and material properties. At a fluence threshold of 2.588 J/cm2, effective Al activation was achieved, while higher fluences induce polysilicon formation, as verified by Raman, GIXRD, SIMS, and Hall measurements. Remarkably, laser processing generates a multilayer surface structure—graphite, polysilicon, poly-SiC, and 4H-SiC—potentially reducing the barrier height. This method demonstrates significant potential for fabricating high-performance p-type contacts on 4H-SiC. These findings highlight the sensitivity and versatility of laser doping, offering critical insights into next-generation SiC fabrication strategies.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"728-733"},"PeriodicalIF":2.3,"publicationDate":"2025-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887642","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Ar/N₂ Gas Flow Rate Dependence on the Ferroelectric HfNₓ Thin Film Formation by ECR-Plasma Sputtering Ar/ n2气体流速对铁电HfNₓecr -等离子溅射薄膜形成的影响
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-06-02 DOI: 10.1109/TSM.2025.3575588
Kangbai Li;Shun-Ichiro Ohmi
{"title":"Ar/N₂ Gas Flow Rate Dependence on the Ferroelectric HfNₓ Thin Film Formation by ECR-Plasma Sputtering","authors":"Kangbai Li;Shun-Ichiro Ohmi","doi":"10.1109/TSM.2025.3575588","DOIUrl":"https://doi.org/10.1109/TSM.2025.3575588","url":null,"abstract":"In this paper, the Ar/N2 gas flow rate dependence on the ferroelectric HfNx (x>1) formed by electron cyclotron resonance (ECR)-plasma sputtering was investigated. The equivalent oxide thickness (EOT) of 2.7 nm was obtained with Ar/N2 gas flow rate of 8/7 sccm followed by the 400°C/5 min post metallization annealing (PMA) in N2. The EOT was increased to 4.2 nm with the deposition of the Ar/N2 gas flow rate of 14/16 sccm. The density of interface states (Dit) was found to be as low as <inline-formula> <tex-math>$2.0times 10{^{{11}}}$ </tex-math></inline-formula> <inline-formula> <tex-math>${mathrm {cm}}^{-2}$ </tex-math></inline-formula><inline-formula> <tex-math>${mathrm {eV}}^{-1}$ </tex-math></inline-formula>. The P-V results demonstrate that a remanent polarization (2Pr) of <inline-formula> <tex-math>$6.6~mu $ </tex-math></inline-formula>C/cm2, and positive-up negative-down measurement showed the switching polarization of <inline-formula> <tex-math>$4.7~mu $ </tex-math></inline-formula>C/cm2 at an Ar/N2 flow rate of 8/7 sccm, which is high enough for metal-ferroelectric-Si field-effect transistor (MFSFET) application.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"459-462"},"PeriodicalIF":2.3,"publicationDate":"2025-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887656","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
MXenes as a Tool to Control p-Type Conductivity in ZnO Thin Film MXenes作为控制ZnO薄膜p型电导率的工具
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-06-02 DOI: 10.1109/TSM.2025.3575857
Lucky Agarwal;Ajay Kumar Dwivedi;Tulika Bajpai;Uvanesh Kasiviswanathan;Shweta Tripathi
{"title":"MXenes as a Tool to Control p-Type Conductivity in ZnO Thin Film","authors":"Lucky Agarwal;Ajay Kumar Dwivedi;Tulika Bajpai;Uvanesh Kasiviswanathan;Shweta Tripathi","doi":"10.1109/TSM.2025.3575857","DOIUrl":"https://doi.org/10.1109/TSM.2025.3575857","url":null,"abstract":"This study demonstrates the selective tuning of p-type and n-type conductivity in ZnO thin films by incorporating MXenes at varying molar concentrations. ZnO thin films were fabricated using a cost-effective sol-gel method and annealed at 450°C under thermal and magnetically assisted conditions. Rietveld analysis of the hot point probe and Hall measurements were performed to confirm the conductivity variations induced by MXene doping. The results suggest that the conductivity of n-ZnO increased significantly from 0.27 mho/cm to 1274 mho/cm, while p-ZnO conductivity ranged from 0.0012 mho/cm to <inline-formula> <tex-math>$6.2times 10^{-4}$ </tex-math></inline-formula> mho/cm and <inline-formula> <tex-math>$3.3times 10^{-3}$ </tex-math></inline-formula> mho/cm to 0.84 mho/cm under magnetic fields of 280 G and 400 G, respectively. XRD analysis revealed a polycrystalline structure with an average grain size of about ~100 nm. This novel approach offers a versatile method to control ZnO thin-film conductivity, including an extensive analysis of magnetic properties.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"588-595"},"PeriodicalIF":2.3,"publicationDate":"2025-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887717","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Metal Contamination Behavior on Silicon Dioxide Surface Rinsed With Deionized Water Containing Ultra-Trace Metal During Single-Wafer Cleaning 单晶圆清洗过程中含超微量金属的去离子水冲洗二氧化硅表面的金属污染行为
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-06-02 DOI: 10.1109/TSM.2025.3575743
K. Tsutano;T. Mawaki;Y. Shirai;R. Kuroda
{"title":"Metal Contamination Behavior on Silicon Dioxide Surface Rinsed With Deionized Water Containing Ultra-Trace Metal During Single-Wafer Cleaning","authors":"K. Tsutano;T. Mawaki;Y. Shirai;R. Kuroda","doi":"10.1109/TSM.2025.3575743","DOIUrl":"https://doi.org/10.1109/TSM.2025.3575743","url":null,"abstract":"Metal contamination control in semiconductor manufacturing processes is important because it affects device reliability and yield. The metal contamination control value in deionized water (DIW) is required at the pg/L level for advanced device manufacturing. However, previous studies on metallic contamination proved insufficient owing to their utilization of highly concentrated solutions at a <inline-formula> <tex-math>$mu $ </tex-math></inline-formula>g/L level with batch rinsing processes. In this study, we investigated the contamination behavior of metal impurities at the pg/L level in DIW on the silicon dioxide (SiO2) surface during a single-wafer cleaning process. We found that Al, Ti, Fe, Zn, and Ga were highly adsorbed for the <inline-formula> <tex-math>$SiO_{2}$ </tex-math></inline-formula> surface, and these surface concentrations were positively correlated with the concentration in DIW and the rinse time. Whereas the adsorption behavior of these metals affected by rinse fluid parameters such as the rotation speed and the flow rate. The adsorption probability increased owing to thinning of the liquid-firm thickness and increasing radial velocity. Furthermore, the metal adsorption ratio was decreased with thinning boundary-layer thickness. Herein, we provide new insights into the pertinence of reducing metal concentrations in DIW and optimizing fluid parameters during a single-wafer cleaning to prevent metal contamination for advanced the semiconductor manufacturing process.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"492-498"},"PeriodicalIF":2.3,"publicationDate":"2025-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887767","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
DPFEE-Net: Enhancing Wafer Defect Classification Through Dual-Path Neural Architecture DPFEE-Net:通过双路神经网络架构增强晶圆缺陷分类
IF 2.3 3区 工程技术
IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-04-24 DOI: 10.1109/TSM.2025.3564051
Hongxu Li;Jie Ren;Teng Wu;Yonghong Zhang;Jianhua Chang;Hongen Yang;Ronghua Chi
{"title":"DPFEE-Net: Enhancing Wafer Defect Classification Through Dual-Path Neural Architecture","authors":"Hongxu Li;Jie Ren;Teng Wu;Yonghong Zhang;Jianhua Chang;Hongen Yang;Ronghua Chi","doi":"10.1109/TSM.2025.3564051","DOIUrl":"https://doi.org/10.1109/TSM.2025.3564051","url":null,"abstract":"Wafer defect detection and classification are essential for ensuring the quality of semiconductor wafers, optimizing production efficiency. However, existing methods often fail to process shallow and deep feature information concurrently, restricting their capacity to utilize multi-level features for accurate classification. To overcome this limitation, this paper introduces a novel dual-path architecture, DPFEE-Net, which integrates PeleeNet’s dense connection structure and multi-channel feature fusion techniques with the deep feature extraction capabilities of Convolutional Neural Networks (CNNs). By combining these two approaches, DPFEE-Net effectively captures both shallow and deep features, enhancing the detection of critical wafer surface defect patterns. Additionally, squeeze-and-excitation (SE) attention mechanism is incorporated, enabling the model to prioritize defect-prone areas in images, further improving classification accuracy. Experimental results demonstrate that DPFEE-Net achieves a remarkable average accuracy of 96.8% on the WM-811K dataset, surpassing existing methods such as WM-PeleeNet, WDD-SCA and MobileNetV2. Moreover, the model delivers superior detection performance with reduced computational complexity and parameter requirements, making it highly suitable for practical deployment in production environments.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"605-611"},"PeriodicalIF":2.3,"publicationDate":"2025-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144887606","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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