Automated Construction of Semi-Physical CMP Models via Embedded Neural Networks

IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Qian Yue;Chen Lan
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引用次数: 0

Abstract

The planarization of chip surfaces after chemical mechanical planarization (CMP) is becoming increasingly crucial as it can lead to problems such as depth of focus (DOF), voltage drop (IR drop), timing closure and electromigration (EM) problems. To enhance production yield, the industry requires an accurate CMP model to detect, localize, and control topography nonuniformity caused by layout dependent effects (LDE) prior to fabrication. However, existing semi-physical models heavily rely on manually specified empirical relationships during the calibration process, limiting their ability to meet the demands of advanced process nodes in terms of automated model construction and prediction accuracy. To address this limitation, we propose to construct empirical relationships in semi-physical models using embedded neural networks. Building upon this concept, we have developed a deep-learning-assisted semi-physical CMP model that eliminates the need for manual specification of empirical relationships. Experimentation conducted on silicon data from test chips across the process nodes of 28/32/40 nm highlights the advantages of our model, including rapid training (requiring fewer than 400 epochs), automated deployment and competitive prediction accuracy compared to data-driven models (RMSE reduction for dishing (18%/79%/55%) and erosion (25%/58%/61%) over traditional semi-physical models).
基于嵌入式神经网络的半物理CMP模型自动构建
化学机械平面化(CMP)后的芯片表面平面化变得越来越重要,因为它可能导致焦深(DOF)、电压降(IR降)、时序关闭和电迁移(EM)等问题。为了提高产量,业界需要一个精确的CMP模型来检测、定位和控制由布局依赖效应(LDE)引起的地形不均匀性。然而,现有的半物理模型在校准过程中严重依赖于人工指定的经验关系,限制了它们在自动化模型构建和预测精度方面满足高级过程节点需求的能力。为了解决这一限制,我们建议使用嵌入式神经网络在半物理模型中构建经验关系。基于这一概念,我们开发了一种深度学习辅助的半物理CMP模型,消除了手动规范经验关系的需要。在28/32/40 nm工艺节点上测试芯片的硅数据上进行的实验突出了我们模型的优势,包括快速训练(需要少于400次epoch),自动化部署和与数据驱动模型相比具有竞争力的预测准确性(与传统半物理模型相比,盘形的RMSE降低(18%/79%/55%)和侵蚀(25%/58%/61%))。
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来源期刊
IEEE Transactions on Semiconductor Manufacturing
IEEE Transactions on Semiconductor Manufacturing 工程技术-工程:电子与电气
CiteScore
5.20
自引率
11.10%
发文量
101
审稿时长
3.3 months
期刊介绍: The IEEE Transactions on Semiconductor Manufacturing addresses the challenging problems of manufacturing complex microelectronic components, especially very large scale integrated circuits (VLSI). Manufacturing these products requires precision micropatterning, precise control of materials properties, ultraclean work environments, and complex interactions of chemical, physical, electrical and mechanical processes.
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