IEEE Transactions on Semiconductor Manufacturing最新文献

Modeling and Designing a GaN-Growth Reactor With Halogen-Free Vapor Phase Epitaxy: NH3 Decomposition at the Catalytic Surface of Components to Replicate Parasitic Polycrystal Formation 无卤气相外延氮化镓生长反应器的建模与设计：组件催化表面NH3分解以复制寄生多晶形成

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-04-07 DOI: 10.1109/TSM.2025.3558328

Hiroki Shimazu;Shin-Ichi Nishizawa;Shugo Nitta;Hiroshi Amano;Daisuke Nakamura

{"title":"Modeling and Designing a GaN-Growth Reactor With Halogen-Free Vapor Phase Epitaxy: NH3 Decomposition at the Catalytic Surface of Components to Replicate Parasitic Polycrystal Formation","authors":"Hiroki Shimazu;Shin-Ichi Nishizawa;Shugo Nitta;Hiroshi Amano;Daisuke Nakamura","doi":"10.1109/TSM.2025.3558328","DOIUrl":"https://doi.org/10.1109/TSM.2025.3558328","url":null,"abstract":"Achieving long-duration, large bulk GaN growth is crucial to supply low-cost, high-quality GaN. Halogen-free vapor phase epitaxy (HF-VPE) is a promising method for bulk GaN growth but faces challenges due to severe polycrystals deposition on reactor components, such as the source-gas nozzles, which impedes stable, extended growth. In this study, we developed models to simulate the polycrystal deposition in HF-VPE-GaN growth conditions by including surface reactions of GaN formation and NH3 decomposition. Moreover, we devised conditions for controlling gas flow and interdiffusion to suppress polycrystal deposition around the source-gas nozzles. Experimental results aligned with simulations, showing that increasing the distance between Ga and NH3 nozzles and replacing the sheath gas from H2 to N2 effectively minimized polycrystal formation. The findings confirm that reducing NH3 concentration through catalytic surface decomposition on refractory components is crucial to polycrystal suppression. Optimizing nozzle dimensions and gas species synergistically controls the gas flow and interdiffusion. The constructed models contribute to advancing the design of polycrystal suppressive structures and conditions for long-duration bulk GaN growth.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 2","pages":"311-323"},"PeriodicalIF":2.3,"publicationDate":"2025-04-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143896377","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

VECSNet: A Nondestructive Automatic VCSEL Chip Detection Network With Pixelwise Segmentation 基于像素分割的VCSEL芯片无损自动检测网络

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-04-04 DOI: 10.1109/TSM.2025.3558015

Shuai Guo;Dengao Li;Jumin Zhao;Shuang Qiu;Bao Tang;Biao Luo

{"title":"VECSNet: A Nondestructive Automatic VCSEL Chip Detection Network With Pixelwise Segmentation","authors":"Shuai Guo;Dengao Li;Jumin Zhao;Shuang Qiu;Bao Tang;Biao Luo","doi":"10.1109/TSM.2025.3558015","DOIUrl":"https://doi.org/10.1109/TSM.2025.3558015","url":null,"abstract":"Dark line defects (DLDs) are critical factors that significantly limit the performance of vertical-cavity surface-emitting lasers (VCSELs). Recently, convolutional neural network (CNN)-based methods have shown strong feature extraction capabilities, achieving exceptional performance across various fields. However, these methods still face limitations on the segmentation samples with weak texture, varying shapes and blurred boundary information. To overcome these limitations, a novel segmentation method named VECSNet is proposed in this work. Electroluminescence imaging technology is employed to capture the emission characteristics of VCSELs and develop the corresponding dataset. To improve the extraction of emission features, a parallel dual-encoding structure is designed to capture both spatial and semantic information. Additionally, a feature fusion attention (FFA) block is introduced to effectively fuse features extracted from different branches. Faced with blurred boundary information, a boundary detector is proposed to guide each fusion connection in acquiring boundary feature information and enrich feature representation. Furthermore, to improve segmentation precision for areas with varying shapes, auxiliary logits are introduced to enhance discriminative ability of the network from multiple levels. Experimental results on the VCSEL emission segmentation dataset demonstrate that the proposed method achieves a high Dice score (92.5%) with fewer parameters (6.4M), outperforming other state-of-the-art segmentation approaches.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 2","pages":"270-280"},"PeriodicalIF":2.3,"publicationDate":"2025-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143896211","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Diffusion-Model-Based Methodology for Virtual Silicon Data Generation 基于扩散模型的虚拟硅数据生成方法

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-26 DOI: 10.1109/TSM.2025.3554685

Liang-Yu Chen;Michael Kao;Shih-Hao Chen;Chia-Hsiang Yang

{"title":"A Diffusion-Model-Based Methodology for Virtual Silicon Data Generation","authors":"Liang-Yu Chen;Michael Kao;Shih-Hao Chen;Chia-Hsiang Yang","doi":"10.1109/TSM.2025.3554685","DOIUrl":"https://doi.org/10.1109/TSM.2025.3554685","url":null,"abstract":"Silicon data allow designers to enhance the chip performance by leveraging machine learning techniques. By gaining a deeper understanding of the distributions of interested features within a wafer, designers can predict chip behaviors more accurately. However, real silicon data may not always be available. This work presents a methodology for generating high-quality synthetic silicon data and verifies its effectiveness through several metrics. Silicon features obtained by chip probing (CP) and wafer acceptance test (WAT) are combined to create more comprehensive data, enabling to conduct design-technology co-optimization (DTCO). Unlike the generative adversarial network (GAN) based methodology used in prior work, this work utilizes a diffusion model to generate synthetic silicon data. The Jensen-Shannon (JS) divergence similarity and Frechet Inception Distance (FID) are used to evaluate the distribution and to quantify the quality of synthetic data, respectively. Experimental results demonstrate that the diffusion model is able to extract the multi-feature silicon data distribution more accurately, with an average JS divergence similarity of 0.987 and an FID of 6.28. This methodology enables to generate a substantial volume of silicon samples for extensive silicon data analysis and DTCO acceleration.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 2","pages":"146-153"},"PeriodicalIF":2.3,"publicationDate":"2025-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143896363","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Quantifying the Impact of Outdoor Airborne Nano-Contamination on eSiGe Defect Generation and Machine Learning-Based Predictive Modeling 室外空气纳米污染对eSiGe缺陷产生的量化影响及基于机器学习的预测建模

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-26 DOI: 10.1109/TSM.2025.3554783

Jongmin Lee;Jungtae Park;Il-Jin Kim;Haeun Lee;Sehoon Park

{"title":"Quantifying the Impact of Outdoor Airborne Nano-Contamination on eSiGe Defect Generation and Machine Learning-Based Predictive Modeling","authors":"Jongmin Lee;Jungtae Park;Il-Jin Kim;Haeun Lee;Sehoon Park","doi":"10.1109/TSM.2025.3554783","DOIUrl":"https://doi.org/10.1109/TSM.2025.3554783","url":null,"abstract":"A thorough investigation was conducted to determine the impact of outdoor airborne nanoparticles on defect generation during semiconductor manufacturing. Periods of elevated airborne particle levels, along with increased occurrences of embedded Silicon-Germanium (eSiGe) defects, were analyzed using experimental bare wafers designed to capture nanoparticles. Defect counts were analyzed to trace their origins. A novel data processing algorithm was developed to clarify and quantify the relationship between external airborne nanoparticles and defect formation. The findings indicate that eSiGe defect particles attributable to external airborne nano-contamination were generated at rates ranging from 1% to 6%, depending on the fab site. The robustness of the algorithm was validated through the application of an Artificial Neural Network (ANN) technique. Key parameters influencing eSiGe defects, identified as outdoor PM2.5 and Fab particles, were further analyzed using Random Forest Regression (RFG) and Quantile Regression (QR). Additionally, the application of Support Vector Regression (SVR) significantly enhanced the prediction accuracy of eSiGe defect particles, achieving an improvement of approximately 56% compared to RFG modeling. This study uniquely combines short-term experimental methods with long-term inline data science techniques to elucidate the effects of outdoor nanoparticles on eSiGe defects.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 2","pages":"178-184"},"PeriodicalIF":2.3,"publicationDate":"2025-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143896411","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Simulation and Experimental Analysis of Contactless Chip Pickup Process Based on a Vortex Flow Gripper 基于涡流抓取器的非接触式芯片拾取过程仿真与实验分析

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-24 DOI: 10.1109/TSM.2025.3553559

Peiran Zhai;Zhoulong Xu;Zhouping Yin;Xiaohang Li;Bin Xie;Hao Wu

{"title":"Simulation and Experimental Analysis of Contactless Chip Pickup Process Based on a Vortex Flow Gripper","authors":"Peiran Zhai;Zhoulong Xu;Zhouping Yin;Xiaohang Li;Bin Xie;Hao Wu","doi":"10.1109/TSM.2025.3553559","DOIUrl":"https://doi.org/10.1109/TSM.2025.3553559","url":null,"abstract":"As the preceding process of chip-to-wafer (C2W) hybrid bonding, die pick-up, and transfer are critical in 3D heterogeneous integration (3D HI) technique. Especially, with the ever-shrinking die thickness and ever-increasing bumps on the die surface, mechanical scratches and electrostatic interference on chips caused by the traditional contact-type pickup process cannot be tolerated. Therefore, it is the trend to implement contactless pickup head to realize damage-free chip transfer. Herein, a contactless, pneumatic pickup head based on vortex flow was designed for the efficient and contactless grab of <inline-formula> <tex-math>$50~mu $ </tex-math></inline-formula>m ultrathin chips. A baffle structure on the four corners of pickup head was designed, which can achieve stable noncontact pickup of target chip and maintain the position under multiangle loading conditions. Furthermore, we optimized baffle structure to reduce the oscillation of the chip by more than 50%. We explored the underlying mechanism of pneumatic noncontact pickup through computational fluid dynamics (CFD) simulation by three turbulence models. Further, a high-precision vortex platform was built to investigate the pickup force characteristics, radial pressure distribution, and oscillations for different intake pressure and their influence on the noncontact pickup effect. Eventually, the simulation and experimental results indicate that the optimal intake pressure for stable non-contact pickup is between 20 and 30 kPa. This study provides design and optimization methods for stable noncontact picking of microchips, offering theoretical and experimental basis for selecting the optimal air intake pressure in practical applications.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 2","pages":"324-331"},"PeriodicalIF":2.3,"publicationDate":"2025-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143896356","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Fully Automated Wafer-Level Edge Coupling Measurement System for Silicon Photonics Integrated Circuits 用于硅光子集成电路的全自动晶圆级边缘耦合测量系统

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-19 DOI: 10.1109/TSM.2025.3552349

Quan Yuan;Anna Peczek;Joe Frankel;Dan Rishavy;Christian Mai;Eric Christenson;Divya Pratap;Lars Zimmermann

{"title":"Fully Automated Wafer-Level Edge Coupling Measurement System for Silicon Photonics Integrated Circuits","authors":"Quan Yuan;Anna Peczek;Joe Frankel;Dan Rishavy;Christian Mai;Eric Christenson;Divya Pratap;Lars Zimmermann","doi":"10.1109/TSM.2025.3552349","DOIUrl":"https://doi.org/10.1109/TSM.2025.3552349","url":null,"abstract":"In this work, we introduce a novel, fully automated wafer-level edge coupling measurement system designed specifically for silicon photonic integrated circuits (PICs). This system integrates state-of-the-art technologies, including optical probes, advanced alignment algorithms, and precision calibration processes, to ensure high coupling efficiency, rapid throughput, and exceptional repeatability. The optical probe, known as the Pharos lens, incorporates a periscope structure to facilitate effective vertical-to-horizontal light conversion, providing ultra-high coupling efficiency. The system also leverages adaptive optics algorithms to enhance measurement accuracy, compensating for optical aberrations and other distortions. Through extensive testing on 200 mm silicon wafers fabricated with <inline-formula> <tex-math>$0.25~mu $ </tex-math></inline-formula>m photonic BiCMOS technology, we demonstrate that our system achieves consistent coupling efficiency with less than 0.2 dB of repeatability and remarkable stability, with fluctuations within 0.01 dB during 10-minute testing intervals. Our results underline the system’s ability to address the critical challenges in modern photonic testing and highlight its potential for improving manufacturing processes in the semiconductor and photonic industries.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 2","pages":"168-177"},"PeriodicalIF":2.3,"publicationDate":"2025-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10934143","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143896364","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Manufacturing of g-C3N4-ZnS-Doped TiO2 Nanofibers by Electrospinning and Their Application to Dye-Sensitized Solar Cell as an Additional Layer in Photoanode 静电纺丝制备g- c3n4 - zns掺杂TiO2纳米纤维及其在染料敏化太阳能电池中的应用

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-12 DOI: 10.1109/TSM.2025.3550570

Yu-Hsun Nien;Jhih-Wei Zeng;Yu-Han Huang;Jung-Chuan Chou;Chih-Hsien Lai;Po-Yu Kuo;Po-Hui Yang;Yu-Wei Chen;Wen-Hao Chen

{"title":"Manufacturing of g-C3N4-ZnS-Doped TiO2 Nanofibers by Electrospinning and Their Application to Dye-Sensitized Solar Cell as an Additional Layer in Photoanode","authors":"Yu-Hsun Nien;Jhih-Wei Zeng;Yu-Han Huang;Jung-Chuan Chou;Chih-Hsien Lai;Po-Yu Kuo;Po-Hui Yang;Yu-Wei Chen;Wen-Hao Chen","doi":"10.1109/TSM.2025.3550570","DOIUrl":"https://doi.org/10.1109/TSM.2025.3550570","url":null,"abstract":"This study aims to enhance photovoltaic performance of dye-sensitized solar cells (DSSCs) by modification of photoanode with nanofibers (NFs) as an additional layer. g-C3N4 and ZnS (CN-ZnS) were selected for the modification of TiO2 nanofibers. The g-C3N4 was synthesized using a calcination method, while the CN-ZnS was successfully prepared through a simple hydrothermal method. Subsequently, CN-ZnS/TiO2 NFs with different mixing ratios were fabricated using electrospinning technology. The synthesized material was characterized by X-ray diffraction and scanning electron microscopy. The positive impact of incorporating the additional layer on the photovoltaic performance of DSSCs was confirmed through electrochemical impedance spectroscopy, UV-vis spectroscopy, J-V characterization, and incident photon-to-current efficiency measurements. Notably, the DSSC modified with 1% CN-ZnS/TiO2 NFs achieves an efficiency of 5.44%, and it reaches an efficiency of 7.04% under low illumination (30 mW/cm2). These results suggest that CN-ZnS/TiO2 NFs are promising for enhancing the performance of DSSCs.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 2","pages":"332-342"},"PeriodicalIF":2.3,"publicationDate":"2025-03-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143896375","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Capacity Estimation for Semiconductor Wafer Fabrication Facilities via an Optimization Model Based on Flexible Lead Times 基于柔性交货期优化模型的半导体晶圆制造设备产能评估

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-03 DOI: 10.1109/TSM.2025.3547026

Sungwon Hong;Younsoo Lee;Kyungsik Lee

引用次数: 0

IEEE Transactions on Semiconductor Manufacturing Publication Information IEEE半导体制造学报

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-01 DOI: 10.1109/TSM.2025.3546533

引用次数: 0

Call for Nominations for Editor-in-Chief: IEEE Transactions on Semiconductor Manufacturing 呼吁提名主编：IEEE半导体制造汇刊

IF 2.3 3区工程技术

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-01 DOI: 10.1109/TSM.2025.3562407

引用次数: 0