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Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting最新文献

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Hydrodynamic 2D simulation of InP/InGaAs DHBT InP/InGaAs DHBT的二维流体力学模拟
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365767
J. M. Ruiz-Palmero, I. Schnyder, H. Jackel
{"title":"Hydrodynamic 2D simulation of InP/InGaAs DHBT","authors":"J. M. Ruiz-Palmero, I. Schnyder, H. Jackel","doi":"10.1109/BIPOL.2004.1365767","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365767","url":null,"abstract":"Accurate fully thermal hydrodynamic 2D simulations of InP/InGaAs(P) double heterojunction bipolar transistors (DHBTs) are necessary for optimizing the HBT further towards +100 Gb/s circuits. Extrapolated parameters as mobilities, energy relaxation times, the thermal diffusion and other energy transport parameters from homogeneous Monte Carlo simulations of bulk InP and InGaAs are used for the Stratton hydrodynamic model. The simulations are further improved by a new doping dependent mobility model and taking into account thermionic emission over heterojunctions, band gap narrowing, and SRH (Shockley Read Hall) as well as radiative and Auger recombinations. Good agreement between measured and simulated output characteristics, unity current gain frequencies f/sub T/ and maximum oscillation frequencies f/sub max/ of actual very high speed InP/InGaAs(P) DHBTs are achieved.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121355575","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Modelling the excess noise due to avalanche multiplication in (hetero-junction) bipolar transistors 对(异质结)双极晶体管中雪崩倍增引起的过量噪声进行建模
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365757
J. Paasschens, R. de Kort
{"title":"Modelling the excess noise due to avalanche multiplication in (hetero-junction) bipolar transistors","authors":"J. Paasschens, R. de Kort","doi":"10.1109/BIPOL.2004.1365757","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365757","url":null,"abstract":"We study the noise behaviour of bipolar transistors for collector voltages close to and beyond the collector-emitter breakdown voltage. We model the excess noise due to amplification of shot noise and due to the impact ionisation itself, both for weak avalanche and for strong avalanche. Our new model accurately predicts the measurements, without the need for parameter fitting to noise data.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117049895","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Design and analyses of bias current circuits for operation at output voltages above BV/sub CEO/ 输出电压高于BV/sub / /时工作的偏置电流电路的设计与分析
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365774
Hugo Veenstra, Fred Hurkx, D. V. Goor, Hans Brekelmans
{"title":"Design and analyses of bias current circuits for operation at output voltages above BV/sub CEO/","authors":"Hugo Veenstra, Fred Hurkx, D. V. Goor, Hans Brekelmans","doi":"10.1109/BIPOL.2004.1365774","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365774","url":null,"abstract":"In this paper, the operation of bias current sources at output voltages exceeding BV/sub CEO/ is analysed for various widely used and newly proposed circuit topologies. The most effective way to increase the current mirror output breakdown voltage is based on a feed-back technique. Accurate modelling of the avalanche current factor M up to M-1/spl ap/1 is required to find a good agreement between measurements and circuit simulations.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127047294","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Short-circuit protection structure for insulated gate power devices 绝缘栅电源装置的短路保护结构
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365804
C. Caramel, P. Austin, J. Sanchez, E. Imbernon, M. Breil
{"title":"Short-circuit protection structure for insulated gate power devices","authors":"C. Caramel, P. Austin, J. Sanchez, E. Imbernon, M. Breil","doi":"10.1109/BIPOL.2004.1365804","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365804","url":null,"abstract":"In this paper, we present a new integrated structure which can protect insulated gate power devices (lGBT, MMOS, EST, ... ) from short-circuit operating mode. This strnctnre is built with an anode voltage sensor, a delay LDMOS transistor, a LDMOS transistor allowing the power device gate unload and a Zener diode. It is notable that this protection structure is fully compatible with a power device technological process. The operating mode and the flrst optimization of the protection structure are presented. For this, IGBT is used as test device. 2D simulations are performed with ISE TCAD. First experimental results of the anode voltage sensor are given and compared with simulation results.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"90 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126655712","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
General analysis of the impact of harmonic impedance on linearity in SiGe HBTs 谐波阻抗对SiGe hbt线性度影响的一般分析
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365742
Q. Liang, J. Andrews, J. Cressler, G. Niu
{"title":"General analysis of the impact of harmonic impedance on linearity in SiGe HBTs","authors":"Q. Liang, J. Andrews, J. Cressler, G. Niu","doi":"10.1109/BIPOL.2004.1365742","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365742","url":null,"abstract":"A comprehensive study of transistor linearity using a harmonic-impedance-controlled technique is presented, and is applied to a generic optimization methodology of intermodulation distortion in SiGe HBTs. Harmonic load-pull simulations and measurement results are used to prove the usefulness of this optimization approach.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"213 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114845619","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Non linear 3D electrothermal investigation on power MOS chips 功率MOS芯片非线性三维电热研究
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365768
X. Chauffleur, P. Tounsi, J. Dorkel, P. Dupuy, J. Fradin
{"title":"Non linear 3D electrothermal investigation on power MOS chips","authors":"X. Chauffleur, P. Tounsi, J. Dorkel, P. Dupuy, J. Fradin","doi":"10.1109/BIPOL.2004.1365768","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365768","url":null,"abstract":"Based on the use of a boundary element solver, a fully coupled electrical and thermal 3D modeling for low voltage power MOS transistors is proposed. The analogy between the 3D heat conduction and the 3D electrical conduction is turned to good account. The coupling between these two phenomena gives us the realistic voltage and current distributions in more than the temperature mapping. Results obtained from simpler approaches are compared to the reference solution.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125069232","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
An investigation of the RF/analog characteristics of multiple variants SiGe HBTs for optical and wireless applications 用于光学和无线应用的多种SiGe hbt的RF/模拟特性的研究
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365752
M.T. Yang, D.C.W. Kuo, P. Ho, C. Kuo, T. Yeh, A. Chang, C.Y. Lee, Y. Chia, G. J. Chern, K.L. Young, D. Tang, J. Sun
{"title":"An investigation of the RF/analog characteristics of multiple variants SiGe HBTs for optical and wireless applications","authors":"M.T. Yang, D.C.W. Kuo, P. Ho, C. Kuo, T. Yeh, A. Chang, C.Y. Lee, Y. Chia, G. J. Chern, K.L. Young, D. Tang, J. Sun","doi":"10.1109/BIPOL.2004.1365752","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365752","url":null,"abstract":"Multiple variants of SiGe HBTs, using selected collector implants, suitable for wired and wireless applications were explored. The RF/analog characteristics of HBTs featured with fT/BV/sub CEO/ values of 130 GHz/2.3 V, 80 GHz/3.4 V and 60 GHz/ 4.8 V were characterized. The dependence of bias, temperature, frequency, noise, power, and geometry were investigated to provide designers with appropriate performance-breakdown design coverage and flexibility.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126472568","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A novel low-cost horizontal current bipolar transistor (HCBT) with the reduced parasitics 一种新型低成本水平电流双极晶体管(HCBT)
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365739
T. Suligoj, P. Biljanovic, J. Sin, K. Wang
{"title":"A novel low-cost horizontal current bipolar transistor (HCBT) with the reduced parasitics","authors":"T. Suligoj, P. Biljanovic, J. Sin, K. Wang","doi":"10.1109/BIPOL.2004.1365739","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365739","url":null,"abstract":"A novel horizontal current bipolar transistor (HCBT) structure, suitable for the integration with pillar-like MOSFETs, is presented. The HCBT is processed by a low-cost technology in the (111) sidewalls on the [110] wafers, with minimized volume of the extrinsic regions, resulting in reduced parasitics. The HCBT structure exhibits the highest f/sub /spl tau// (30.4 GHz) and f/sub T/BV/sub CEO/ product (127.7 GHzV) among the lateral bipolar transistors.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"139 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127476891","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Current status of GaN heterojunction bipolar transistors GaN异质结双极晶体管的研究现状
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365737
M. Feng, R. K. Price, R. Chan, T. Chung, R. Dupuis, D. Keogh, J.C. Li, A. Conway, D. Qiao, S. Raychaudhuri, P. Asbeck
{"title":"Current status of GaN heterojunction bipolar transistors","authors":"M. Feng, R. K. Price, R. Chan, T. Chung, R. Dupuis, D. Keogh, J.C. Li, A. Conway, D. Qiao, S. Raychaudhuri, P. Asbeck","doi":"10.1109/BIPOL.2004.1365737","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365737","url":null,"abstract":"This paper reviews the current state-of-the-art GaN HBT results, and discusses the advantages of GaN HBTs over GaN HFETs and other material systems for high power amplifier applications. Technical difficulties associated with GaN HBTs such as MOCVD material growth, ICP dry etching, and ohmic contact issues are discussed. Methods for the elimination of technical issues and the authors' recommended approaches for practical realization of the GaN HBT-based RF high power amplifiers are described.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131847457","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
230 GHz self-aligned SiGeC HBT for 90 nm BiCMOS technology 230 GHz自对准SiGeC HBT，用于90纳米BiCMOS技术
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365786
Pascal Chevalier, C. Fellous, L. Rubaldo, Didier Dutartre, M. Laurens, T. Jagueneau, François Leverd, S. Bord, C. Richard, D. Lenoble, J. Bonnouvrier, M. Marty, A. Perrotin, Daniel Gloria, F. Saguin, B. Barbalat, R. Beerkens, N. Zerounian, F. Aniel, A. Chantre
{"title":"230 GHz self-aligned SiGeC HBT for 90 nm BiCMOS technology","authors":"Pascal Chevalier, C. Fellous, L. Rubaldo, Didier Dutartre, M. Laurens, T. Jagueneau, François Leverd, S. Bord, C. Richard, D. Lenoble, J. Bonnouvrier, M. Marty, A. Perrotin, Daniel Gloria, F. Saguin, B. Barbalat, R. Beerkens, N. Zerounian, F. Aniel, A. Chantre","doi":"10.1109/BIPOL.2004.1365786","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365786","url":null,"abstract":"This paper describes a 230 GHz self-aligned SiGeC HBT featuring a selective epitaxial base and an arsenic-doped monocrystalline emitter. These technical choices are presented and discussed with respect to BiCMOS performance objectives and integration constraints.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132101047","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 33
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