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Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting最新文献

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A new extraction technique for the series resistances of semiconductor devices based on the intrinsic properties of bias-dependent y-parameters [bipolar transistor examples] 基于偏置相关y参数固有特性的半导体器件串联电阻提取新技术[双极晶体管示例]
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365766
V. Cuoco, W. Neo, L. D. de Vreede, H. de Graaff, L. Nanver, K. Buisman, H. Wu, H. Jos, J. Burghartz
{"title":"A new extraction technique for the series resistances of semiconductor devices based on the intrinsic properties of bias-dependent y-parameters [bipolar transistor examples]","authors":"V. Cuoco, W. Neo, L. D. de Vreede, H. de Graaff, L. Nanver, K. Buisman, H. Wu, H. Jos, J. Burghartz","doi":"10.1109/BIPOL.2004.1365766","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365766","url":null,"abstract":"This paper presents an approach for the extraction of the series parasitics of semiconductor devices. The approach is based on the inherently different bias dependent behavior of y-parameters for a device with series parasitics compared to a device without series parasitics. The principles of this new method are verified analytically as well in simulations using the ADS Gummel-Poon model. In conclusion we have applied the proposed extraction method on measured data of DIMES-03 bipolar transistors of different sizes.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123441335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A 43Gb/s full-rate clock transmifter in 0.18/spl mu/m SiGe BiCMOS technology 43Gb/s全速率时钟发射器，采用0.18/spl mu/m SiGe BiCMOS技术
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365802
M. Mcghelli
{"title":"A 43Gb/s full-rate clock transmifter in 0.18/spl mu/m SiGe BiCMOS technology","authors":"M. Mcghelli","doi":"10.1109/BIPOL.2004.1365802","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365802","url":null,"abstract":"A 43-Gb/s full-rate clock transmitter chip for SONET OC-768 transmission systems is reported. The IC is implemented in a 0.18pm SiGe BiCMOS technology featuring 120GHz f T and 100GHz f max HBTs. It consists of a 4:1 multiplexer, a clock multiplier unit and a frequency lock detector. The IC features a clock jitter generation of 260fs rms and dissipates 2.3W from a -3.6V supply voltage. Measurement results are compared to previously reported half-rate clock transmitter designed using the same technology.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122731851","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 60 GHz broadband amplifier in SiGe bipolar technology 采用SiGe双极技术的60 GHz宽带放大器
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365803
W. Perndl, W. Wilhelm, H. Knapp, M. Wurzer, K. Aufinger, T. Meister, J. Bock, W. Simburger, A. Scholtz
{"title":"A 60 GHz broadband amplifier in SiGe bipolar technology","authors":"W. Perndl, W. Wilhelm, H. Knapp, M. Wurzer, K. Aufinger, T. Meister, J. Bock, W. Simburger, A. Scholtz","doi":"10.1109/BIPOL.2004.1365803","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365803","url":null,"abstract":"A broadband amplifier with 16 dB gain and a 3-dB bandwidth of more than 60 GHz is presented. This amplifier exhibits a 1-dB compression point of -9.5 dBm and a third-order intercept point of +2.1 dBm referred to the input. The maximum differential output voltage swing is 1.5 VPP. Clear output eye diagrams have been measured up to 100 Gbit/s. The chip is manufactured in an advanced SiGe bipolar technology and consumes a power of 770 mW at a supply voltage of -5.0 V.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116520733","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
QUBiC4X: An f/sub T//f/sub max/ = 130/140GHz SiGe:C-BiCMOS manufacturing technology witg elite passives for emerging microwave applications QUBiC4X:一种f/sub T//f/sub max/ = 130/140GHz SiGe:C-BiCMOS制造技术，具有用于新兴微波应用的精英无源
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365788
P. Deixler, A. Rodriguez, W. de Boer, H. Sun, R. Colclaser, D. Bower, N. Bell, A. Yao, R. Brock, Y. Bouttement, G. Hurkx, L. Tiemeijer, J. Paasschens, H.G.A. Huizing, D. Hartskeerl, P. Agrarwal, P. Magnée, E. Aksen, J. Slotboom
{"title":"QUBiC4X: An f/sub T//f/sub max/ = 130/140GHz SiGe:C-BiCMOS manufacturing technology witg elite passives for emerging microwave applications","authors":"P. Deixler, A. Rodriguez, W. de Boer, H. Sun, R. Colclaser, D. Bower, N. Bell, A. Yao, R. Brock, Y. Bouttement, G. Hurkx, L. Tiemeijer, J. Paasschens, H.G.A. Huizing, D. Hartskeerl, P. Agrarwal, P. Magnée, E. Aksen, J. Slotboom","doi":"10.1109/BIPOL.2004.1365788","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365788","url":null,"abstract":"P. Deixler, A. Rodriguez, W. De Boer, H. Sun, R Colclaser, D. Bower, N. Bell, A. Yao’, RBrock’, Y. Bouttement.’, G.A.M. Hurkx4>, L.F. TiemeijeS, J.C.J. Paassehens4”, H.G.A Huizing”,D.M.H. Hartskeer14, P. Agamal’, P.H.C Magnee’, E. Aksen’ and J.W. Slotboom6 Philips Semiconductors, 2070 Route 52, P.O. Box 1279, Hopewell Junction, NY 12533, USA ’Philips RF Device Modeling Group, San Jose, USA; ’ Philips RF Modeling Group, Caen, France ‘ Philips Natlab, Eindboven, The Netherlands; ’ Philips Research Leuven, Leuven, Belgium; ‘Univ. Delft, Netherlands Email: Peter.Deixler@philips.com, Phone: ++1 845 902 1586 Abstract QUBiC4X is a cost-effective ultra-high-speed SiGe:C RF-BiCMOS technology for emerging microwave applications with NPN fr/f,, up to l30/140GHz, enhanced RF-oriented 2.5V CMOS, SiGe:C Power Amplifiers with 88% power-added efficiency, distinguished substrate isolation, full suite of elite high-density passives, 5 metal layers and an advanced design flow.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131040668","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 37
Optimization of vertical profiles of SiGe HBT/BiCMOS by promoting emitter diffusion process 通过促进发射极扩散过程优化SiGe HBT/BiCMOS垂直轮廓
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365753
M. Miura, H. Shimamoto, R. Hayami, A. Kodama, T. Tominari, T. Hashimoto, K. Washio
{"title":"Optimization of vertical profiles of SiGe HBT/BiCMOS by promoting emitter diffusion process","authors":"M. Miura, H. Shimamoto, R. Hayami, A. Kodama, T. Tominari, T. Hashimoto, K. Washio","doi":"10.1109/BIPOL.2004.1365753","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365753","url":null,"abstract":"A new concept, promoting emitter diffusion (PED) process, by using high-temperature annealing, is proposed for fabricating high-performance SiGe HBTs. Both the cut-off frequency and maximum oscillation frequency exceeded 200 GHz when the annealing temperature was increased from 885/spl deg/C to 1000/spl deg/C. This PED process concept is based on the fact that the increased phosphorus diffusion can more than compensate for increased boron diffusion and decreased base thickness.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130893810","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
The current mirror thermal characterization method and its implementation in a power SOI BJT process 当前的镜面热表征方法及其在功率SOI BJT工艺中的实现
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365806
Jonggook Kim, Yun Liu, J. De Santis, D. Brisbin
{"title":"The current mirror thermal characterization method and its implementation in a power SOI BJT process","authors":"Jonggook Kim, Yun Liu, J. De Santis, D. Brisbin","doi":"10.1109/BIPOL.2004.1365806","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365806","url":null,"abstract":"A new current mirror method is described that can be used to evaluate thermal issues in silicon-on-insulator (SO0 bipolar junction transistors (BJTs). This method is compared to conventional transistor level techniques ond is shown to significantly improve safe operating area (SOA) measurement sensitiviq. Unlike conventional metho&, the current mirror method can provide quantitative analysis of the BJTs thermal instabiliQ over a wide power range, even in the apparent SOA of the device. Also, this method can predict and evaluate SOA with respect to emitter ballast resistance and current crowding.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134359894","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
New clectro-thermal modeling method for IGBT power module IGBT电源模块电热建模新方法
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365805
L. Mussard, P. Tounsi, P. Austin, J.-M. DorkeI, E. Antonini
{"title":"New clectro-thermal modeling method for IGBT power module","authors":"L. Mussard, P. Tounsi, P. Austin, J.-M. DorkeI, E. Antonini","doi":"10.1109/BIPOL.2004.1365805","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365805","url":null,"abstract":"In this paper, an original method for electro-thermal simulation is presented. The originality lies in the effective way of communication between 3D thermal modeling and IGBT-chip electrical model. This method is illustrated by IGBT modules.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114022096","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Parameters extraction of a scalable Mextram model for high-speed SiGe HBTs 高速SiGe hbt可扩展Mextram模型参数提取
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365764
H. Wu, S. Mijalkovic, J. Burghartz
{"title":"Parameters extraction of a scalable Mextram model for high-speed SiGe HBTs","authors":"H. Wu, S. Mijalkovic, J. Burghartz","doi":"10.1109/BIPOL.2004.1365764","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365764","url":null,"abstract":"A methodology to perform a geometry scaling of Mextram parameters for high-speed SiGe HBTs has been presented. The scaling is based on the parameter sets of individual devices having different geometries and sheet resistance measurement data. The scaleable model results have been verified with CV, DC, Ft and S11, S21 results up to 40 GHz.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122239493","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Generation and integration of scalable bipolar compact models [HBT example] 可扩展双极紧凑型模型的生成和集成[HBT示例]
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365763
D. Sheridan, R. Murty, K. Newton, J.B. Johnson
{"title":"Generation and integration of scalable bipolar compact models [HBT example]","authors":"D. Sheridan, R. Murty, K. Newton, J.B. Johnson","doi":"10.1109/BIPOL.2004.1365763","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365763","url":null,"abstract":"This paper investigates the methodologies for generating and integrating scalable bipolar models in the modern design environment. Additionally, fundamental bipolar parameter scaling is reviewed and demonstrated with a scalable SiGe HBT model valid for models such as VBIC, MEXTRAM, and HiCUM.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124158528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
The effect of deep trench and sub-collector on the latchup robustness in BiCMOS silicon germanium technology 深沟槽和副集电极对BiCMOS硅锗技术锁存稳健性的影响
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting Pub Date : 2004-12-13 DOI: 10.1109/BIPOL.2004.1365772
A. Watson, S. Voldman
{"title":"The effect of deep trench and sub-collector on the latchup robustness in BiCMOS silicon germanium technology","authors":"A. Watson, S. Voldman","doi":"10.1109/BIPOL.2004.1365772","DOIUrl":"https://doi.org/10.1109/BIPOL.2004.1365772","url":null,"abstract":"This paper demonstrates the influence and improvement of deep trench (DT) isolation, and bipolar sub-collector on CMOS latchup in a 0.13 /spl mu/m CMOS-based 200/285 GHz (f/sub T//f/sub max/) SiGe HBT technology.","PeriodicalId":447762,"journal":{"name":"Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129484486","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
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