1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326)最新文献_第2页

A 144 Mb 8-level NAND flash memory with optimized pulse width programming 具有优化脉冲宽度编程的144mb 8级NAND闪存

1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326) Pub Date : 1999-06-17 DOI: 10.1109/VLSIC.1999.797228

H. Nobukata, S. Takagi, K. Hiraga, M. Miyashita, K. Kamimura, S. Hiramatsu, K. Sakai, T. Ishida, H. Arakawa, M. Itoh, I. Naiki, M. Noda

引用次数: 3

A 7F/sup 2/ cell and bitline architecture featuring tilted array devices and penalty-free vertical BL twists for 4 Gb DRAM's 7F/sup 2/ cell和位线架构，具有倾斜阵列器件和4gb DRAM的无惩罚垂直BL扭曲

1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326) Pub Date : 1999-06-17 DOI: 10.1109/VLSIC.1999.797259

H. Hoenigschmid, A. Frey, J. DeBrosse, T. Kirihata, G. Mueller, G. Daniel, G. Frankowsky, K. Guay, D. Hanson, L. Hsu, B. Ji, D. Netis, S. Panaroni, C. Radens, A. Reith, D. Storaska, O. Weinfurtner, J. Alsmeier, W. Weber, M. Wordeman

引用次数: 0

Embedded DRAM for a reconfigurable array 用于可重构阵列的嵌入式DRAM

1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326) Pub Date : 1999-06-17 DOI: 10.1109/VLSIC.1999.797266

S. Perissakis, Y. Joo, J. Ahn, A. Dellon, J. Wawraynek

引用次数: 26

A 1.0 ns access 770 MHz 36 Kb SRAM macro 一个1.0 ns访问770 MHz的36 Kb SRAM宏

1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326) Pub Date : 1999-06-17 DOI: 10.1109/VLSIC.1999.797253

T. Uetake, Y. Maki, T. Nakadai, K. Yoshida, M. Susuki, R. Nanjo

引用次数: 10

A 250 MHz CMOS floating-point divider with operand pre-scaling 具有操作数预缩放的250 MHz CMOS浮点分频器

1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326) Pub Date : 1999-06-17 DOI: 10.1109/VLSIC.1999.797220

S. Inui, T. Uesugi, H. Saito, Y. Hagihara, A. Yoshikawa, M. Nishida, M. Yamashina

引用次数: 6

Micro IDDQ test using Lorentz force MOSFETs 使用洛伦兹力mosfet的微IDDQ测试

1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326) Pub Date : 1999-06-17 DOI: 10.1109/VLSIC.1999.797273

K. Nose, T. Sakurai

引用次数: 6

An integratable 1-2.5 Gbps low jitter CMOS transceiver with built in self test capability 集成1-2.5 Gbps低抖动CMOS收发器，内置自检功能

1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326) Pub Date : 1999-06-17 DOI: 10.1109/VLSIC.1999.797230

Ah-Lyan Yee, R. Gu, Heng-Chih-Lin, A. Tsong, R. Prentice, J. Tran, R. Venett, S. Spencer, V. Pathak, E. Suder, M. Izzard

引用次数: 5

A high speed, 500 frames/s, 1024/spl times/1024 CMOS active pixel sensor 一个高速，500帧/秒，1024/spl次/1024 CMOS有源像素传感器

1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326) Pub Date : 1999-06-17 DOI: 10.1109/VLSIC.1999.797263

A. Krymski, D. V. Blerkom, Nikolai E. Bock, B. Mansoorian, Eric R. Fossum

引用次数: 72

A 1 V 6 b 50 MHz current-interpolating CMOS ADC 1 V 6 b 50 MHz电流插值CMOS ADC

1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326) Pub Date : 1999-06-17 DOI: 10.1109/VLSIC.1999.797242

Bang-Sup Song, Myung-Jun Choe, P. Rakers, S. Gillig

引用次数: 7

A 500 MHz, write-bypassed, 88-entry, 90-bit register file 一个500兆赫，写绕过，88项，90位寄存器文件

1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326) Pub Date : 1999-06-17 DOI: 10.1109/VLSIC.1999.797252

M. Golden, H. Partovi

引用次数: 19