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GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995最新文献

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A 5-10 GHz octave-band AlGaAs/GaAs HBT down-converter MMIC 一种5- 10ghz倍频AlGaAs/GaAs HBT下变频MMIC
GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995 Pub Date : 1995-10-29 DOI: 10.1109/GAAS.1995.529005
K. Kobayashi, R. Kasody, A. Oki
{"title":"A 5-10 GHz octave-band AlGaAs/GaAs HBT down-converter MMIC","authors":"K. Kobayashi, R. Kasody, A. Oki","doi":"10.1109/GAAS.1995.529005","DOIUrl":"https://doi.org/10.1109/GAAS.1995.529005","url":null,"abstract":"This work describes an X-band HBT down-converter MMIC which integrates a double double-balanced Schottky mixer and 5 stages of HBT amplification to achieve >30 dB conversion gain and an IP3 as high as 15 dBm with an RF bandwidth from 5-10 GHz. A novel HBT amplifier gain cell employing active feedback which provides wide bandwidth and high performance in a compact area is used for the RF, LO, and IF amplifier stages. The MMIC is realized in a 3.6/spl times/3.4 mm/sup 2/ area, consumes 530 mW, and is self-biased through a 6 V supply. This MMIC represents the highest complexity X-band down-converter MMIC demonstration based on GaAs HBT and Schottky technology.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116299537","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Statistical circuit simulation with measurement-based active device models: implications for process control and IC manufacturability 统计电路仿真与基于测量的有源器件模型:对过程控制和集成电路可制造性的影响
GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995 Pub Date : 1995-10-29 DOI: 10.1109/GAAS.1995.528976
D. Root, D. McGinty, B. Hughes
{"title":"Statistical circuit simulation with measurement-based active device models: implications for process control and IC manufacturability","authors":"D. Root, D. McGinty, B. Hughes","doi":"10.1109/GAAS.1995.528976","DOIUrl":"https://doi.org/10.1109/GAAS.1995.528976","url":null,"abstract":"This paper presents a new approach to statistical active circuit design which unifies device parametric-based process control and non-parametric circuit simulation. Predictions of circuit sensitivity to process variation and yield-loss of circuits fabricated in two different GaAs IC processes are described. The simulations make use of measurement-based active device models which are not formulated in terms of conventional parametric statistical variables. The technique is implemented in commercially available simulation software (HP MDS).","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126661588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
The use of III-V ICs in WDM optical network equipment III-V集成电路在WDM光网络设备中的应用
GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995 Pub Date : 1995-10-29 DOI: 10.1109/GAAS.1995.528988
J. Sitch, C. Dreze, D. Pollex, K. Warbrick, K. Lowe, E. Best, T. Wilson, P. Corr, G. Weston
{"title":"The use of III-V ICs in WDM optical network equipment","authors":"J. Sitch, C. Dreze, D. Pollex, K. Warbrick, K. Lowe, E. Best, T. Wilson, P. Corr, G. Weston","doi":"10.1109/GAAS.1995.528988","DOIUrl":"https://doi.org/10.1109/GAAS.1995.528988","url":null,"abstract":"WDM is not about to replace all other fiber systems overnight, but it will add to network functionality and enable many new services. In order to pay for the optical components, WDM systems have to be high capacity. The technologies needed to make integrated WDM network equipment are presently emerging. III-V ICs offer speed and power performance that currently lead the field, although silicon ICs are very close in many areas. III-Vs are the only way to make OEICs, and are a contender for some integrated optics functions. Packaging is the area where the largest gains can be made.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131065007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Thermal management to avoid the collapse of current gain in power heterojunction bipolar transistors 避免功率异质结双极晶体管电流增益崩溃的热管理
GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995 Pub Date : 1995-10-29 DOI: 10.1109/GAAS.1995.528981
W. Liu
{"title":"Thermal management to avoid the collapse of current gain in power heterojunction bipolar transistors","authors":"W. Liu","doi":"10.1109/GAAS.1995.528981","DOIUrl":"https://doi.org/10.1109/GAAS.1995.528981","url":null,"abstract":"One undesirable thermal phenomenon occurring in power heterojunction bipolar transistor is the collapse of current gain. This paper presents the electrical, electrical-thermal, thermal, and material approaches to avoid the collapse, and thus to improve the transistor output power.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"418 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114297219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
A Q-band 1 watt 30% power-added-efficiency hetero-junction FET 一个q波段1瓦30%功率增益效率的异质结场效应管
GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995 Pub Date : 1995-10-29 DOI: 10.1109/GAAS.1995.529015
S. Arai, H. Mizuno, H. Tanaka, H. Yoshinaga, K. Masuda, B. Abe, M. Kawano, H. Tokuda, K. Shibata
{"title":"A Q-band 1 watt 30% power-added-efficiency hetero-junction FET","authors":"S. Arai, H. Mizuno, H. Tanaka, H. Yoshinaga, K. Masuda, B. Abe, M. Kawano, H. Tokuda, K. Shibata","doi":"10.1109/GAAS.1995.529015","DOIUrl":"https://doi.org/10.1109/GAAS.1995.529015","url":null,"abstract":"A series of Q-band hetero-junction power FETs with gate widths of 400, 800, 1600 and 2400 /spl mu/m has been developed. The FETs use an n-type GaAs layer as a channel with an AlGaAs layer as a Schottky contact layer. Each FET has two cell configuration with monolithically integrated 1/4 wavelength impedance transformer for the input and output matching networks. The 2400 /spl mu/m-gate-width device delivered an output power of 30 dBm with 4.4 dB gain and 30.1% power-added-efficiency.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"144 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114641306","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Low phase noise millimeter-wave frequency sources using InP based HBT technology 采用基于InP的HBT技术的低相位噪声毫米波频率源
GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995 Pub Date : 1995-10-29 DOI: 10.1109/GAAS.1995.529008
H. Wang, K. Chang, L. Tran, J. Cowles, T. Block, D. Lo, G. Dow, A. Oki, D. Streit, B. Allen
{"title":"Low phase noise millimeter-wave frequency sources using InP based HBT technology","authors":"H. Wang, K. Chang, L. Tran, J. Cowles, T. Block, D. Lo, G. Dow, A. Oki, D. Streit, B. Allen","doi":"10.1109/GAAS.1995.529008","DOIUrl":"https://doi.org/10.1109/GAAS.1995.529008","url":null,"abstract":"A family of millimeter-wave sources based on InP HBT technology has been developed. These sources include 40-GHz, 46-GHz, 62-GHz MMIC fundamental mode VCOs, and a 95-GHz frequency source module using a 23.8-GHz InP HBT MMIC DRO in conjunction with a GaAs based HEMT MMIC frequency quadrupler and W-band output amplifiers. Good phase noise performance was achieved due to the low 1/f noise of the InP-based HBT devices. To our knowledge, this is the first demonstration of millimeter-wave sources using InP-based HBTs.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116069524","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Single-Chip 4 Bit 35 GHz Phase-Shifting Receiver with a Gb/s Digital Interface Circuitry 带有Gb/s数字接口电路的单片4位35 GHz移相接收机
GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995 Pub Date : 1995-10-29 DOI: 10.1109/GAAS.1995.529002
Z. Wang, M. Berroth, A. Thiede, M. Schlechtweg, M. Sedler, J. Seibel, M. Rieger-Motzer, B. Raynor, W. Bronner, T. Fink, B. Huder, R. Rittmayer, J. Schroth
{"title":"Single-Chip 4 Bit 35 GHz Phase-Shifting Receiver with a Gb/s Digital Interface Circuitry","authors":"Z. Wang, M. Berroth, A. Thiede, M. Schlechtweg, M. Sedler, J. Seibel, M. Rieger-Motzer, B. Raynor, W. Bronner, T. Fink, B. Huder, R. Rittmayer, J. Schroth","doi":"10.1109/GAAS.1995.529002","DOIUrl":"https://doi.org/10.1109/GAAS.1995.529002","url":null,"abstract":"Using 0.3 pm gate length GaAs/AIGaAs HEMTs, we have designed and realized a single-chip receiver including one 4 bit 360' phase shifter, two low-noise 35 GHz amplifiers, and one low-power Gb/s digital interface circuit. Desired functions have been measured on-wafer. 16 phase-shifting curves have been obtained with a maximum deviation of 7.5O. The total gain of the millimcteiwavc channel is -7 dB with a phase-dependent deviation of 4.3 dB. The input and the output matching are better than -12 dB. The chip area is 4x2.5 mm'. The dc power consumption is less than 250 mW.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"140 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123393825","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A Q-band high gain and low noise variable gain amplifier using dual gate HEMTs 一种采用双栅极hemt的q波段高增益低噪声可变增益放大器
GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995 Pub Date : 1995-10-29 DOI: 10.1109/GAAS.1995.528996
T. Kashiwa, M. Komaru, T. Katoh, N. Yoshida, N. Tanino, T. Takagi, O. Ishihara
{"title":"A Q-band high gain and low noise variable gain amplifier using dual gate HEMTs","authors":"T. Kashiwa, M. Komaru, T. Katoh, N. Yoshida, N. Tanino, T. Takagi, O. Ishihara","doi":"10.1109/GAAS.1995.528996","DOIUrl":"https://doi.org/10.1109/GAAS.1995.528996","url":null,"abstract":"A Q-band high gain and low noise Variable Gain Amplifier (VGA) using dual gate AlGaAs/InGaAs pseudomorphic HEMTs has been developed. The dual gate HEMT can be fabricated using the same process as the single gate HEMT with a gate length of 0.15 /spl mu/m. The Q-band VGA consists of a 1-stage low noise amplifier MMIC using a single gate HEMT and a 2-stage VGA MMIC using dual gate HEMTs. The VGA has a gain of more than 20 dB from 41 GHz to 52 GHz. A gain control range of more than 30 dB is obtained in the same frequency range. A minimum noise figure of 1.8 dB with an associated gain of 22 dB is achieved at 43 GHz when biased for a low noise figure. This performance is comparable with the best data ever reported for LNAs at Q-band including both GaAs based HEMTs and InP based HEMTs.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130502529","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Metastability in SCFL SCFL的亚稳态
GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995 Pub Date : 1995-10-29 DOI: 10.1109/GAAS.1995.529020
B. Cheney, R. Savarã
{"title":"Metastability in SCFL","authors":"B. Cheney, R. Savarã","doi":"10.1109/GAAS.1995.529020","DOIUrl":"https://doi.org/10.1109/GAAS.1995.529020","url":null,"abstract":"As digital system clock rates increase, the susceptibility to failure in synchronizing asynchronous inputs increases. Because of this phenomena, the need for flip flops in high speed technologies that can resist becoming metastable and recover quickly has also increased. SONET and ATM are typical applications where there are concerns regarding metastability. This paper presents the results of characterizing a high speed GaAs digital logic family, SCFL (Source Coupled FET Logic) for metastability and the efforts to improve the metastability characteristics of the flip flops. An architecture which shows a significant reduction in failure rate was designed, simulated, fabricated, and characterized.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127604055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A 7 ns cycle, high speed dual compare CAM in 0.6 /spl mu/m GaAs 一个7 ns周期，高速双比较凸轮在0.6 /spl亩/米GaAs
GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995 Pub Date : 1995-10-29 DOI: 10.1109/GAAS.1995.529019
M. Venkataraman, M. Pai, S. Canaga
{"title":"A 7 ns cycle, high speed dual compare CAM in 0.6 /spl mu/m GaAs","authors":"M. Venkataraman, M. Pai, S. Canaga","doi":"10.1109/GAAS.1995.529019","DOIUrl":"https://doi.org/10.1109/GAAS.1995.529019","url":null,"abstract":"A 256 entry by 14-bit dual compare content addressable memory (CAM) with a fast hit detect access time of 5.5 ns and a cycle time of 7 ns is described in this paper. In addition, the CAM flags multiple hits and outputs the hit address when a single hit has occurred. The size of the CAM is 3.5 mm/spl times/8 mm. The power dissipation, at a vtt of -2.0 V, and 85/spl deg/C is 8.8 W. The chip was fabricated using Vitesse's 0.6 /spl mu/m H-GaAsIII enhancement/depletion MESFET technology.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127816974","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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