{"title":"Reliability of self-aligned, ledge passivated 7.5 GHz GaAs/AlGaAs HBT power amplifiers under RF bias stress at elevated temperatures","authors":"T. Henderson, P. Ikalainen","doi":"10.1109/GAAS.1995.528982","DOIUrl":"https://doi.org/10.1109/GAAS.1995.528982","url":null,"abstract":"We report a two-temperature RF bias stress test on nominal 1.2 W 2.5 GHz GaAs/AlGaAs HBT unit cell amplifiers. MTTFs of 2020 and 1340 hours were obtained at Tj=218/spl deg/C and 245/spl deg/C, respectively, under nominal input bias. An activation energy of 0.42 eV is estimated, consistent with published results for similar devices under DC bias stress.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133492050","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Understanding the cause of IV kink in GaAs MESFETs with two-dimensional numerical simulations","authors":"M. R. Wilson, I. Zdebel, P. Wennekers, R. Anholt","doi":"10.1109/GAAS.1995.528973","DOIUrl":"https://doi.org/10.1109/GAAS.1995.528973","url":null,"abstract":"High performance GaAs MESFETs have been observed to exhibit kinks in their IV characteristics, particularly when high drain-source voltages are applied, Such characteristics make the design of circuits with high operating voltages difficult since this type of IV anomaly is typically not modeled by circuit simulators. This work has identified the cause of these kinks through the use of two-dimensional numerical device simulation with impact ionization. These simulations have also identified a potential device solution to IV kink. Furthermore, the results of this simulation work were verified by comparison with fabricated devices.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"89 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133522986","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. Liu, D. Hill, H. Chau, J. Sweder, T. Nagle, J. Delaney
{"title":"Laterally etched undercut (LEU) technique to reduce base-collector capacitances in heterojunction bipolar transistors","authors":"W. Liu, D. Hill, H. Chau, J. Sweder, T. Nagle, J. Delaney","doi":"10.1109/GAAS.1995.528986","DOIUrl":"https://doi.org/10.1109/GAAS.1995.528986","url":null,"abstract":"We report a novel fabrication process aimed at reducing the parasitic junction capacitance of AlGaAs-GaAs heterojunction bipolar transistors. The process, named as the Laterally Etched Undercut (LEU) process, physically removes the extrinsic base-collector junction area and results in a cantilever structure. The DC, small-signal, and large-signal performances of the LEU devices are compared to those obtained from the conventional devices.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"129 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131054842","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Lai, M. Biedenbender, J. Lee, K. Tan, D. Streit, P. Liu, M. Hoppe, B. Allen
{"title":"0.15 /spl mu/m InGaAs/AlGaAs/GaAs HEMT production process for high performance and high yield V-band power MMICs","authors":"R. Lai, M. Biedenbender, J. Lee, K. Tan, D. Streit, P. Liu, M. Hoppe, B. Allen","doi":"10.1109/GAAS.1995.528972","DOIUrl":"https://doi.org/10.1109/GAAS.1995.528972","url":null,"abstract":"We present a unique high yield, high performance 0.15 /spl mu/m HEMT production process which supports fabrication of MMW power MMICs up to 70 GHz. This process has been transferred successfully from an R&D process to TRW's GaAs production line. This paper reports the on-wafer test results of more than 1300 V-band MMIC PA circuits measured over 24 wafers. The best 2-stage V-band power MMICs have demonstrated state-of-the-art performance with 9 dB power gain, 20% PAE and 330 mW output power. An excellent RF yield of 60% was achieved with an 8 dB power gain and 250 mW output power specification.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126084706","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Uda, T. Hirai, H. Tominaga, K. Nogawa, T. Sawai, S. Higashino, Y. Harada
{"title":"A very high isolation GaAs SPDT switch IC sealed in an ultra compact plastic package","authors":"H. Uda, T. Hirai, H. Tominaga, K. Nogawa, T. Sawai, S. Higashino, Y. Harada","doi":"10.1109/GAAS.1995.528978","DOIUrl":"https://doi.org/10.1109/GAAS.1995.528978","url":null,"abstract":"A high-isolation switch IC with 31 dB isolation and 0.88 dB insertion loss at 1.65 GHz, sealed in a 6-pin ultra-compact plastic package having approximately 1/4 the conventional area, was developed for the first time. An electromagnetic-field simulation analysis of the isolation characteristics between the lead pins of the ultra-compact package was used for this IC together with a new design method which takes into account deterioration of the isolation characteristics due to the plastic molding. Electromagnetic-field simulation was also used in the layout design to minimize chip size.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122340997","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Havasy, T. Quach, C. Bozada, G. Desalvo, R. Dettmer, J. Ebel, J. Gillespie, K. Nakano, G. Via
{"title":"A highly manufacturable 0.2 /spl mu/m AlGaAs/InGaAs PHEMT fabricated using the single-layer integrated-metal FET (SLIMFET) process","authors":"C. Havasy, T. Quach, C. Bozada, G. Desalvo, R. Dettmer, J. Ebel, J. Gillespie, K. Nakano, G. Via","doi":"10.1109/GAAS.1995.528968","DOIUrl":"https://doi.org/10.1109/GAAS.1995.528968","url":null,"abstract":"This work is the development of a single-layer integrated-metal field effect transistor (SLIMFET) process for a high performance 0.2 /spl mu/m AlGaAs/InGaAs pseudomorphic high electron mobility transistor (PHEMT). This process is compatible with MMIC fabrication and minimizes process variations, cycle time, and cost. This process uses non-alloyed ohmic contacts, a selective gate-recess etching process, and a single gate/source/drain metal deposition step to form both Schottky and ohmic contacts at the same time.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133080170","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Kaleta, C. Varmazis, P. Chinoy, J. Carney, N. Jansen, M. Loboda
{"title":"A two layer hermetic-like coating process for on-wafer encapsulation of GaAs MMICs","authors":"T. Kaleta, C. Varmazis, P. Chinoy, J. Carney, N. Jansen, M. Loboda","doi":"10.1109/GAAS.1995.528977","DOIUrl":"https://doi.org/10.1109/GAAS.1995.528977","url":null,"abstract":"We have developed a low-cost, manufacturable, 2-layer coating process for on-wafer encapsulation of GaAs MMICs. This packaging approach takes advantage of the low dielectric permittivity of polymers such as benzocyclobutene (BCB) and the sealing properties of ceramics such as SiC to provide both mechanical protection to MMICs during handling and also hermetic-like equivalence to moisture with predictable changes in the electrical performance of the coated MMICs. The effects of coatings on FET parameters, spiral inductors and a two stage X-Band LNA have been investigated. Results on FETs indicate that the internode capacitances Cgs and Cgd exhibited the same incremental change of 0.035 pF/mm (3 and 25% increase respectively), while Cds changed by 0.051 pF/mm (27% increase) with very minimal changes in the other FET parameters. The only observed change in spiral inductors was a 112% increase in Cp from 0.006 pF to 0.013 pF. The LNA exhibited a 1 GHz shift in frequency response from 7 to 11 GHz to 6 to 11 GHz with no substantial changes in gain and noise figure. Preliminary reliability investigations on coated devices did not show any failures after 150 hours in autoclave (120 C, 100% humidity).","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115369743","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Hur, R. A. McTaggart, B.W. LeBlanc, W. Hoke, P. Lemonias, A. B. Miller, T. Kazior, L. Aucoin
{"title":"Double recessed AlInAs/GaInAs/InP HEMTs with high breakdown voltages","authors":"K. Hur, R. A. McTaggart, B.W. LeBlanc, W. Hoke, P. Lemonias, A. B. Miller, T. Kazior, L. Aucoin","doi":"10.1109/GAAS.1995.528971","DOIUrl":"https://doi.org/10.1109/GAAS.1995.528971","url":null,"abstract":"A double recessed T-gate process has been successfully utilized to increase gate-to-drain breakdown voltages of double pulse doped AlInAs/GaInAs/InP HEMTs. By varying lateral channel dimensions, breakdown voltages in the range 11-19 V can be tailored with maximum channel currents in the range 450-600 mA/mm. This combination of high breakdown voltages and high channel currents indicate that the double recess process is a promising approach for high power applications.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133337540","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Bozada, D. Barlage, J. Barrette, R. Dettmer, M. Mack, J. S. Sewell, Glen D. Via, L. W. Yang, D. R. Helms, J. J. Komiak
{"title":"Microwave power heterojunction bipolar transistors fabricated with thermal shunt and bathtub","authors":"C. Bozada, D. Barlage, J. Barrette, R. Dettmer, M. Mack, J. S. Sewell, Glen D. Via, L. W. Yang, D. R. Helms, J. J. Komiak","doi":"10.1109/GAAS.1995.528983","DOIUrl":"https://doi.org/10.1109/GAAS.1995.528983","url":null,"abstract":"Heterojunction bipolar transistor devices and circuits were fabricated using thermal shunt and bathtub thermal management techniques. Broadband cascode MMICs exhibited 10-14 dB gain at an output power of 2.5-3.0 Watts across 7-11 GHz. A 200 /spl mu/m/sup 2/ common-emitter unit cell achieved 7-8 dB linear power gain and 40% power-added efficiency at a noise power ratio (NPR) of 18 dBc at 12 GHz. Under single tone measurements at 12 GHz, the unit cell achieved 52% power-added efficiency, with 9.5 dB linear gain, 8 dB power gain and 240 mW output power at 5 V bias.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128977932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The effects of hydrogen and deuterium incorporation on the electrical performance of a GaAs MESFET","authors":"D.C. Eng, R. Culbertson, K. Macwilliams","doi":"10.1109/GAAS.1995.528980","DOIUrl":"https://doi.org/10.1109/GAAS.1995.528980","url":null,"abstract":"A commercial GaAs MESFET annealed in 5% hydrogen showed shifts in its turn-on voltage and degradation in both its transconductance and drain current. Annealing in deuterium showed similar, though less extensive behavior, indicating that deuterium diffuses into the devices slower than hydrogen. A thin film diffusion experiment showed that the incorporation of hydrogen into the gate area is greatest when platinum is exposed to the hydrogen. Provides supporting evidence that diffusion of hydrogen occurs at the Pt sidewalls and not at the Au surface of the Au/Pt/Ti gate metal.","PeriodicalId":422183,"journal":{"name":"GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995","volume":"12 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124910752","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}