Laterally etched undercut (LEU) technique to reduce base-collector capacitances in heterojunction bipolar transistors

Abstract

We report a novel fabrication process aimed at reducing the parasitic junction capacitance of AlGaAs-GaAs heterojunction bipolar transistors. The process, named as the Laterally Etched Undercut (LEU) process, physically removes the extrinsic base-collector junction area and results in a cantilever structure. The DC, small-signal, and large-signal performances of the LEU devices are compared to those obtained from the conventional devices.