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2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)最新文献

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A noise and RTN-removal smart method for parameters extraction of CMOS aging compact models 一种基于噪声和rtn去噪的CMOS老化模型参数提取智能方法
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) Pub Date : 2018-03-19 DOI: 10.1109/ULIS.2018.8354740
J. Diaz-Fortuny, J. Martín-Martínez, R. Rodríguez, M. Nafría, R. Castro-López, E. Roca, F. Fernández
{"title":"A noise and RTN-removal smart method for parameters extraction of CMOS aging compact models","authors":"J. Diaz-Fortuny, J. Martín-Martínez, R. Rodríguez, M. Nafría, R. Castro-López, E. Roca, F. Fernández","doi":"10.1109/ULIS.2018.8354740","DOIUrl":"https://doi.org/10.1109/ULIS.2018.8354740","url":null,"abstract":"This work presents a new method to statistically characterize the emission times and threshold voltage shifts (ΔVth) related to oxide defects in nanometer CMOS transistors during aging tests. The method identifies the Vth drops associated to oxide trap emissions during BTI and HCI aging recovery traces while removing RTN and background noise contributions, to avoid artifacts during data analysis.","PeriodicalId":383788,"journal":{"name":"2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)","volume":"187 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124740713","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Steep slope negative capacitance FDSOI MOSFETs with ferroelectric HfYOx 具有铁电HfYOx的陡坡负电容FDSOI mosfet
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) Pub Date : 2018-03-19 DOI: 10.1109/ULIS.2018.8354733
Qinghua Han, T. C. U. Tromm, J. Schubert, S. Mantl, Qing-Tai Zhao
{"title":"Steep slope negative capacitance FDSOI MOSFETs with ferroelectric HfYOx","authors":"Qinghua Han, T. C. U. Tromm, J. Schubert, S. Mantl, Qing-Tai Zhao","doi":"10.1109/ULIS.2018.8354733","DOIUrl":"https://doi.org/10.1109/ULIS.2018.8354733","url":null,"abstract":"Steep slope negative capacitance MOSFETs with HfYOx ferroelectric on FDSOI were experimentally demonstrated. An average SS of 30 mV/dec was achieved over 3 decades of drain current. We found that the subthermal SS degrades with the sweeping numbers, which is assumed to be caused by the traps in the ferroelectric oxide layer.","PeriodicalId":383788,"journal":{"name":"2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123168713","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Near field scanning microwave microscope based on a coaxial cavity resonator for the characterization of semiconductor structures 基于同轴腔腔谐振腔的近场扫描微波显微镜用于半导体结构的表征
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) Pub Date : 2018-03-19 DOI: 10.1109/ULIS.2018.8354747
Bendehiba Abadlia Bagdad, F. Gámiz
{"title":"Near field scanning microwave microscope based on a coaxial cavity resonator for the characterization of semiconductor structures","authors":"Bendehiba Abadlia Bagdad, F. Gámiz","doi":"10.1109/ULIS.2018.8354747","DOIUrl":"https://doi.org/10.1109/ULIS.2018.8354747","url":null,"abstract":"In this work, we have designed, simulated and fabricated a near-field scanning microwave microscope based on a coaxial cavity resonator. The coaxial cavity resonator is fed by a Keysight N5242A PNA-X Network Analyzer. The inner conductor of the coaxial resonator is connected to a sharpened tungsten tip home-made in our Lab following an electrochemical process. The transmission coefficient S21, the resonance frequency fr and the quality factor Q are measured as the sharp tip is scanned over the device under test at a fixed sample-tip distance in the near field region. The variations of these parameters are related to the topographical and dielectric properties of a very small region of the material under the tip.","PeriodicalId":383788,"journal":{"name":"2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117018475","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design benefits of self-cascode configuration for analog applications in 28 FDSOI 自级联码配置在28 FDSOI模拟应用中的设计优势
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) Pub Date : 2018-03-01 DOI: 10.1109/ULIS.2018.8354768
L. d'Oliveira, M. de Souza, V. Kilchytska, D. Flandre
{"title":"Design benefits of self-cascode configuration for analog applications in 28 FDSOI","authors":"L. d'Oliveira, M. de Souza, V. Kilchytska, D. Flandre","doi":"10.1109/ULIS.2018.8354768","DOIUrl":"https://doi.org/10.1109/ULIS.2018.8354768","url":null,"abstract":"This paper showcases SPICE simulated results of single transistors and self-cascode (SC) associations of UTBB transistors from 28FDSOI technology by ST-Microelectronics with a focus on analog integrated circuit design. This comparison demonstrates significant improvement of the voltage gain for the SC association without compromising the transconductance, especially when featuring asymmetric threshold voltages (Asymmetric Self-Cascode — A-SC).","PeriodicalId":383788,"journal":{"name":"2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115435379","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Nanoindentation effects on the electrical caracterizaron in Ψ-MOSFET configuration 纳米压痕对Ψ-MOSFET结构电特性的影响
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) Pub Date : 2018-03-01 DOI: 10.1109/ULIS.2018.8354754
L. Benea, T. Cerba, M. Bawedin, C. Delacour, S. Cristoloveanu, I. Ionica
{"title":"Nanoindentation effects on the electrical caracterizaron in Ψ-MOSFET configuration","authors":"L. Benea, T. Cerba, M. Bawedin, C. Delacour, S. Cristoloveanu, I. Ionica","doi":"10.1109/ULIS.2018.8354754","DOIUrl":"https://doi.org/10.1109/ULIS.2018.8354754","url":null,"abstract":"The effect of probe-induced nanoindentation on the electrical transport in Ψ-MOSFET is presented. Systematic measurements were performed in order to evaluate the dependence of the drain current on the probe pressure in different operating regimes. This enabled to investigate the existence of the metallic Si-II crystallographic form of silicon, which emerges at high pressures and shows a significant impact in the accumulation regime.","PeriodicalId":383788,"journal":{"name":"2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)","volume":"147 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114647677","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Effects of stress and strain distribution on performance analysis of GaN/InGaN/GaN core/shell/shell radial nanowires for solar energy harvesting 应力应变分布对太阳能收集用GaN/InGaN/GaN芯/壳/壳径向纳米线性能分析的影响
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) Pub Date : 2018-03-01 DOI: 10.1109/ULIS.2018.8354746
S. Routray, T. Lenka
{"title":"Effects of stress and strain distribution on performance analysis of GaN/InGaN/GaN core/shell/shell radial nanowires for solar energy harvesting","authors":"S. Routray, T. Lenka","doi":"10.1109/ULIS.2018.8354746","DOIUrl":"https://doi.org/10.1109/ULIS.2018.8354746","url":null,"abstract":"In this paper the influence of stress and strain distribution on the performance of III-Nitride nanowire photovoltaic devices are investigated. The strain-induced polarization behavior of GaN/InxGa1−xN/GaN core/shell/shell triangular nanowire solar cell with {0001}, {1-10-1}, {−110-1} or {000-1}, {1-101}, {−1101} set of facets are intensively studied by numerical modeling. It is observed that nanowire solar cells possess an irregular pattern of polarization charges due to complex distribution of stress and strain parameters depending upon growth orientations. Finally, effect of polarization charges on optical and electrical performance of nanowire solar cell are investigated in detail. It reveals that stress and strain distribution in nanowires and its consequent polarization effects have favorable influence on III-Nitride NW photovoltaic devices. This numerical study demonstrates that the issues of self-induced electric field and crystal quality in III-Nitride planar solar cell can be overcome by recent state-of-the-art growth techniques of NWs.","PeriodicalId":383788,"journal":{"name":"2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134440105","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
InSb nanocrystals containing SOI structures: Preparation and properties 含SOI结构的InSb纳米晶体:制备与性能
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) Pub Date : 2018-03-01 DOI: 10.1109/ULIS.2018.8354773
I. Tyschenko, V. Volodin, A. Cherkov, V. Popov
{"title":"InSb nanocrystals containing SOI structures: Preparation and properties","authors":"I. Tyschenko, V. Volodin, A. Cherkov, V. Popov","doi":"10.1109/ULIS.2018.8354773","DOIUrl":"https://doi.org/10.1109/ULIS.2018.8354773","url":null,"abstract":"The InSb nanocrystals embedded in buried SiO2 layer of a SOI structure were obtained by the In+ and Sb+ ion implantation into the SiO2 layers thermally grown on Si wafers followed by the hydrogen transfer of a Si film and high-temperature annealing. Transmission electron microscopy, Raman spectroscopy and photoluminescence (PL) were used to study the structure properties. The spherical shaped InSb nanocrystals bimodal size-distributed on the depth close to ion profiles were obtained. The TO-LO splitting was obtained in the Raman spectra from the InSb nanocrystals. The effect of both phonon quantum confinement and stresses on the phonon frequency shift was calculated. The obtained PL peak at the 1524 nm (0.81 eV) corresponds to the localized electron and hole energy in the InSb nanocrystals of about 13 nm size.","PeriodicalId":383788,"journal":{"name":"2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133642439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
28 FDSOI analog and RF Figures of Merit at cryogenic temperatures 低温下的28个FDSOI模拟值和RF值
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) Pub Date : 2018-03-01 DOI: 10.1109/ULIS.2018.8354735
B. K. Esfeh, M. Masselus, N. Planes, M. Haond, J. Raskin, D. Flandre, V. Kilchytska
{"title":"28 FDSOI analog and RF Figures of Merit at cryogenic temperatures","authors":"B. K. Esfeh, M. Masselus, N. Planes, M. Haond, J. Raskin, D. Flandre, V. Kilchytska","doi":"10.1109/ULIS.2018.8354735","DOIUrl":"https://doi.org/10.1109/ULIS.2018.8354735","url":null,"abstract":"This work presents a detailed characterization of 28 nm FDSOI CMOS process at cryogenic temperatures. Electrostatic, Analog and RF Figures of Merit (FoM) are studied for the first time to our best knowledge. At cryogenic temperatures, 20–70% enhancement of drain current, Id, and maximum transconductance, gm_max, values as well as up to 100 GHz increase of cut-off frequency, fT, are demonstrated. Temperature behavior of analog and RF FoMs is discussed in terms of mobility and series resistance effect. This first study suggests 28FDSOI as a good contender for future read-out electronics around qubits.","PeriodicalId":383788,"journal":{"name":"2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116245497","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
On the impact of channel compositional variations on total threshold voltage variability in nanoscale InGaAs MOSFETs 沟道组成变化对纳米InGaAs mosfet中总阈值电压变化的影响
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) Pub Date : 2018-03-01 DOI: 10.1109/ULIS.2018.8354745
N. Zagni, F. Puglisi, P. Pavan, G. Verzellesi
{"title":"On the impact of channel compositional variations on total threshold voltage variability in nanoscale InGaAs MOSFETs","authors":"N. Zagni, F. Puglisi, P. Pavan, G. Verzellesi","doi":"10.1109/ULIS.2018.8354745","DOIUrl":"https://doi.org/10.1109/ULIS.2018.8354745","url":null,"abstract":"In this paper we present an analysis of the impact of channel compositional variations on the total threshold voltage variability in nanoscale III-V MOSFETs. The analysis is carried out on a template Dual-Gate Ultra-Thin Body (DG-UTB) MOSFET through TCAD simulations in Sentaurus by Synopsys. The Impedance Field Method (IFM) is employed to evaluate statistical variability for five different sources: Random Dopant Fluctuation (RDF), Work Function Fluctuation (WFF), Body- and Gate-Line Edge Roughness (B-LER and G-LER) and Band Gap Fluctuation (BGF). BGF arises due to the compositional variations of Indium in the compound semiconductor composing the channel, namely InGaAs. Our analysis shows that, by appropriately modeling band gap fluctuations, it is possible to identify a worst-case total relative Vt variability for different amounts of Indium mole fraction variations, providing technologists with an important reference. Side-effects of channel compositional variations on other variability sources are evaluated as well, and are found to have a non-negligible impact on B-LER only.","PeriodicalId":383788,"journal":{"name":"2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126218723","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Scaling down a level shifter circuit in 28 nm FDSOI technology 28纳米FDSOI技术中电平移位电路的缩小
2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) Pub Date : 2018-03-01 DOI: 10.1109/ULIS.2018.8354772
Saikat Chatterjee, U. Rückert
{"title":"Scaling down a level shifter circuit in 28 nm FDSOI technology","authors":"Saikat Chatterjee, U. Rückert","doi":"10.1109/ULIS.2018.8354772","DOIUrl":"https://doi.org/10.1109/ULIS.2018.8354772","url":null,"abstract":"In this work, we used a Pareto front based scaling method to reproduce a level shifter circuit in 28nm FDSOI technology. We selected propagation delay, switching energy, static power dissipation and noise margin, to evaluate the circuit performance and optimize the scale down procedure. The final result showed a set of transistor dimensions, which ensured a desired performance of the level shifter circuit in 28nm fully depleted silicon-on-insulator (FDSOI) technology from ST Microelectronics. The circuit can operate correctly for supply voltages from 250 mV to 1V. The propagation delay of the level shifter is 3.11ns and the static power dissipation is 265 pW. The results contain the comparison of the transistor dimensions across different technologies.","PeriodicalId":383788,"journal":{"name":"2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114336428","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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