{"title":"Heat conduction in composites of thermally dissimilar materials - a methodology to economize numerical heat transfer analysis of electronic components","authors":"W. Nakayama","doi":"10.1109/EMAP.2005.1598276","DOIUrl":"https://doi.org/10.1109/EMAP.2005.1598276","url":null,"abstract":"The purpose of this study is to develop a set of guides regarding modeling of heat conduction process in electronic components. In the analysis of transient heat conduction in printed circuit boards, the assumption of quasi-steady state is permissible in a certain range of heat generation frequency and a spatial range removed from the heat source. To demarcate a parametric zone for quasi-steady state analysis a model is devised so as to allow classical analytical solution by exploiting radically different thermal properties of resin and copper. A similar approximate analysis is applied to a steady heat conduction problem where high-conductivity and low-conductivity tiles are laid out in mosaic patterns. The solution on this model provides a guide regarding the sensitivity of the heat source temperature on the spatial resolution of composite structure in numerical analysis.","PeriodicalId":352550,"journal":{"name":"2005 International Symposium on Electronics Materials and Packaging","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115044300","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Evaluation of thermal deformation behavior in electronic package using UV moire interferometry","authors":"Jin-Hyoung Park, Soon-Bok Lee","doi":"10.1109/EMAP.2005.1598263","DOIUrl":"https://doi.org/10.1109/EMAP.2005.1598263","url":null,"abstract":"In recent years, moire interferometry method has been used extensively in the electronics industry to determine thermal strains caused by temperature changes in microelectronics devices. The size of a flip-chip package has getting smaller. To measure thermal deformations of these small flip-chips, instruments with much higher resolution are required. Many researchers have tried to achieve this resolution enhancement of moire interferometry by using a phase-shifting method. But the phase-shifting method has physical limitations. Fundamentally to get higher resolution, the laser source should be changed. In this article, we constructed a moire interferometry system by utilizing an ultraviolet laser (/spl lambda/=325nm). This UV system realizes higher resolution than He-Ne (/spl lambda/=633nm) system. And we apply this system to evaluate thermal deformation in flip-chip package.","PeriodicalId":352550,"journal":{"name":"2005 International Symposium on Electronics Materials and Packaging","volume":"330 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114516524","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A study of hot spot in silicon device for stacked die packages","authors":"J. Akiyama, M. Naeshiro, M. Amagai","doi":"10.1109/EMAP.2005.1598268","DOIUrl":"https://doi.org/10.1109/EMAP.2005.1598268","url":null,"abstract":"Stacked die packages are currently used for mobile phones, digital cameras etc as a system-in-package, which includes memory and processor, the other ICs. A memory die is mounted on a processor die using an isolation material (silicon spacer or organic materials) in a package. Small hot spots of silicon devices are serious concern for device function errors, for instance, the difference of 30 degrees in a device affects device access speed error, etc. To study hot spots in a device, a thermal TEG chip, window tunnel and thermal simulation tool were used. After small hot spots were made in the thermal TEG chip packaged with a stacked die package, temperature differences in the device as a function of hot spot sizes were measured. After observing the correlation between experiments and models, a variety of stacked die package designs was studied for hot spot issue. For instance, the effect of die sizes, die thickness, spacer sizes, package types and material properties on thermal performance considering hot spot sizes. The study suggests stacked die package structures and material properties affect hot spot and thermal performance for stacked die packages. The results and explanation are described in this paper.","PeriodicalId":352550,"journal":{"name":"2005 International Symposium on Electronics Materials and Packaging","volume":"459 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121836069","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Formation and characterization of sputtered thin film for optimizing multilayered interconnection structure","authors":"W. Sashida, Y. Kimura","doi":"10.1109/EMAP.2005.1598257","DOIUrl":"https://doi.org/10.1109/EMAP.2005.1598257","url":null,"abstract":"UBM (under barrier metal) mounted in multilayered interconnection structure is thin film using to prevent counter diffusion between semiconductor substrate and metal line, in connection with multilayered and minute structure, thickness of UBM becomes an issue. Evaluation of UBM with the use of TEG (test element grid) chip was conducted. TEG chip is a unit device that decollates elemental structure of circuit from LSI. With the use of TEG chip, various evaluations concerning LSI structure can be easily conducted. For these reasons, the purposes of this research are to design and to manufacture TEG chip, which have relatively simple multilayered interconnection structure, and also, examinations of optimal material such as Ti-W and morphology of UBM for obtaining superior electro-migration resistance were conducted.","PeriodicalId":352550,"journal":{"name":"2005 International Symposium on Electronics Materials and Packaging","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125363230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"In situ observation of interfacial fracture in low-dimensional nanostructures","authors":"Y. Takahashi, H. Hirakata, T. Kitamura","doi":"10.1109/EMAP.2005.1598235","DOIUrl":"https://doi.org/10.1109/EMAP.2005.1598235","url":null,"abstract":"In order to quantitatively evaluate the interface strength of low-dimensional nanoscale components, a fracture test has been performed in a TEM (transmission electron microscope) using a special holder equipped with a small loading apparatus. The loading apparatus, which involves a 3D piezoelectric tube and a special load sensor placed behind the loading tip, allows precise control of the loading point and the measurement of infinitesimal fracture load. A low-dimensional nanoscale component with interface edges has been fabricated from a multi-layered material using FIB (focused ion beam). With this testing system, an in situ observation of crack initiation from the interface edge of low-dimensional SiN/Cu lines has been successfully implemented along with a quantitative measurement of the fracture load. Using the information obtained from the fracture test, the stress field around the SiN/Cu interface edge has been analytically evaluated.","PeriodicalId":352550,"journal":{"name":"2005 International Symposium on Electronics Materials and Packaging","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131144400","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Wong Shaw Fong, L. W. Keat, Lee Yung Hsiang, Yap Eng Hooi, Wong Siang Woen, Hin Tze Yang, M. We
{"title":"Dynamic characterization study of flip chip ball grid array (FCBGA) on peripheral component interconnect (PCI) board application","authors":"Wong Shaw Fong, L. W. Keat, Lee Yung Hsiang, Yap Eng Hooi, Wong Siang Woen, Hin Tze Yang, M. We","doi":"10.1109/EMAP.2005.1598243","DOIUrl":"https://doi.org/10.1109/EMAP.2005.1598243","url":null,"abstract":"This paper outlines and discusses the new mechanical characterization metrologies applied on PCI board envelope. 'The dynamic responses of PCI board were monitored and characterized using accelerometer and strain gauges. PCI board performances were analyzed to differentiate its high risk areas through analysis of board strain responses to solder joint crack. Board \"strain states\" analysis methodology was introduced to provide immediate accurate board bending modes and deflection associated with experimental results. Using this methodology, it eases the board bend mode analysis which can capture the board strain performance limit at the same time. In addition, high speed camera (HSC) tool was incorporated into the evaluation to understand the boards bend history under shock test. This allows better view of the bending moment and matching to defect locations for corrective action implementation. Detailed failure analysis mapping of solder joint crack percentages was successfully gathered to support those findings. Key influences, such as thermal/mechanical enabling preload masses and shock input profiles on solder joint crack severity were conducted as well to understand the potential risk modulators for SJR performance. Furthermore, commercial simulation software analysis tool was applied to correlate the board's bend modes and predict the high risk solder joint location; which is important for product enabling solutions design. As a result, a system level stiffener solution was designed. Hence, with this characterization and validation concept, a practical stiffener solution for PCI application was validated through a special case study to improve the board SJR performance in its use condition.","PeriodicalId":352550,"journal":{"name":"2005 International Symposium on Electronics Materials and Packaging","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125336144","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Simulation of tensile deformation behavior of polymer by chain network model","authors":"A. Shinozaki, K. Kishimoto, H. Inoue","doi":"10.1109/EMAP.2005.1598252","DOIUrl":"https://doi.org/10.1109/EMAP.2005.1598252","url":null,"abstract":"Polymeric materials are used in semiconductors. In these days semiconductors are progressed rapidly. Some new packages are produced. The progress enables to reduction in size and weight, but needs improvements of several properties of polymeric materials at the same time. In this study, improvement of mechanical properties is focused. The mechanical properties of polymeric materials are strongly influenced by meso-scale (10/sup -9//spl sim/10/sup -3/ m) structure such as entanglement, orientation, molecular weight distribution, or chain branch, etc. However, the relationship between the meso-scale structure and macro-scale mechanical properties of polymers has not been clarified. The difficulties plaguing the task of probing the basic mechanisms governing polymer behavior stem from the complexities of the meso-scale structure that dominates the response of the material. Some complexities, chain entanglement, chain slip, and Van der Waals' force, make direct experimental identification of these mechanisms extremely difficult. In these days, many studies about problem of properties of polymer have been made by molecular dynamics. It is possible to clear the detail atomic behaviors of polymeric materials On the contrary; it is not easy to simulate the meso-scale molecular chain behaviors, because of ungodly amount of computational time. In this paper, network models of molecular chains which make easy to compose the meso-scale structure, introduced to simulate the meso-scale interactions. Some network models of molecular chains are constructed. These models have different structures. Large strain deformation of these network models is evolved via the molecular dynamics analysis improved by us.","PeriodicalId":352550,"journal":{"name":"2005 International Symposium on Electronics Materials and Packaging","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131231611","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reliability assessments of BGA solder joints under cyclic bending loads","authors":"Il-ho Kim, Soon-Bok Lee","doi":"10.1109/EMAP.2005.1598230","DOIUrl":"https://doi.org/10.1109/EMAP.2005.1598230","url":null,"abstract":"Mobile products, such as cellular phones, PDA and notebook, are subjected to many different mechanical loads, which include bending, twisting, impact shock and vibration. In this study, a cyclic bending test of the BGA package was performed to evaluate the fatigue life. Special bending tester, which was suitable for electronic package, was developed using an electromagnetic actuator. A nonlinear finite element model was used to simulate the mechanical bending deformation of solder joint in BGA packages. The fatigue life of lead-free (95.5Sn4.0Ag0.5Cu) solder joints was compared with that of lead-contained (63Sn37Pb). When the applied load to the specimen is small, the lead-free solder has longer fatigue life than lead-contained solder.","PeriodicalId":352550,"journal":{"name":"2005 International Symposium on Electronics Materials and Packaging","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114494460","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Effects of Au and Ni layer thicknesses on the reliability of BGA solder joints","authors":"M. O. Alam, Y. Chan, L. Rufer","doi":"10.1109/EMAP.2005.1598241","DOIUrl":"https://doi.org/10.1109/EMAP.2005.1598241","url":null,"abstract":"A systematic experimental work has been carried out to understand the mechanism of Au diffusion to the solder interface as well as to investigate the effect of Au and Ni layer thickness on the reliability of BGA solder joint. BGA solder balls of Sn-37wt%Pb has been bonded on BGA solder bond pads of Au/electrolytic Ni/Cu by reflowing at 225/spl deg/C for 0.5 minutes. The thickness of the Ni layer was varied from 0.35 mm to 2.8 mm and the thickness of Au was varied from 0.1 mm to 1.3 mm. Solid state aging up to 1000 h at 150/spl deg/C have been carried out to simulate the ultimate interfacial reactions during an operation life of electronics devices. Cross-sectional studies of interfaces have been conducted by scanning electron microscopy (SEM) equipped with an energy dispersive X-ray (EDX) analysis to investigate the interfacial reaction phenomena. Ball shear tests have been carried out to obtain the interfacial strength and to correlate with the interfacial reaction products. After the shear tests, fracture surfaces have also been investigated to understand the fracture modes.","PeriodicalId":352550,"journal":{"name":"2005 International Symposium on Electronics Materials and Packaging","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128415345","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Optimization of epoxy flow for passive alignment of optical fiber arrays","authors":"J. Lo, C. Li, C. L. Tai, S. Lee","doi":"10.1109/EMAP.2005.1598249","DOIUrl":"https://doi.org/10.1109/EMAP.2005.1598249","url":null,"abstract":"Alignment is very critical in optoelectronic packaging and slightly offset in any direction will affect the performance of the whole system. Optical fiber is one of the most commonly used as light transmitting medium. It is usually coupled with different components such as light source, photo-detector and waveguides. As the core diameter of glass optical fiber is usually small, active alignment is used to ensure the alignment. However, the equipment cost of active alignment is very high and the process time is long. This makes the whole alignment process very expensive and ineffective as stated in M. F. Dautartas et al. (2002) and M. W. Beranek et al. (2000). Recently, passive alignment by utilizing precisely etched V-grooves is getting more common due to its low cost and short cycle time based in P. Karioja et al. (2000) and K. Yamauchi et al. (2000). During the passive alignment process, the optical fiber may be lifted up by the buoyancy of the epoxy and hence an extra covering plate is normally required to press the fibers against the wall of V-grooves. The extra plate may introduce several problems. In this paper, an innovative method of dispensing the epoxy is presented. This introduces the self-alignment capability to the conventional passive alignment method. Also by using the new method, the extra covering plate is not required. It is found that the amount of epoxy dispensed is critically in the process. Also the viscosity of the epoxy determines the flow and hence affects the results. In this paper, the effect of the volume and viscosity of epoxy is studied. From the experimental results, the modified passive alignment method is capable of aligning multiple fibers on fiber arrays up to 8 channels up to 1 micron.","PeriodicalId":352550,"journal":{"name":"2005 International Symposium on Electronics Materials and Packaging","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124770858","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}