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2009 IEEE International Interconnect Technology Conference最新文献

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New multi-step UV curing process for porogen-based porous SiOC 多孔SiOC的多步紫外固化新工艺
2009 IEEE International Interconnect Technology Conference Pub Date : 2009-06-01 DOI: 10.1109/IITC.2009.5090352
K. Seo, Y. Oka, Kotaro Nomura, M. Tsutsue, E. Kobori, K. Goto, Y. Mizukami, T. Ohtsuka, K. Tsukamoto, S. Matsumoto, T. Ueda
{"title":"New multi-step UV curing process for porogen-based porous SiOC","authors":"K. Seo, Y. Oka, Kotaro Nomura, M. Tsutsue, E. Kobori, K. Goto, Y. Mizukami, T. Ohtsuka, K. Tsukamoto, S. Matsumoto, T. Ueda","doi":"10.1109/IITC.2009.5090352","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090352","url":null,"abstract":"In order to control the characteristics of porogen-based porous SiOC film (k ≪ 2.5), we investigated its dependence on the wavelengths of ultraviolet (UV) light by using methods of FT-IR, TDS and nano-indentation. As a result, it was found that specific wavelengths of UV light strongly was effective to porous SiOC film production : porogen desorption, mechanical strength improvement, and reduction of the film damage. Vacuum ultraviolet (VUV) irradiation is necessary for porogen desorption. However, after porogen was removed from SiOC film, the energy of VUV irradiation was too high for porous SiOC film and this caused film damage. The energy of deep ultraviolet (DUV) irradiation was sufficient to improve mechanical strength. We propose that UV curing process should be a multi-step process consisting of VUV and DUV irradiation (Figure 1). The first step removes porogen using VUV irradiation. The second step forms robust porous SiOC film using DUV irradiation. A multi-step curing process was used to control the characteristics of porogen-based porous SiOC film.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"94 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114236577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Novel PEALD-Ru formation technique using H2 & H2/N2 plasma as a seed layer for direct CVD-Cu filling 利用H2和H2/N2等离子体作为种子层直接填充CVD-Cu的新型PEALD-Ru形成技术
2009 IEEE International Interconnect Technology Conference Pub Date : 2009-06-01 DOI: 10.1109/IITC.2009.5090350
D. Jeong, Hiroaki Inoue, Yoshiyuki Ohno, K. Namba, H. Shinriki
{"title":"Novel PEALD-Ru formation technique using H2 & H2/N2 plasma as a seed layer for direct CVD-Cu filling","authors":"D. Jeong, Hiroaki Inoue, Yoshiyuki Ohno, K. Namba, H. Shinriki","doi":"10.1109/IITC.2009.5090350","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090350","url":null,"abstract":"In this paper, novel Ru film formation technique by plasma enhanced atomic layer deposition (PEALD) is reported to be extremely promising as a seed layer for direct CVD-Cu full filling. PEALD-Ru film property can be controlled by H<inf>2</inf> to N<inf>2</inf> gas flow ratio in plasma step. PEALD-Ru film using H<inf>2</inf>/N<inf>2</inf> mixed gas based plasma can provide low resistivity (20µΩ-cm), sufficient Cu barrier property and 100% step-coverage. PEALD-Ru film using H<inf>2</inf> gas based plasma can provide (002) oriented Ru film, which is confirmed as good nucleation layer for CVD-Cu formation. Stacked film of Ru(H<inf>2</inf>)/ Ru(H<inf>2</inf>/N<inf>2</inf>) is demonstrated to be attractive as an underneath for direct CVD-Cu full filling without void generation in 50 nm via pattern.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114948532","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A new perspective of barrier material evaluation and process optimization 阻隔材料评价与工艺优化的新视角
2009 IEEE International Interconnect Technology Conference Pub Date : 2009-06-01 DOI: 10.1109/IITC.2009.5090389
L. Zhao, Zsolt Tikei, Gianni Giai Gischia, H. Volders, G. Beyer
{"title":"A new perspective of barrier material evaluation and process optimization","authors":"L. Zhao, Zsolt Tikei, Gianni Giai Gischia, H. Volders, G. Beyer","doi":"10.1109/IITC.2009.5090389","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090389","url":null,"abstract":"A novel test structure based on a planar capacitor design has been used for advanced barrier material evaluation and process optimization. This structure enables intrinsic reliability study of Cu/low-k interconnects. Various barrier materials such as CuMn self-forming barrier, ALD Ru, and PVD TaNTa on different dielectric films have been investigated to understand their intrinsic limits of barrier performance. The learning generated from the novel test structure has been directly used for barrier optimization of dual damascene processes.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115149318","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
Characterization of Low-k SiOCH Layers in fine-pitch Cu-damascene interconnects by monoenergetic positron beams 用单能正电子束表征细间距Cu-damascene互连中的低k SiOCH层
2009 IEEE International Interconnect Technology Conference Pub Date : 2009-06-01 DOI: 10.1109/IITC.2009.5090344
A. Uedono, N. Inoue, Y. Hayashi, K. Eguchi, T. Nakamura, Y. Hirose, M. Yoshimaru, N. Oshima, T. Ohdaira, R. Suzuki
{"title":"Characterization of Low-k SiOCH Layers in fine-pitch Cu-damascene interconnects by monoenergetic positron beams","authors":"A. Uedono, N. Inoue, Y. Hayashi, K. Eguchi, T. Nakamura, Y. Hirose, M. Yoshimaru, N. Oshima, T. Ohdaira, R. Suzuki","doi":"10.1109/IITC.2009.5090344","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090344","url":null,"abstract":"Pore characteristics of SiOCH layers in fine-pitch Cu-damascene interconnects were studied using monoenergetic positron beams. Doppler broadening spectra of the annihilation radiation and lifetime spectra of positrons were measured for the samples fabricated with the line/space widths of 0.27/0.27 and 1.08/1.08 µm, respectively. From measurements of the positronium (Ps) lifetimes, the mean pore size was estimated. The Ps intensity in SiOCH was found to be decreased by the scaling, which was attributed to the damage introduced during the damascene process.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116324973","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The integration of SWNTs with CMOS IC after covering Nickel/Gold on the Aluminum electrodes 在铝电极上覆盖镍/金后，将单壁碳纳米管与CMOS IC集成
2009 IEEE International Interconnect Technology Conference Pub Date : 2009-06-01 DOI: 10.1109/IITC.2009.5090378
Jung-Tang Huang, Kai-Yuan Jenq, Po-Chin Lin, Hou-Jun Hsu, T. Tsai, Ching-Kong Chen
{"title":"The integration of SWNTs with CMOS IC after covering Nickel/Gold on the Aluminum electrodes","authors":"Jung-Tang Huang, Kai-Yuan Jenq, Po-Chin Lin, Hou-Jun Hsu, T. Tsai, Ching-Kong Chen","doi":"10.1109/IITC.2009.5090378","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090378","url":null,"abstract":"This paper presents the interconnection of single -walled carbon nanotube (SWNT) between electrodes on a CMOS integrated circuit chip made by TSMC 0.35µm CMOS process. Alternating current dielectrophoretic force (AC-DEP) method is employed to micro-electrode that makes SWNTs deposited between electrodes. Using Electroless Nickel and Immersion Gold to cover the electrodes of Al could really increase the current more than 3 orders when SWNTs are connected between electrodes.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132833272","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Challenges of Ultra low-k integration in BEOL interconnect for 45nm and beyond 45纳米及以上BEOL互连超低k集成的挑战
2009 IEEE International Interconnect Technology Conference Pub Date : 2009-06-01 DOI: 10.1109/IITC.2009.5090403
H. Liu, J. Widodo, S. L. Liew, Z. H. Wang, Y. H. Wang, B. Lin, L. Wu, C. Seet, W. Lu, C. H. Low, W. Liu, M. S. Zhou, L. Hsia
{"title":"Challenges of Ultra low-k integration in BEOL interconnect for 45nm and beyond","authors":"H. Liu, J. Widodo, S. L. Liew, Z. H. Wang, Y. H. Wang, B. Lin, L. Wu, C. Seet, W. Lu, C. H. Low, W. Liu, M. S. Zhou, L. Hsia","doi":"10.1109/IITC.2009.5090403","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090403","url":null,"abstract":"This paper presents some major integration challenges in Ultra low-k (ULK) Back-End-Of-Line (BEOL) interconnects for 45nm and beyond. The discussions mainly address the challenges that arise from ultra violet (UV) curing that cause changes in the composition of Nitrogen doped Silicon Carbide (SiCN), poor mechanical strength of ULK, Reactive Ion Etching (RIE) and barrier deposition plasma induced damage at the sidewall and the bottom of the trench, and gap-fill limitation of the copper (Cu) process. The physical characterization and Resistance-Capacitance (RC) results of the ULK integration are also presented.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124861562","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Thin-layer Au-Sn solder bonding process for wafer-level packaging, electrical interconnections and MEMS applications 用于晶圆级封装、电气互连和MEMS应用的薄层Au-Sn焊接工艺
2009 IEEE International Interconnect Technology Conference Pub Date : 2009-06-01 DOI: 10.1109/IITC.2009.5090361
N. Belov, T. Chou, J. Heck, K. Kornelsen, D. Spicer, S. Akhlaghi, M. Wang, T. Zhu
{"title":"Thin-layer Au-Sn solder bonding process for wafer-level packaging, electrical interconnections and MEMS applications","authors":"N. Belov, T. Chou, J. Heck, K. Kornelsen, D. Spicer, S. Akhlaghi, M. Wang, T. Zhu","doi":"10.1109/IITC.2009.5090361","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090361","url":null,"abstract":"The developed bonding process utilizes AuSn solder and provides liquid-proof sealing and multiple reliable electrical connections between the bonded wafers. The bond can withstand 300°C and features a thin bond line (2–3 µm), high bond strength, excellent bond gap control, and low stress due to small amount of bonding material. A Nb/Au seed layer was shown to be an optimal adhesion and barrier film.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130104169","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 32
The effects of dielectric slots on Copper/Low-k interconnects reliability 介质槽对铜/低k互连可靠性的影响
2009 IEEE International Interconnect Technology Conference Pub Date : 2009-06-01 DOI: 10.1109/IITC.2009.5090349
A. Heryanto, Y. K. Lim, K. Pey, W. Liu, J.B. Tan, D. Sohn, L. Hsia
{"title":"The effects of dielectric slots on Copper/Low-k interconnects reliability","authors":"A. Heryanto, Y. K. Lim, K. Pey, W. Liu, J.B. Tan, D. Sohn, L. Hsia","doi":"10.1109/IITC.2009.5090349","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090349","url":null,"abstract":"The effects of dielectric slots on Cu/Low-k interconnects reliability were studied. Dielectric slots were proven to be effective in suppressing stress-induced void failure but their impact on EM reliability was found to be minimal. Physical failure analysis and finite element simulations were used to explain the possible mechanisms associated to the different effects of dielectric slots on Cu/low-k reliability.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127526725","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
3D technologies: Requiring more than 3 dimensions from concept to product 3D技术:从概念到产品需要超过3个维度
2009 IEEE International Interconnect Technology Conference Pub Date : 2009-06-01 DOI: 10.1109/IITC.2009.5090340
B. Swinnen
{"title":"3D technologies: Requiring more than 3 dimensions from concept to product","authors":"B. Swinnen","doi":"10.1109/IITC.2009.5090340","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090340","url":null,"abstract":"Future 3D products are envisioned to be smaller, more performing, more versatile in functionality, less power hungry and less costly than their 2D counterparts. Delivering that promise requires a multi faceted view on the product needs, technology and design requirements, equipment & materials developments and supply chain. This paper discusses the 3D product views and the need for standardization that enables technology roadmapping. The paper also presents an overview of selected 3D technology developments and related challenges to equipment and material needs.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131512312","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Ruthenium films deposited under H2 by MOCVD using a novel liquid precursor 采用新型液相前驱体在H2条件下MOCVD制备钌膜
2009 IEEE International Interconnect Technology Conference Pub Date : 2009-06-01 DOI: 10.1109/IITC.2009.5090380
T. Kadota, C. Hasegawa, Hiroshi Nihei
{"title":"Ruthenium films deposited under H2 by MOCVD using a novel liquid precursor","authors":"T. Kadota, C. Hasegawa, Hiroshi Nihei","doi":"10.1109/IITC.2009.5090380","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090380","url":null,"abstract":"Ruthenium thin films were deposited under H2 using a novel liquid Ru precursor, bis(acetylacetonato)(η4-1,5-hexadiene)ruthenium, Ru(acac)2(hd). The resisitivity, cross section and surface morphology of the deposited Ru films were examined. The Ru films had a relatively low resistivity of about 90 µΩ·cm at 270°C. X-ray photoelectron spectroscopy (XPS) showed that the Ru films contained no carbon and oxygen impurities. The Ru film surface was fairly smooth, as measured by atomic force microscopy (AFM). The root-mean-square (RMS) roughness of the Ru films was 0.34nm. No incubation time of the formation of the Ru films was observed. The activation energy of the formation of the Ru films was found to be 0.51eV on the SiO2/Si substrates.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131582229","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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