发布求助
文献互助 智能选刊 最新文献

Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting最新文献

筛选
英文 中文
An ultra-shallow link base for a double polysilicon bipolar transistor 一种用于双多晶硅双极晶体管的超浅连接基
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274075
J. Hayden, J. Burnett, J.R. Pfiester, M. Woo
{"title":"An ultra-shallow link base for a double polysilicon bipolar transistor","authors":"J. Hayden, J. Burnett, J.R. Pfiester, M. Woo","doi":"10.1109/BIPOL.1992.274075","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274075","url":null,"abstract":"A techinque is presented for forming an ultrashallow link base in a double polysilicon bipolar transistor. This method is easily integrated into an advanced BiCMOS process, making use of a disposable polysilicon spacer technology for MOSFET lightly doped drain (LDD) formation. It makes use of the diffusion of boron from a disposable polysilicon spacer, through a thin thermal oxide layer to the underlying silicon. A very shallow link base is thus formed, allowing independent optimization of the active and link base regions. This improves the trade-off between base-emitter breakdown and base resistance and results in improved bipolar performance.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115068348","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A self-aligned emitter base NiSi electrode technology for advanced high-speed bipolar LSIs 一种用于高速双极lsi的自对准射极基极NiSi电极技术
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274076
T. Iinuma, N. Itoh, K. Inou, H. Nakajima, S. Matsuda, I. Kunishima, K. Suguro, Y. Katsumata, H. Iwai
{"title":"A self-aligned emitter base NiSi electrode technology for advanced high-speed bipolar LSIs","authors":"T. Iinuma, N. Itoh, K. Inou, H. Nakajima, S. Matsuda, I. Kunishima, K. Suguro, Y. Katsumata, H. Iwai","doi":"10.1109/BIPOL.1992.274076","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274076","url":null,"abstract":"The characteristics of double polysilicon self-aligned bipolar transistors with advanced 0.4- mu m NiSi salicide base electrodes are reported. Since NiSi/polysilicon contact resistance is lower than that of TiSi/sub 2//polysilicon and the process temperature is lower, the result is a high-performance bipolar device. A very low base resistance of 91 Omega was obtained.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116470843","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Tailoring interfacial oxide for polysilicon bit-cell contacts and emitters with in situ vapor HF interface cleaning and polysilicon deposition in a 4 Mbit BiCMOS fast static RAM 为多晶硅位单元触点和发射器量身定制界面氧化物，在4 Mbit BiCMOS快速静态RAM中进行原位蒸汽HF界面清洁和多晶硅沉积
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274078
Fred Walczyk, Craig Lage, Vidya Kaushik, Mike Blackwell
{"title":"Tailoring interfacial oxide for polysilicon bit-cell contacts and emitters with in situ vapor HF interface cleaning and polysilicon deposition in a 4 Mbit BiCMOS fast static RAM","authors":"Fred Walczyk, Craig Lage, Vidya Kaushik, Mike Blackwell","doi":"10.1109/BIPOL.1992.274078","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274078","url":null,"abstract":"A cluster-tool-based technique for in situ vapor HF cleaning, ultrathin oxide growth and polysilicon deposition is compared to conventional processing in forming polysilicon emitters and polysilicon bit-cell contacts in a 4-Mb/0.5- mu m BiCMOS fast static RAM (FSRAM) process. The in situ processing techniques involve removing native oxide with vapor HF, optionally growing several monolayers of thermal interfacial oxide and depositing a polysilicon film using a load-locked multichamber cluster tool. The authors have examined the capability of this process for producing low bit-cell contact resistance while tailoring bipolar gain through the use of a thin interfacial oxide. Results are reported which indicate that the control achieved with cluster tool processing provides greater flexibility in simultaneously optimizing the performance of the polysilicon emitters and bit-cell contacts.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114590114","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
New models for the simulation of polysilicon impurity diffusion sources for a wide range of process conditions 模拟多晶硅杂质扩散源的新模型适用于广泛的工艺条件
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274068
S. Kamohara, T. Kobayashi, M. Sugaya, S. Yamamoto
{"title":"New models for the simulation of polysilicon impurity diffusion sources for a wide range of process conditions","authors":"S. Kamohara, T. Kobayashi, M. Sugaya, S. Yamamoto","doi":"10.1109/BIPOL.1992.274068","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274068","url":null,"abstract":"New physical models of polysilicon impurity diffusion sources that are applicable for a wide range of process conditions are proposed for bipolar process simulations. These models address the specific dependencies of polysilicon impurity redistribution on process conditions. The models are described by simple phenomenological equations, including impurity segregation at the grain boundaries, grain growth, and impurity diffusion both at the grain boundaries and within the grains. The parameter values used in these equations are determined by comparison between the experimental results and theoretical calculations, which are independent of the process conditions. The authors have simulated impurity diffusion in polycrystalline Si for a wide range of process conditions, and good agreement was achieved with experimental results.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127139002","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Proton implantation in lateral IGBTs 侧位igbt的质子植入
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274072
T. Chow, D. Pattanayak, A. Mogro-Campero, B. Baliga, M. Adler
{"title":"Proton implantation in lateral IGBTs","authors":"T. Chow, D. Pattanayak, A. Mogro-Campero, B. Baliga, M. Adler","doi":"10.1109/BIPOL.1992.274072","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274072","url":null,"abstract":"The effect of proton implantation on the performance of n- and p-channel, 500-V lateral insulated gate bipolar transistors (LIGBTs) are studied. It is shown that proton implantation results in a better forward drop vs. turn-off time than conventional electron irradiation. Since proton damage is also more thermally stable than electron damage, proton implantation is a better choice in LIGBT optimization for minimum power loss.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129274039","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Assumptions and trade-offs in device simulation programs 器件仿真程序中的假设和权衡
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274087
M. Lundstrom
{"title":"Assumptions and trade-offs in device simulation programs","authors":"M. Lundstrom","doi":"10.1109/BIPOL.1992.274087","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274087","url":null,"abstract":"The author examines the physical assumptions which underlie device simulation programs and considers their implications for advanced bipolar transistors. The limits of drift-diffusion equations are discussed, and advanced techniques such as hydrodynamic and Monte Carlo approaches are described. Some thoughts on the device simulation requirements for future generation bipolar transistors are also presented.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130487761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A new, 0.8 V logic swing, 1.6 V operational high speed BiCMOS circuit 一个新的，0.8 V逻辑摆幅，1.6 V操作高速BiCMOS电路
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274054
T. Oguri, T. Kimura
{"title":"A new, 0.8 V logic swing, 1.6 V operational high speed BiCMOS circuit","authors":"T. Oguri, T. Kimura","doi":"10.1109/BIPOL.1992.274054","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274054","url":null,"abstract":"The authors present a high-speed, low-power, 0.8-V-logic-swing BiCMOS circuit that operates at 1.6 V. It achieves a 40% reduction in delay time and a 45% improvement in power consumption over CMOS circuits, as well as a 40% reduction in delay time and a 35% improvement in power consumption over BiNMOS circuits. This excellent performance is achieved by an innovative method for quasi-reduction of the bipolar transistor turn-on voltage.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127860282","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Silicon epitaxial equipment and processing advances for bipolar base technology 双极基极技术的硅外延设备及工艺进展
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274091
J. Borland
{"title":"Silicon epitaxial equipment and processing advances for bipolar base technology","authors":"J. Borland","doi":"10.1109/BIPOL.1992.274091","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274091","url":null,"abstract":"The author reviews silicon epitaxial equipment and processing advances that have contributed to epitaxial base bipolar technology. He addresses equipment design and surface cleaning requirements for a manufacturable low-temperature epitaxial process. Single-wafer and batch multiwafer equipment designs and processing, as well as possible clustered configurations for improved process capabilities, are discussed.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124264609","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
XFCB: a high speed complementary bipolar process on bonded SOI XFCB:键合SOI的高速互补双极工艺
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274036
S. Feindt, J. Hajjar, J. Lapham, D. Buss
{"title":"XFCB: a high speed complementary bipolar process on bonded SOI","authors":"S. Feindt, J. Hajjar, J. Lapham, D. Buss","doi":"10.1109/BIPOL.1992.274036","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274036","url":null,"abstract":"A fabrication process was developed to obtain full, dielectrically isolated complementary bipolar transistors. Direct-wafer-bonding silicon-on-insulator and deep-trench-isolation technologies were used. Polysilicon was used as the emitter for both NPN and PNP transistors. A single layer of polysilicon was used to fabricate both transistor types. The process is characterized by a 12 V breakdown and yields transistors with a cutoff frequency of 4.5 GHz and 2.5 GHz for the NPN and PNP devices, respectively.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121484403","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 40
Extension of common-emitter breakdown voltage for high speed Si/Si/sub 1-x/Ge/sub x/ HBT's 扩展高速Si/Si/sub - 1-x/Ge/sub -x/ HBT的共发射极击穿电压
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274086
M. Shaheed, C. Maziar
{"title":"Extension of common-emitter breakdown voltage for high speed Si/Si/sub 1-x/Ge/sub x/ HBT's","authors":"M. Shaheed, C. Maziar","doi":"10.1109/BIPOL.1992.274086","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274086","url":null,"abstract":"Various collector structures were simulated to identify design options which lead to an increase in the breakdown voltage of high speed SiGe-base heterojunction bipolar transistors (HBTs). The authors propose an approach for increasing the breakdown voltage by appropriately tailoring the doping profile in the collector. A two-part collector doping profile was found to reduce the avalanche multiplication ratio by more than an order of magnitude. Simulation results indicate that this improvement can be achieved without severe degradation of the base pushout effect.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125035161","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：604180095
Book学术官方微信