一个新的，0.8 V逻辑摆幅，1.6 V操作高速BiCMOS电路

Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI:10.1109/BIPOL.1992.274054

T. Oguri, T. Kimura

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引用次数: 0

摘要

作者提出了一种工作电压为1.6 V的高速、低功耗、0.8 V逻辑摆幅BiCMOS电路。与CMOS电路相比，延迟时间减少了40%，功耗提高了45%，延迟时间减少了40%，功耗提高了35%。这种优异的性能是通过一种创新的准降低双极晶体管导通电压的方法实现的。

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A new, 0.8 V logic swing, 1.6 V operational high speed BiCMOS circuit

The authors present a high-speed, low-power, 0.8-V-logic-swing BiCMOS circuit that operates at 1.6 V. It achieves a 40% reduction in delay time and a 45% improvement in power consumption over CMOS circuits, as well as a 40% reduction in delay time and a 35% improvement in power consumption over BiNMOS circuits. This excellent performance is achieved by an innovative method for quasi-reduction of the bipolar transistor turn-on voltage.<>

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Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting

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