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Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting最新文献

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Design and evaluation of a 5 GHz HBT strobed comparator 5 GHz HBT频闪比较器的设计与评价
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274064
V. Garuts
{"title":"Design and evaluation of a 5 GHz HBT strobed comparator","authors":"V. Garuts","doi":"10.1109/BIPOL.1992.274064","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274064","url":null,"abstract":"A strobed comparator-latch designed for reproducible manufacturing has been fabricated in a development GaAs heterojunction bipolar technology (HBT) for operation to 5 Gsample/s with moderate power consumption. A conservative design approach which operates the devices well below the maximum current resulted in good circuit yield of 64% and repeatable operation at DC and at high frequency. Good agreement between measured and predicted performance was obtained, indicating that the design environment adequately represents the process.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132002686","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A low-power static frequency divider circuit in bipolar technology 双极技术中的低功耗静态分频电路
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274059
K. Toh, Y.C. Tzeng, J. Warnock, E. Petrillo, K.C. Chuang, J. Sun
{"title":"A low-power static frequency divider circuit in bipolar technology","authors":"K. Toh, Y.C. Tzeng, J. Warnock, E. Petrillo, K.C. Chuang, J. Sun","doi":"10.1109/BIPOL.1992.274059","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274059","url":null,"abstract":"A low-power silicon bipolar frequency divider circuit using AC-coupled active pull-down emitter-coupled-logic (ECL)-like circuitry is described. The divide-by-eight circuit consists of three identical divide-by-two modules in cascade. The clock is brought in through an emitter-follower, and the output of the divider is buffered through an emitter-follower output stage. The divide-by-two module consists of a pair of master-slave flip-flops. A maximum clocking frequency of 2.5 GHz at a record low power of 1.7 mW per flip-flop has been realized. The performance can be extended to 6 GHz at 5 mW per flip-flop.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127850539","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A high-density 300 ps BiCMOS GRA 高密度300ps BiCMOS GRA
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274056
J. Eckhardt, S. Chu, K. Umino
{"title":"A high-density 300 ps BiCMOS GRA","authors":"J. Eckhardt, S. Chu, K. Umino","doi":"10.1109/BIPOL.1992.274056","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274056","url":null,"abstract":"A multiport BiCMOS embedded static RAM (SRAM) is introduced for use as a growable register array (GRA) in high-performance gate array technologies. This design provides read access times equivalent to those of bipolar RAMs, while maintaining soft-error rates that are lower than those of CMOS. Read access times of 300 ps were achieved by eliminating all emitter-coupled-logic (ECL) to CMOS conversion from the read paths. The current implementation allows array densities as high as 200 kb embedded in gate array logic.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122208728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Signal conditioning circuitry for silicon pressure sensor 硅压力传感器信号调理电路
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274039
M. Lee, B. Lee, Young Jun Lee
{"title":"Signal conditioning circuitry for silicon pressure sensor","authors":"M. Lee, B. Lee, Young Jun Lee","doi":"10.1109/BIPOL.1992.274039","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274039","url":null,"abstract":"A bipolar integrated silicon pressure sensor with signal conditioning circuitry, including a band-gap reference a differential amplifier, a voltage-to-current converter, and a current-controlled oscillator, is presented. The circuits were designed to suppress the influence of temperature and supply voltage variation. The signal conditioning circuitry can convert input pressure to a square waveform with a temperature coefficient of 67 ppm/ degrees C in the temperature range of 0 degrees C approximately 50 degrees C. This signal conditioning circuitry was fabricated by double-diffused bipolar technology and can be operated at up to 14 psi.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127142609","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A bipolar IF device for GSM mobile telephone 一种用于GSM移动电话的双极中频装置
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274083
K. Kwan, K. Marshall
{"title":"A bipolar IF device for GSM mobile telephone","authors":"K. Kwan, K. Marshall","doi":"10.1109/BIPOL.1992.274083","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274083","url":null,"abstract":"The authors describe an IF device used in a telephone handset for the European GSM cellular network. It carries out frequency down-conversion from 65.8 MHz to the 812.5-kHz baseband signal. It has a maximum system gain of 90 dB and a dynamic range of 56 dB. A system noise figure of 7-8 dB was achieved at maximum gain setting. Output was maintained within the midrange of analog-to-digital-converter (ADC) input levels by employing a digital baseband automatic gain control (AGC) technique.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125472681","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A novel VLSI process using electron irradiation and laser annealing 一种新的电子辐照和激光退火VLSI工艺
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1992-10-07 DOI: 10.1109/BIPOL.1992.274069
A. Usenko
{"title":"A novel VLSI process using electron irradiation and laser annealing","authors":"A. Usenko","doi":"10.1109/BIPOL.1992.274069","DOIUrl":"https://doi.org/10.1109/BIPOL.1992.274069","url":null,"abstract":"A semiconductor integrated circuit fabrication technology, called radiplanar, which improves VLSI performance in several respects is described. The radiplanar process includes two process steps which are not used in conventional IC technologies. The first is high-energy, high-flux electron irradiation, and the second is pulsed laser treatment. A semi-insulating substrate is formed by irradiating a standard Si substrate with high-energy electrons to generate point lattice defects. Then only the surface of the irradiated substrate is made semiconductive by laser processing. Semiconductor devices are produced in the semiconductive regions of the substrate formed in this manner.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121854425","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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