Design and evaluation of a 5 GHz HBT strobed comparator

V. Garuts
{"title":"Design and evaluation of a 5 GHz HBT strobed comparator","authors":"V. Garuts","doi":"10.1109/BIPOL.1992.274064","DOIUrl":null,"url":null,"abstract":"A strobed comparator-latch designed for reproducible manufacturing has been fabricated in a development GaAs heterojunction bipolar technology (HBT) for operation to 5 Gsample/s with moderate power consumption. A conservative design approach which operates the devices well below the maximum current resulted in good circuit yield of 64% and repeatable operation at DC and at high frequency. Good agreement between measured and predicted performance was obtained, indicating that the design environment adequately represents the process.<<ETX>>","PeriodicalId":286222,"journal":{"name":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BIPOL.1992.274064","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

A strobed comparator-latch designed for reproducible manufacturing has been fabricated in a development GaAs heterojunction bipolar technology (HBT) for operation to 5 Gsample/s with moderate power consumption. A conservative design approach which operates the devices well below the maximum current resulted in good circuit yield of 64% and repeatable operation at DC and at high frequency. Good agreement between measured and predicted performance was obtained, indicating that the design environment adequately represents the process.<>
5 GHz HBT频闪比较器的设计与评价
在开发的GaAs异质结双极技术(HBT)中,设计了一种用于可重复制造的频闪比较器锁存器,其工作速度为5 Gsample/s,功耗适中。保守的设计方法使器件的工作电流远低于最大电流,从而使电路的良率达到64%,并且在直流和高频下可重复工作。在测量和预测性能之间获得了良好的一致性,表明设计环境充分代表了过程。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信