为多晶硅位单元触点和发射器量身定制界面氧化物,在4 Mbit BiCMOS快速静态RAM中进行原位蒸汽HF界面清洁和多晶硅沉积

Fred Walczyk, Craig Lage, Vidya Kaushik, Mike Blackwell
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引用次数: 7

摘要

在4 mb /0.5 μ m BiCMOS快速静态RAM (FSRAM)工艺中,将基于团簇工具的原位蒸汽HF清洗、超薄氧化物生长和多晶硅沉积技术与形成多晶硅发射体和多晶硅位单元触点的传统工艺进行了比较。原位处理技术包括用HF蒸气去除天然氧化物,选择性地生长几层热界面氧化物,并使用负载锁定的多室簇状工具沉积多晶硅膜。作者已经测试了该工艺在通过使用薄界面氧化物调整双极增益的同时产生低位单元接触电阻的能力。结果表明,通过集束工具加工实现的控制在同时优化多晶硅发射体和位单元接触的性能方面提供了更大的灵活性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Tailoring interfacial oxide for polysilicon bit-cell contacts and emitters with in situ vapor HF interface cleaning and polysilicon deposition in a 4 Mbit BiCMOS fast static RAM
A cluster-tool-based technique for in situ vapor HF cleaning, ultrathin oxide growth and polysilicon deposition is compared to conventional processing in forming polysilicon emitters and polysilicon bit-cell contacts in a 4-Mb/0.5- mu m BiCMOS fast static RAM (FSRAM) process. The in situ processing techniques involve removing native oxide with vapor HF, optionally growing several monolayers of thermal interfacial oxide and depositing a polysilicon film using a load-locked multichamber cluster tool. The authors have examined the capability of this process for producing low bit-cell contact resistance while tailoring bipolar gain through the use of a thin interfacial oxide. Results are reported which indicate that the control achieved with cluster tool processing provides greater flexibility in simultaneously optimizing the performance of the polysilicon emitters and bit-cell contacts.<>
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