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1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers最新文献

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A latching comparator for 12b A/D applications 用于12b A/D应用的锁存比较器
1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1980.1156135
G. Erdi
{"title":"A latching comparator for 12b A/D applications","authors":"G. Erdi","doi":"10.1109/ISSCC.1980.1156135","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156135","url":null,"abstract":"A comparator with 0.1LSB error and 50ns response time with 0.5LSB overdrive, for use in a 12b successive approximation A/D will be described. The circuit-junction isolated-includes a buried-zener level shift.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122537625","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Micropower linear compatible I2L techniques in biomedical telemetry 生物医学遥测中的微功率线性兼容I2L技术
1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1980.1156131
T. Harrison, J. Knutti, H. Allen, J. Meindl
{"title":"Micropower linear compatible I2L techniques in biomedical telemetry","authors":"T. Harrison, J. Knutti, H. Allen, J. Meindl","doi":"10.1109/ISSCC.1980.1156131","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156131","url":null,"abstract":"This report will cover an implantable PCM preprocessor using stratified epitaxy, nonabutting N+ collars, and PNP-eoupled stacked I2L to reduce transmitter power drain by a decade without added IC fabrication steps.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122569132","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Three-dimensional finite element simulation of semiconductor devices 半导体器件三维有限元模拟
1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1980.1156066
E. Buturla, P. Cottrell, B. Grossman, K. Salsburg, M. Lawlor, C. McMullen
{"title":"Three-dimensional finite element simulation of semiconductor devices","authors":"E. Buturla, P. Cottrell, B. Grossman, K. Salsburg, M. Lawlor, C. McMullen","doi":"10.1109/ISSCC.1980.1156066","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156066","url":null,"abstract":"Mobile carrier transport in semiconductors, simulated in three dimensions, using the finite element method, will be reported. The algorithm has been used to model the combined effect of short channel lengths and narrow channel widths on the threshold of an IGFET.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116951475","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 32
A 35ns 16K PROM 一个35ns 16K PROM
1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1980.1156026
R. Wallace, A. Learn, K. Schuette
{"title":"A 35ns 16K PROM","authors":"R. Wallace, A. Learn, K. Schuette","doi":"10.1109/ISSCC.1980.1156026","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156026","url":null,"abstract":"This paper will cover a 16,384b PROM organized 2K × 8, fabricated on a 140mil square chip, with a typical 25ns access time and 600mW power dissipation.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116268691","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
The LSI data acquisition peripheral of the future 未来的大规模集成电路数据采集外设
1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1980.1156105
J. Schoeff, J. Solomon
{"title":"The LSI data acquisition peripheral of the future","authors":"J. Schoeff, J. Solomon","doi":"10.1109/ISSCC.1980.1156105","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156105","url":null,"abstract":"Performance limits, unique to large scale MOS and bipolar data acquisition ICs, will be examined. Comparisons between competing partitioning methods for LSI-based analog/ microcomputer systems will be made.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114813382","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An autozeroing sample and hold IC 自动调零样品和保持IC
1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1980.1156062
F. Gasparik
{"title":"An autozeroing sample and hold IC","authors":"F. Gasparik","doi":"10.1109/ISSCC.1980.1156062","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156062","url":null,"abstract":"A sample and hold circuit with autozeroing of dc errors, providing accuracy adequate for use in 12b data-acquisition applications will be discussed. Device includes all digital control circuitry and requires no external components.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126209075","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A switched capacitor bandsplit filter using double polysilicon oxide isolated CMOS 一种使用双多晶硅氧化物隔离CMOS的开关电容带分滤波器
1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1980.1156067
T. Foxall, R. Whitbread, L. Sellars, A. Aitken, J. Morris
{"title":"A switched capacitor bandsplit filter using double polysilicon oxide isolated CMOS","authors":"T. Foxall, R. Whitbread, L. Sellars, A. Aitken, J. Morris","doi":"10.1109/ISSCC.1980.1156067","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156067","url":null,"abstract":"This paper will describe a bandsplit filter IC, with the chip containing two bandpass filters, Schmitt input comparators and necessary clock logic to perform front end functions of a DTMF receiver.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126763019","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
CMOS PCM channel filter CMOS PCM通道滤波器
1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1980.1156126
W. Black, D. Allstot, S. Patel, J. Wieser
{"title":"CMOS PCM channel filter","authors":"W. Black, D. Allstot, S. Patel, J. Wieser","doi":"10.1109/ISSCC.1980.1156126","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156126","url":null,"abstract":"This paper will report on a CMOS channel filter which contains transmit, receive and 50/60Hz rejection filters and two 600-ohm output drivers on a single die, designed for either +5 or single +12v, where operating power with active amplifiers is under 40mW. Switched capacitor techniques are used.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127260912","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
2K×8b HCMOS static RAMs 2K×8b HCMOS静态ram
1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1980.1156107
T. Masuhara, O. Minato, T. Sasaki, H. Nakamura, Y. Sakai, T. Yasui, K. Uchibori
{"title":"2K×8b HCMOS static RAMs","authors":"T. Masuhara, O. Minato, T. Sasaki, H. Nakamura, Y. Sakai, T. Yasui, K. Uchibori","doi":"10.1109/ISSCC.1980.1156107","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156107","url":null,"abstract":"A pair of HCMOS static RAMs with 2K word×8b organization, using JFET-powered static RAM cells and operating at 74ns typical access time, operating power of 200mW and standby power of 25μW will be described.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126352485","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
An 8 channel 8b µP compatible NMOS converter with programmable ranges 具有可编程量程的8通道8b µP兼容NMOS转换器
1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI: 10.1109/ISSCC.1980.1156015
L. Bienstman, H. de Man
{"title":"An 8 channel 8b µP compatible NMOS converter with programmable ranges","authors":"L. Bienstman, H. de Man","doi":"10.1109/ISSCC.1980.1156015","DOIUrl":"https://doi.org/10.1109/ISSCC.1980.1156015","url":null,"abstract":"This paper will describe an NMOS D/A converter chip using an 8b capacitor array, an operational amplifier and an 8- channel analog demultiplexer. Ranges and end points are programmable and the control PLA is testable. The digital interface has been designed for microprocessor-based control systems.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122527193","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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