Solid-state Electronics最新文献

{"title":"High blocking voltage and low on-state voltage drop 4H-SiC p-channel IGBTs with optimized multizone floating field rings","authors":"Ruixue Mai ,&nbsp;Xiaoli Tian ,&nbsp;Xinyu Liu ,&nbsp;Xinhua Wang ,&nbsp;Yun Bai ,&nbsp;Wei Wei ,&nbsp;Yuhao Guo ,&nbsp;Chengyue Yang ,&nbsp;Chengzhan Li ,&nbsp;Yidan Tang","doi":"10.1016/j.sse.2025.109248","DOIUrl":"10.1016/j.sse.2025.109248","url":null,"abstract":"<div><div>A novel multizone floating field ring (M−FFR) edge termination structure with individually increasing ring spacing has been proposed, fabricated, and measured for 4H-silicon carbide (4H-SiC) p-channel insulated gate bipolar transistors (IGBTs). This M−FFR design effectively suppresses electric field crowding at the termination edge while maintaining a high tolerance to oxide charge accumulation. Numerical simulations indicate that the M−FFR achieves a 17.4 % higher blocking voltage compared to conventional equidistant floating field ring (Con-FFR) designs. Importantly, the proposed structure requires no complex fabrication steps or additional lithography processes, reducing manufacturing cost and complexity. To further enhance device performance, carrier lifetime enhancement techniques were applied to reduce the on-state voltage drop (<em>V</em>_f). Experimental measurements confirm that the fabricated p-channel SiC IGBTs are capable of sustaining blocking voltages exceeding 10 kV with leakage currents below 300nA. At a gate voltage of −20 V, a <em>V</em>_f of 5.77 V and a low differential specific on-resistance (<em>R</em>_on,sp,diff) of 17.5 mΩ·cm² were achieved. These results suggest that the device is promising for applications in high-power electronic devices.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109248"},"PeriodicalIF":1.4,"publicationDate":"2025-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145045989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A closed-form model for programming of oxide-based resistive random access memory cells derived from the Stanford model","authors":"Nadine Dersch ,&nbsp;Eduardo Perez ,&nbsp;Christian Wenger ,&nbsp;Mike Schwarz ,&nbsp;Benjamin Iniguez ,&nbsp;Alexander Kloes","doi":"10.1016/j.sse.2025.109238","DOIUrl":"10.1016/j.sse.2025.109238","url":null,"abstract":"<div><div>This paper presents a closed-form model for pulse-based programming of oxide-based resistive random access memory devices. The Stanford model is used as a basis and solved in a closed-form for the programming cycle. A constant temperature is set for this solution. With the closed-form model, the state of the device after programming or the required programming settings for achieving a specific device conductance can be calculated directly and quickly. The Stanford model requires time-consuming iterative calculations for high accuracy in transient analysis, which is not necessary for the closed-form model. The closed-form model is scalable across different programming pulse widths and voltages.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109238"},"PeriodicalIF":1.4,"publicationDate":"2025-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145010667","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Geometrical variability impact on the gate tunneling leakage mechanisms in FinFETs","authors":"C. Medina-Bailon,&nbsp;J.L. Padilla,&nbsp;L. Donetti,&nbsp;C. Navarro,&nbsp;C. Sampedro,&nbsp;F. Gamiz","doi":"10.1016/j.sse.2025.109212","DOIUrl":"10.1016/j.sse.2025.109212","url":null,"abstract":"<div><div>Given the critical role that quantum tunneling effects play in the behavior of nanoelectronic devices, it is essential to investigate the influence and restraints of these phenomena on the overall transistor performance. In this work, a previously developed gate leakage model, incorporated into an in-house 2D Multi-Subband Ensemble Monte Carlo simulation framework, is employed to analyze the leakage current flowing across the gate insulator. The primary objective is to evaluate how variations in key geometrical parameters (specifically, gate oxide and semiconductor thicknesses dimensions) affect the magnitude and bias dependence of tunneling-induced leakage. Simulations are performed on a representative FinFET structure, and the results reveal that tunneling effects become increasingly pronounced at low gate voltages in devices with thinner oxides and thicker semiconductor thickness. These findings underscore the relevance of incorporating quantum tunneling mechanisms in predictive modeling of advanced transistor architectures.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109212"},"PeriodicalIF":1.4,"publicationDate":"2025-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145118356","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Evidence of out-of-equilibrium body potential in undoped EZ-FET","authors":"Abbas Hamzeh ,&nbsp;Maryline Bawedin ,&nbsp;Nada Zerhouni Abdou ,&nbsp;Miltiadis Alepidis ,&nbsp;Pablo Acosta-Alba ,&nbsp;Laurent Brunet ,&nbsp;Irina Ionica","doi":"10.1016/j.sse.2025.109251","DOIUrl":"10.1016/j.sse.2025.109251","url":null,"abstract":"<div><div>In this paper, we investigate for the first time the variation of out-of-equilibrium body potential during the scan of the back-gate voltage in EZ-FET double-gate structures, built on silicon-on-insulator. This simplified MOSFET, with undoped source and drain is typically used for front and back interface characterization purposes. The out of equilibrium phenomenon, induced by the difficulty to inject instantaneously the carriers needed for the conducting layer creation, is influenced by the front-gate. Two different behaviors are observed, depending on the sign of the front-gate. TCAD simulations confirm the main experimental tendencies.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109251"},"PeriodicalIF":1.4,"publicationDate":"2025-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145118393","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Colossal permittivity and defect-engineered conduction in Ag/Al/SiO2/Si/Ag MIS structures for next-generation RRAM and 5G/6G capacitors","authors":"A. Ashery","doi":"10.1016/j.sse.2025.109256","DOIUrl":"10.1016/j.sse.2025.109256","url":null,"abstract":"<div><div>The Ag/Al/SiO₂/Si/Ag metal–insulator-semiconductor (MIS) structure exhibits remarkable dielectric and electrical properties, making it a promising candidate for next-generation electronic applications. This study systematically investigates the colossal permittivity, defect-mediated conduction, and relaxation dynamics of the dual-metal MIS structure using impedance spectroscopy, dielectric analysis, and AC conductivity measurements across wide frequency (1 kHz–20 MHz), temperature (80–400 K), and voltage (±5 V) ranges. Key findings reveal that the Ag/Al electrode configuration induces unique interfacial polarization effects, leading to ultrahigh dielectric constants (ε′ &gt; 103 at low frequencies) and low loss tangents (tanδ &lt; 0.1) suitable for high-frequency capacitors in 5G/6G technologies. The structure also demonstrates voltage-tunable resistive switching via Ag filament formation, enabling ultra-low-power resistive random-access memory (RRAM) with enhanced endurance.</div><div>Novelty: Unlike conventional Al/SiO₂/Si devices, the dual-metal design leverages Ag’s high ionic mobility to modulate defect states and conduction pathways, resulting in: Colossal permittivity from space charge polarization at Ag/SiO₂ and SiO₂/Si interfaces. Defect-engineered conduction via thermally activated hopping and Fowler-Nordheim tunneling. Negative capacitance effects at high frequencies, attributed to charge trapping/detrapping dynamics.</div><div>New Applications:</div><div><strong>RRAM</strong>: Controlled Ag migration enables nanoscale filamentary switching with low operating voltages (&lt;3 V).</div><div><strong>High-frequency capacitors</strong>: Stable ε′ and low tanδ up to 1 MHz meet demands for 5G/6G integrated passives.</div><div><strong>Flexible electronics</strong>: Compatibility with polymer hybrids (e.g., PVA-SiO₂) allows integration into stretchable substrates.</div><div>Challenges such as interfacial defect control and thermal stability are addressed, with proposed solutions including barrier layers and stoichiometric optimization. This work bridges fundamental dielectric spectroscopy with practical device engineering, offering a roadmap for advancing Ag/Al/SiO₂/Si/Ag structures in nanoelectronics and beyond.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109256"},"PeriodicalIF":1.4,"publicationDate":"2025-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145220574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Monte Carlo analysis of hot electron injection in the passivation layer of GaN HEMTs","authors":"Pierpaolo Palestri ,&nbsp;Luca Sayadi ,&nbsp;Andrea Minetto ,&nbsp;Gerhard Prechtl ,&nbsp;Luca Selmi ,&nbsp;Oliver Häberlen","doi":"10.1016/j.sse.2025.109257","DOIUrl":"10.1016/j.sse.2025.109257","url":null,"abstract":"<div><div>We investigate the injection of hot electrons in the passivation layer above the drift region of GaN HEMTs by means of Monte-Carlo transport simulations. We find that the lateral component of the electric field in the AlGaN layer delivers a non-negligible kinetic energy to the electrons, thus enhancing injection in the passivation at the top, an effect that is not captured by the standard hot-carrier injection models developed for Si devices that requires the development of ad-hoc hot-carrier injection models for GaN devices. The implications of our calculations for the understanding of reliability and dynamic-<span><math><msub><mrow><mi>R</mi></mrow><mrow><mi>o</mi><mi>n</mi></mrow></msub></math></span> are also briefly discussed.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109257"},"PeriodicalIF":1.4,"publicationDate":"2025-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145320063","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Enhancing carrier transport in AlGaN/GaN HEMTs through structural optimization and transconductance modeling","authors":"Hyo-Joung Kim ,&nbsp;Walid Amir ,&nbsp;Surajit Chakraborty ,&nbsp;Ju-Won Shin ,&nbsp;Ki-Young Shin ,&nbsp;Hyuk-Min Kwon ,&nbsp;Tae-Woo Kim","doi":"10.1016/j.sse.2025.109222","DOIUrl":"10.1016/j.sse.2025.109222","url":null,"abstract":"<div><div>In GaN-based High-Electron Mobility Transistors (HEMTs), the carrier transport properties of the 2-Dimensional Electron Gas (2DEG), specifically the saturation velocity (<em>υ_sat</em>) and effective mobility (<em>μ_{n_eff}</em>,), are critical determinants of device performance. To enhance these properties, we conducted structural optimizations, which included reducing the Al mole fraction in the Al_xGa_1-xN barrier and introducing an AlGaN back barrier. Recognizing the limitations of traditional extraction techniques, we employed transconductance modeling to accurately extract effective mobility and saturation velocity values. The implementation of the AlGaN back barrier resulted in an effective mobility enhancement to 748 cm²/V·s. Additionally, reducing the Al mole fraction in the Al_xGa_1-xN top barrier led to an effective mobility improvement of 484 cm²/V·s. These findings provide valuable insights into the design of epitaxial structures for AlGaN/GaN HEMTs aimed at achieving superior performance in future applications.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109222"},"PeriodicalIF":1.4,"publicationDate":"2025-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144988015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Study on drain bias dependence of Y-parameters under on-state condition in GaN HEMTs using low-frequency vector network analyzer and device simulation","authors":"Toshiyuki Oishi ,&nbsp;Ken Kudara ,&nbsp;Yutaro Yamaguchi ,&nbsp;Shintaro Shinjo ,&nbsp;Koji Yamanaka ,&nbsp;Saga University ,&nbsp;Mitsubishi Electric Corporation","doi":"10.1016/j.sse.2025.109245","DOIUrl":"10.1016/j.sse.2025.109245","url":null,"abstract":"<div><div>The drain bias dependence of low-frequency Y-parameters under on-state conditions in Gallium Nitride high electron mobility transistors (GaN HEMTs) is investigated using experimental results and device simulation. The Y-parameters for broadband frequencies from 10 Hz to 100 MHz were systematically measured using a vector network analyzer for drain voltage from 3 to 30 V at the gate voltage of 0 V from room temperature to 120 degrees Celsius. Six signals with the peaks were observed in the imaginary parts (Im) of Y₂₂ and Y₂₁. These peaks were categorized into two groups. One is that the peaks appeared around 5 MHz and have negative slopes in Arrhenius plots. Another is that the peaks appeared below 150 kHz and have an activation energy that can be estimated from Arrhenius plots. The second group was further divided into peaks appeared in both Im(Y₂₂) and Im(Y₂₁), and those that appeared only in Im(Y₂₁). The device simulation including self-heating effects was performed using the trap parameters estimated from the experimental results. Both DC and Y-parameter characteristics for the simulation have good agreement with the experimental results. By the simulation for the individual effects, the peaks around 5 MHz result from the heat generation in GaN HEMTs. The peaks below 150 kHz are considered to originate from the traps in AlGaN and GaN layers. The traps in the GaN layer generate the peaks in both Im(Y₂₂) and Im(Y₂₁), while the traps in the AlGaN layer generate peaks in only Im(Y₂₁).</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109245"},"PeriodicalIF":1.4,"publicationDate":"2025-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145096282","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Silicon-oxide resistive switching memory based on the HSQ layer","authors":"Piotr Wiśniewski ,&nbsp;Andrzej Mazurak ,&nbsp;Alicja Kądziela ,&nbsp;Maciej Filipiak ,&nbsp;Bartłomiej Stonio ,&nbsp;Romuald B. Beck","doi":"10.1016/j.sse.2025.109223","DOIUrl":"10.1016/j.sse.2025.109223","url":null,"abstract":"<div><div>In this work, we study the silicon-oxide resistive switching memory based on the hydrogen silsesquioxane (HSQ) layer. We fabricated the Al/HSQ/n++ − Si RRAM (Resistive Random Access Memory) devices and performed electrical characterization. Transport mechanisms for different voltage ranges in High Resistance State (HRS) and Low Resistance State (LRS) were identified and analyzed. We show that spin on the silicon oxide layer can result in good resistive switching properties that can be utilized in the design and fabrication of RRAM devices.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109223"},"PeriodicalIF":1.4,"publicationDate":"2025-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144933521","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Non-uniform matching performances in mesa-isolated SOI MOSFETs","authors":"Pierre Lhéritier ,&nbsp;Daphnée Bosch ,&nbsp;Giovanni Romano ,&nbsp;Fabienne Ponthenier ,&nbsp;Sylvain Joblot ,&nbsp;Joris Lacord","doi":"10.1016/j.sse.2025.109224","DOIUrl":"10.1016/j.sse.2025.109224","url":null,"abstract":"<div><div>This work studies the threshold voltage mismatch of mesa-isolated SOI pMOSFETs through a breakdown between edge and center contributions. Pelgrom’s law is followed if a proper care is taken in the Vt extraction method. Applied to pMOS devices we observed that despite its parasitic nature, the edge transistor mismatch is as good as that of the center, regardless of channel doping and back-gate bias. Mismatch degradation in reverse back-bias mode is observed and attributed to the presence of floating body effects.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"230 ","pages":"Article 109224"},"PeriodicalIF":1.4,"publicationDate":"2025-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144988849","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}