Spin-on dopant technology for cost-effective source/drain formation in silicon MOSFETs

Spin-on dopant (SOD) technology is utilized as a cost-effective approach for forming the source and drain regions of MOSFETs. Desert Silicon P-280, a phosphorus-based dopant with a concentration of 1.9 × 10²² cm⁻³, is used in doping. Following spin-coating at 3000 rpm for 30 s, annealing is performed at temperatures ranging from 800 to 900 °C. As the annealing temperature increases, the sheet resistance significantly decreases from 1260 to 161 Ω/sq. In contrast, the junction depth increases from 0.14 to 0.32  µm on a boron-doped silicon substrate with a resistivity of ∼1 Ω·cm. To assess the electrical performance of the MOSFETs formed using the SOD process, device simulations are performed out using Silvaco technology computer-aided design software and compared with experimental results from MOSFETs fabricated via conventional ion implantation. The results reveal that the SOD-based MOSFET exhibits a threshold voltage (V_th) of ∼−0.30  V, a subthreshold swing (SS) of ∼86 mV/dec, the transconductance (g_m) of ∼0.89 mA/V, along with a comparable on-state currrent. In comparison, conventional ion-implanted MOSFETs show a V_th of −0.25 V, SS of 197.1 mV/dec, and g_m of 0.916 mA/V. These results demonstrate that the SOD technique is a promising alternative for dopant activation and junction formation in MOSFET fabrication, offering process simplicity and cost efficiency, albeit with some trade-offs in subthreshold performance.