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Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95最新文献

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Synchronous rectifiers using new structure MOSFET 采用新型结构MOSFET的同步整流器
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515044
Y. Fukumochi, I. Suga, T. Ono
{"title":"Synchronous rectifiers using new structure MOSFET","authors":"Y. Fukumochi, I. Suga, T. Ono","doi":"10.1109/ISPSD.1995.515044","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515044","url":null,"abstract":"For synchronous rectifier application, a smart trenched-gate base power MOSFET has been developed. This paper describes the technology involved in developing this structure and its features. Also, experimental verification of this new MOSFET is done using it on the 2'ry side of an actual DC-DC converter application. The results are analyzed and compared with the state-of-the art Schottky barrier diode. The new trenched-gate MOSFET shows excellent performance in such application and proves to be a sure choice for elevating the overall efficiency of such power conversion systems.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123015485","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Integration of a subscriber line interface circuit (SLIC) in a new 170 V smart power technology 用户线路接口电路(SLIC)在新型170v智能电源技术中的集成
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515052
B. Zojer, R. Koban, R. Petschacher, W. Sereinig
{"title":"Integration of a subscriber line interface circuit (SLIC) in a new 170 V smart power technology","authors":"B. Zojer, R. Koban, R. Petschacher, W. Sereinig","doi":"10.1109/ISPSD.1995.515052","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515052","url":null,"abstract":"The presented IC performs the high-voltage functions of an electronic central office subscriber line interface without the need for any transformers or relays. The challenges of SLIC integration stem from the combination of requirements: 150 V supply, 0.2% accuracy and up to 200 nF loads, while operating in a harsh environment. A new BCD-process and circuitry that emphasizes the relative merits of the devices (e.g. buffers with DMOS outputs, n-type supply voltage switch, accuracy by polyresistors) yielded a 30 mm/sup 2/ rugged SLIC in the first design step. All transmission specifications are met without trimming.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116797126","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A planar, nearly ideal, SiC device edge termination 一种近乎理想的平面SiC器件边缘端接
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515016
D. Alok, B. J. Baliga
{"title":"A planar, nearly ideal, SiC device edge termination","authors":"D. Alok, B. J. Baliga","doi":"10.1109/ISPSD.1995.515016","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515016","url":null,"abstract":"In this paper, a simple edge termination is described which can be used to achieve nearly ideal parallel plane breakdown voltage in silicon carbide devices. This novel termination, involves implantation of a neutral species on the edges of devices to form a high resistivity amorphous layer. With this termination, formed using argon implantation, the breakdown voltage of Schottky barrier diodes was measured to be very close to the ideal parallel plane breakdown voltage.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125163046","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
An observation of breakdown characteristics on thick silicon oxide 厚氧化硅的击穿特性观察
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515066
K. Nakamura, T. Takahashi, T. Hikichi, I. Takata
{"title":"An observation of breakdown characteristics on thick silicon oxide","authors":"K. Nakamura, T. Takahashi, T. Hikichi, I. Takata","doi":"10.1109/ISPSD.1995.515066","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515066","url":null,"abstract":"We have investigated the current-voltage characteristics of silicon dioxide (SiO/sub 2/) with its destruction phenomena and the electric damage which would be introduced by a measurement of leakage current. The samples are oxidized at 820/spl deg/C/spl sim/1215/spl deg/C and their thickness is 10 nm/spl sim/1650 nm. We have confirmed that the SiO/sub 2/ film under the electric stress begins to be damaged at a specific electric field strength. This specific value, /spl ap/8 MV/cm for the 75/spl sim/100 nm SiO/sub 2/, is distinctly lower than the dielectric breakdown value and decreases with increasing SiO/sub 2/ thickness. We have found for the first time that the leakage current could suddenly increase up to 100/spl sim/10000 times near the specific electric field strength if the SiO/sub 2/ film was treated above a certain temperature and possesses some thickness. And we suspect that this steep increment of leakage current of SiO/sub 2/ is due to the multiplication phenomenon which is activated by the electron's impact ionization. We have also noticed that the whole current-voltage characteristic of SiO/sub 2/ films is very similar to that of high voltage silicon pn-diodes in the whole range from the very low leakage current to the destruction phenomenon.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121720885","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
On-state and short circuit behaviour of high voltage trench gate IGBTs in comparison with planar IGBTs 高压沟栅igbt与平面igbt的通态和短路特性比较
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515039
R. Hotz, F. Bauer, W. Fichtner
{"title":"On-state and short circuit behaviour of high voltage trench gate IGBTs in comparison with planar IGBTs","authors":"R. Hotz, F. Bauer, W. Fichtner","doi":"10.1109/ISPSD.1995.515039","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515039","url":null,"abstract":"The impact of the cathode geometry on conduction and switching properties of high voltage trench gate IGBTs is analysed using mixed mode two-dimensional device and circuit simulation tools. The most effective means to minimize conduction losses by injection enhancement at the cathode is the reduction of the width of the mesa containing n/sup +/ electron emitters and the MOS channel regions. As compared to planar IGBTs, the improvement is most pronounced at higher operating temperatures. If low short circuit current densities are of concern, optimized trench gate geometries also require wide trenches. Trading off conduction losses against turn-off losses, trench gate IGBTs generate approximately 30 to 40% less turn-off losses as planar IGBTs with identical on-state voltage.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122068915","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
A unified analytical model for the carrier dynamics in trench insulated gate bipolar transistors (TIGBT) 沟槽绝缘栅双极晶体管载流子动力学的统一解析模型
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515033
F. Udrea, G. Amaratunga
{"title":"A unified analytical model for the carrier dynamics in trench insulated gate bipolar transistors (TIGBT)","authors":"F. Udrea, G. Amaratunga","doi":"10.1109/ISPSD.1995.515033","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515033","url":null,"abstract":"A physically-based analytical model for the on-state carrier dynamics in Trench Insulated Gate Bipolar Transistors (TIGBT) is proposed. The model accounts for the enhanced carrier modulation in the drift base due to the PIN diode effect. The on-state phenomena in the TIGBT are accurately described using numerical simulations and analytical modeling. The PIN diode effect has a very important role in reducing the on-state forward voltage with virtually no compromise in the turn-off performance. It is concluded that the TIGBT is the most promising power structure in the area of high voltage or/and fast switching devices.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"94 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134093897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 34
Excellent electro/stress-migration-resistance giant-grain copper interconnect technology for high-performance power devices 用于高性能功率器件的优异的抗电/应力迁移大晶粒铜互连技术
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515078
T. Takewaki, H. Yamada, T. Shibata, T. Ohmi, T. Nitta
{"title":"Excellent electro/stress-migration-resistance giant-grain copper interconnect technology for high-performance power devices","authors":"T. Takewaki, H. Yamada, T. Shibata, T. Ohmi, T. Nitta","doi":"10.1109/ISPSD.1995.515078","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515078","url":null,"abstract":"By using an ultra-clean low-energy ion bombardment process, we have succeeded in forming Cu interconnects having giant grains (typical grain sizes of /spl sim/100 /spl mu/m). The giant-grain Cu interconnects exhibit three-orders of magnitude larger migration resistance than conventional Al-alloy interconnects. Moreover, by exposing the giant-grain Cu interconnects in SiH/sub 4/ ambient at 200/spl deg/C, Si selective deposition on Cu interconnect surface is successfully carried out. The surface-silicide passivated giant-grain Cu interconnects exhibit four orders of magnitude larger resistance against electromigration and stressmigration than conventional Al-alloy interconnects.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129455831","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Self-heating effect in lateral DMOS on SOI 横向DMOS对SOI的自热效应
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515023
Y. Leung, Y. Suzuki, K. Goodson, S.S. Wong
{"title":"Self-heating effect in lateral DMOS on SOI","authors":"Y. Leung, Y. Suzuki, K. Goodson, S.S. Wong","doi":"10.1109/ISPSD.1995.515023","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515023","url":null,"abstract":"The self-heating effect in an SOI LDMOS device, originating from the low thermal conductance of the buried silicon dioxide, was investigated under steady-state conditions. It is found that the temperature increase inside a device built in a 1 /spl mu/m silicon over 2 /spl mu/m buried oxide can be as high as 40/spl deg/C at a power level of 3 W/mm/sup 2/. The effective thermal resistances of the devices are found to increase with buried oxide thickness and decrease with silicon thickness. Two-dimensional thermal simulations with device simulator MEDICI are performed and the results are consistent with the experiments.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132474995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 38
The soot deposited integrated circuit substrate of 6 inches diameter for high voltage ICs, improved in durability against the pressure cooker test 烟灰沉积的集成电路基板直径为6英寸，用于高压集成电路，提高了耐压锅测试的耐久性
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515053
T. Anno, S. Katsuki, H. Unno, M. Yokota, R. Sawada, I. Fujii, M. Shimizu
{"title":"The soot deposited integrated circuit substrate of 6 inches diameter for high voltage ICs, improved in durability against the pressure cooker test","authors":"T. Anno, S. Katsuki, H. Unno, M. Yokota, R. Sawada, I. Fujii, M. Shimizu","doi":"10.1109/ISPSD.1995.515053","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515053","url":null,"abstract":"We have developed a dielectrically isolated substrate for a high voltage transistor applying the SODIC process. It was shown that the SODIC substrate had the advantage of low warpage and no void. However, the durability of the glass layer became a problem with cracking of the glass layer after pressure cooker test (PCT). It was found that the generation of cracks depended on the Si/B ratio and that the glass layer had the large distribution of the Si/B ratio. We have succeeded in improving the durability of SODIC substrate against PCT by making the concentration of the soot layer uniform and making the high voltage transistors on a 6-inch substrate, which showed a breakdown voltage of over 350 V.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"104 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133961386","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
RECEST: a reverse channel emitter switched thyristor 反向通道发射极开关晶闸管
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515003
A. Bhalla, T. Chow, K. So
{"title":"RECEST: a reverse channel emitter switched thyristor","authors":"A. Bhalla, T. Chow, K. So","doi":"10.1109/ISPSD.1995.515003","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515003","url":null,"abstract":"A 550 V, reverse channel emitter switched thyristor (RECEST) is demonstrated. It offers ease of thyristor turn-on, a low on-state drop, excellent parasitic thyristor latch-up immunity and a high maximum controllable current density. It is shown to have characteristics superior to both the conventional emitter switched thyristor and the dual lateral channel emitter switched thyristor, and shows promise for use in high-voltage applications.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123791912","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
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