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Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95最新文献

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Analysis of 4500 V double trench MOS controlled thyristor 4500v双沟槽MOS控制晶闸管分析
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515026
A.Q. Huang, G. Amaratunga, D. Chen
{"title":"Analysis of 4500 V double trench MOS controlled thyristor","authors":"A.Q. Huang, G. Amaratunga, D. Chen","doi":"10.1109/ISPSD.1995.515026","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515026","url":null,"abstract":"Novel high voltage MOS controlled thyristor (MCT) structures are proposed and analysed. It was found that the double trench MCT(DTMCT) increases the turn-off capability by a factor of 4 and reduces the turn-off loss by a factor of 5 compared with single trench gate MCT(TMCT) while both have a forward blocking voltage of 4500 V. These results, combined with the excellent forward current carrying capability provided by thyristor operation, are encouraging for the DTMCT to be developed for very high voltage low loss applications.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"183 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123553468","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Active surge voltage clamped 600 A IPM for high power application 主动浪涌电压箝位600 A IPM高功率应用
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515012
G. Majumdar, T. Hiramoto, T. Shirasawa, T. Tanaka, K. Mochizuki
{"title":"Active surge voltage clamped 600 A IPM for high power application","authors":"G. Majumdar, T. Hiramoto, T. Shirasawa, T. Tanaka, K. Mochizuki","doi":"10.1109/ISPSD.1995.515012","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515012","url":null,"abstract":"A new intelligent power module (IPM), rated 600 A and having an over-voltage protection function, which suits 1500 V DC to 2000 V DC 3 level inverter application, has been developed. In addition, the device promises to provide numerous other merits in the high power application fields. Most important of which is its ability to drastically reduce overall size and cost, including those of snubber components, of conventional systems based on existing power devices ( e.g. GTO thyristor, transistor module, IGBT module, etc.).","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131518399","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Power silicon carbide devices based on Lely grown substrates 基于Lely生长衬底的功率碳化硅器件
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515015
A. Lebedev, A. Andreev, M. Anikin, M. Rastegaeva, N. Savkina, A. M. Strelchuk, A. Syrkin, A. Tregubova, V. Chelnokov
{"title":"Power silicon carbide devices based on Lely grown substrates","authors":"A. Lebedev, A. Andreev, M. Anikin, M. Rastegaeva, N. Savkina, A. M. Strelchuk, A. Syrkin, A. Tregubova, V. Chelnokov","doi":"10.1109/ISPSD.1995.515015","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515015","url":null,"abstract":"This paper presents some experimental data relating to SiC devices based on substrates grown by the Lely method. These devices were developed on p- and n-type epilayers grown by the method of sublimation on the (0001)Si plane of the substrates. Investigation of devices parameters in the wide temperature region of 300-800 K were made. In these devices, parameters and concentration of deep centers and there influence on the processes of radiationless recombination have been investigated.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122407347","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
On the properties of silicon wafers for IGBT use, manufactured by direct bonding method 直接键合法制备IGBT用硅片的性能研究
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515037
E. Morita, C. Okada, S. Sabai, Y. Saito
{"title":"On the properties of silicon wafers for IGBT use, manufactured by direct bonding method","authors":"E. Morita, C. Okada, S. Sabai, Y. Saito","doi":"10.1109/ISPSD.1995.515037","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515037","url":null,"abstract":"Silicon wafers for IGBT use were prepared by the direct bonding process. Dimensional tolerance, properties of the bond interface and the electrical properties of the devices made from the wafers were investigated. We found that two methods can be used in direct bonding. One is a dilute HF treatment method and the other is a doped polysilicon method. The results showed that the direct bonded wafers have a large potential to be successfully used commercially.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"135 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134019435","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Technology and market trends for silicon wafers for power devices 功率器件用硅片的技术和市场趋势
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.514999
D. Huber
{"title":"Technology and market trends for silicon wafers for power devices","authors":"D. Huber","doi":"10.1109/ISPSD.1995.514999","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.514999","url":null,"abstract":"Semiconductor power device development is still accelerating. It's just a few years since IGBTs have been in production and now MOS controlled thyristors are following them. Smart power ICs are in production and different power device functions merged with logic on one piece of silicon is another fast growing branch of that industry. Efficient power generation and distribution as the volume and technology driver have been replaced by the efficient power conversion and usage at every point of use throughout the world. In the future the environmental concerns of industries will become increasingly stronger and will set new goals to engineers.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114515768","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Experimental demonstration of dual gate MOS thyristor 双栅MOS晶闸管的实验演示
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515002
N. Iwamuro, Y. Hoshi, T. Iwaana, K. Ueno, Y. Seki, M. Otsuki, K. Sakurai
{"title":"Experimental demonstration of dual gate MOS thyristor","authors":"N. Iwamuro, Y. Hoshi, T. Iwaana, K. Ueno, Y. Seki, M. Otsuki, K. Sakurai","doi":"10.1109/ISPSD.1995.515002","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515002","url":null,"abstract":"A new device concept, called the dual gate MOS thyristor (DGMOS), is introduced for simultaneously obtaining the low on-state voltage drop of a thyristor together with the fast turn-off speed of an IGBT and the results of measurement performed on devices with 900 V forward blocking capability are reported for the first time. Its on-state voltage drop (Von) was 1.30V at a current of 12 A (71.4 A/cm/sup 2/) with a turnoff loss (Eoff) of 114 /spl mu/J. These values of Von, Eoff indicate a much superior trade-off characteristic when compared to the IGBT in the voltage resonant circuit. Furthermore, the ability to turn-off the DGMOS is found to be improved by a homogeneous current distribution at the turn-off stage via reducing a sheet resistance of the gate poly-crystalline silicon layer and increasing a transition time from the thyristor mode operation to the IGBT mode.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115439107","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Efficient power Schottky rectifiers of 4H-SiC 高效功率肖特基4H-SiC整流器
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515017
A. Itoh, T. Kimoto, H. Matsunami
{"title":"Efficient power Schottky rectifiers of 4H-SiC","authors":"A. Itoh, T. Kimoto, H. Matsunami","doi":"10.1109/ISPSD.1995.515017","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515017","url":null,"abstract":"Efficient high-voltage 4H-SiC Schottky rectifiers were fabricated. These devices showed very low specific on-resistances (1.0-2.0/spl times/10/sup -3/ /spl Omega/ cm/sup 2/) with high breakdown voltages of /spl sim/800 V. Selecting an optimum barrier hight, 4H-SiC Schottky rectifiers operated with low forward voltage drops and low reverse leakage currents, which lead to a reduction of power losses. Utilizing Ti (/spl phi//sub B/:1.0/spl sim/1.2 V) as a Schottky metal, an efficient 4H-SiC power Schottky rectifiers with low losses could be realized.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116340528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 33
On resistance-leakage current trade-off in low-voltage power PMOSFETs 低压功率pmosfet的漏阻电流权衡
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515046
M. Darwish, R.K. Williams, M. S. Shekar, T. Chan
{"title":"On resistance-leakage current trade-off in low-voltage power PMOSFETs","authors":"M. Darwish, R.K. Williams, M. S. Shekar, T. Chan","doi":"10.1109/ISPSD.1995.515046","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515046","url":null,"abstract":"The trade-offs that impact minimizing on-resistance while maintaining an acceptable level of leakage current in very low on-resistance buried p-channel MOSFETs are investigated. Gate induced drain leakage (GIDL) current in power PMOSFETs is studied both experimentally and by using numerical simulations. The effect of several carrier generation mechanisms such as band-to-band tunneling, avalanche multiplication and thermal generation on leakage current are also discussed.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124285227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Trench-IGBTs with integrated diverter structures 具有集成导流器结构的沟槽- igbt
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515035
R. Constapel, J. Korec, B. J. Baliga
{"title":"Trench-IGBTs with integrated diverter structures","authors":"R. Constapel, J. Korec, B. J. Baliga","doi":"10.1109/ISPSD.1995.515035","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515035","url":null,"abstract":"Improved trench-IGBT structures are proposed and discussed in this paper by introducing a p/sup +/-diverter region at the bottom of the trench. This improves the reliability of the device by relaxing the electrical field at the corner of the trench and diverts holes from entering the p-base region during forward conduction and, what is more important, during switching. The performed numerical analysis for structures with a diverter connected to the cathode either via a linear resistor or a p-n diode shows, that the device with a diode diverter exhibits a significant improvement of the device performance as compared with the conventional trench-IGBT. The most important result is the excellent safe operating area of the proposed device.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128177174","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Comparison of linear and circular cell dual channel emitter switched thyristors 线性和圆槽双通道发射极开关晶闸管的比较
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515029
S. Sridhar, B. J. Baliga
{"title":"Comparison of linear and circular cell dual channel emitter switched thyristors","authors":"S. Sridhar, B. J. Baliga","doi":"10.1109/ISPSD.1995.515029","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515029","url":null,"abstract":"The total on-state voltage drop in a Dual Channel Emitter Switched Thyristor (DC-EST) is a function of the MOS channel density and the thyristor area. In this paper, it is demonstrated that the total on-state voltage drop has a minimum value at an optimum floating N+ emitter size. The minimum in the total on-state voltage drop was experimentally verified for both linear and circular cell DC-ESTs in excellent agreement with analytical predictions. The optimum floating emitter size was found to depend on the lifetime and the operating temperature. The minimum value of the total on-state voltage drop for the linear DC-EST was found to be lower than that for the circular design. However, for the optimum floating emitter size, the circular design has a higher maximum controllable current density than the linear design.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125797820","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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